JPS61205875A - Operation tester of microcomputer chip - Google Patents

Abstract

PURPOSE:To make it possible to simply inspect the chip of the microprocessor of a system side, by using a microprocessor secured in normal operation and same to that of the system side and comparing data by a non-coincidence circuit. CONSTITUTION:An operation tester 3 for the chip of a microprocessor is constituted of a microprocessor 4 secured in normal operation and performing the same operation as one used in an applied system 1, a non-coincidence circuit 5, a gate circuit 6 and a timing circuit 7. The address pass A, data pass D and system control signal of the system 1 are inputted to the non-coincidence circuit 5 and the passes A, D and a system control signal S are inputted thereto from the microprocessor 4 and, when both data are compared and a non- coincidence signal is issued, the microprocessor of the system 1 judges abnormality. By this mecha- nism, a test can be rapidly carried out by the simple apparatus.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an operation tester for testing whether a microcomputer chip is operating normally.

BACKGROUND ART Conventional microcomputer systems operate by checking each microprocessor by checking whether the data of each microprocessor matches or does not match, using multiple microprocessors such as a dual system or a triple system. It was designed to perform fail-safe processing.

Problems to be Solved by the Invention However, in the conventional example described above, a program is required to compare the data of each microprocessor, which increases the complexity, and also has the problem that data comparison cannot be performed at high speed. have.

SUMMARY OF THE INVENTION An object of the present invention is to provide a microcomputer chip operation tester that can easily test whether the operation of a microprocessor chip itself is normal at high speed.

Means for Solving the Problems According to the present invention, the above problems are solved by using a microprocessor that is the same as the microprocessor on the microprocessor application system side and whose normal operation is guaranteed, and a basic operation of both microprocessors. and a mismatch detection circuit that compares the data required for the data and detects a mismatch, and if the data do not match, the problem is resolved by determining that the operation of the microprocessor itself on the system side is abnormal.

Example Hereinafter, the present invention will be explained based on embodiments shown in the drawings.

(1) is a microprocessor application system, and has a microprocessor (2) as a central processing unit. The microprocessor (2) has an address bus (A)
The data in the memory corresponding to the address issued is loaded onto the data bus (D) and read arithmetic processing is performed. In this case, the address bus (A) and data bus (D) are connected to the microprocessor (
2) certain processing is performed.

(3) is an operation tester for a microcomputer chip according to the present invention, which includes a microprocessor (4) that operates in the same way as the microprocessor (2) used in the application system (1), and Processor (
2) and the address signal on the address bus (A) output from the microprocessor (4), the data on the data bus (D), and the system control signal (S) are compared respectively, and if they do not match, a mismatch is output. It consists of a mismatch detection circuit (5) that outputs a signal.

The microprocessor (4) used in the operation tester (3) is guaranteed to operate normally, and this is a premise of the present invention. (6)
is a gate circuit which takes in data from the data bus (D) to the data bus of the microprocessor (4), and the taking in is controlled by a timing circuit (7). The timing circuit (7) is an AND gate (8)
This is a logic circuit consisting of an OR gate (9).

The mismatch output from the mismatch detection circuit (5) is sent as a wait (W) signal to the microprocessors (2) and (4).
), both microprocessors (2,
4) is in a standby state.

In this way, the operation tester (3) is in the form of a unit assembled with hardware, and the tester (3) may be attached when operating the system (1), or it may be fixed. It may be made to be worn.

Note that the microprocessor (2) of the system (1) and the microprocessor (4) of the operation tester (3) operate in synchronization with the clock signal from the clock pulse generation circuit (10). The microprocessor (4) in the device (3) only operates to check the operation of the microprocessor (2) itself, and does not perform any other processing such as operating input/output devices. be. Therefore, there is no need for any special program or the like to check the microprocessor (2).

Function Next, to explain its operation, the address bus (A), data bus (D), and system control signal (S) of the system (1) are connected to the mismatch detection circuit (5) of the operation tester (3).
), and from the microprocessor (4) which is guaranteed to operate in the same way as the microprocessor (2) of the system (1), the buses (A, D) and signals (S) The same one is input to the mismatch detection circuit (5). The data sequentially inputted to the mismatch detection circuit (5) are compared using the clock signal from the clock pulse generation circuit (10), and if the data match, the system (1) continues as usual. It operates and performs each process. However, when the data etc. are compared in the mismatch detection circuit (5) and a mismatch occurs, it continues to generate an output signal indicating a mismatch, and the output signal is a wait signal (W).
As a result, the microprocessors (2) and (4) are placed in a standby state. With this, the operation tester (3)
Since the microprocessor (4) in the system (1) is guaranteed to operate normally, it can be determined that the microprocessor (2) in the system (1) is abnormal. That is,
By using the operation tester (3), the system (1)
) can quickly detect whether the microprocessor (2) on the system (1) side is normal or abnormal.

As described above, according to the present invention, normal operation is guaranteed;
In addition, using the same microprocessor as the system side microprocessor, we have made it possible to compare each data etc. with a discrepancy detection circuit, and if there is a discrepancy, it can be detected that the system side microprocessor is abnormal.
It is possible to easily detect the normality or abnormality of a microprocessor chip while operating a microcomputer application system, and it does not require special programs required for systems that operate each microprocessor in another system, using a simple device. It has the advantage of being able to process at high speed.

[Brief explanation of drawings]

The figure is a circuit diagram of a system using an operation tester according to the present invention. (1) Two microprocessor application systems, (2,4)
: Microprocessor, (5) : Mismatch detection circuit.

Claims (1)

[Scope of Claims] [1] A microprocessor (4) that is the same as the microprocessor (2) on the side of the microprocessor application system (1) and whose normal operation is guaranteed, and both microprocessors (2, 4) and a discrepancy detection circuit (5) that compares data necessary for the basic operation of the system and detects a discrepancy, and if the two data do not match, the microprocessor (2) itself on the system (1) operates. An operation tester for a microcomputer chip, characterized in that the tester detects an abnormality.