JPS61198625A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS61198625A JPS61198625A JP19692285A JP19692285A JPS61198625A JP S61198625 A JPS61198625 A JP S61198625A JP 19692285 A JP19692285 A JP 19692285A JP 19692285 A JP19692285 A JP 19692285A JP S61198625 A JPS61198625 A JP S61198625A
- Authority
- JP
- Japan
- Prior art keywords
- infrared lamp
- ion
- irradiation
- substrate
- annealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 238000010438 heat treatment Methods 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 13
- 150000002500 ions Chemical class 0.000 claims description 10
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims description 3
- 238000000137 annealing Methods 0.000 abstract description 23
- 238000005468 ion implantation Methods 0.000 abstract description 13
- 239000013078 crystal Substances 0.000 abstract description 12
- 230000004913 activation Effects 0.000 abstract description 9
- 230000007547 defect Effects 0.000 abstract description 8
- 238000009826 distribution Methods 0.000 abstract description 5
- -1 GaAs compound Chemical class 0.000 description 8
- 239000010453 quartz Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000010521 absorption reaction Methods 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000005224 laser annealing Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 150000003376 silicon Chemical class 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、半導体装置の製法に関し、特にイオン注入さ
れた半導体基体に対して短時間加熱により電気的活性化
領域を形成せんとするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly to forming an electrically active region in a semiconductor substrate into which ions have been implanted by heating for a short time.
イオン注入領域の結晶欠陥を回復させ注入原子を電気的
に活性化させるための従来技術としては、電気炉を用い
て加熱する方法が代表される。この方法はイオン注入さ
れた半導体基板を多数枚石英ボード等にセットし、電気
炉内にて例えば８００〜１２００℃の晶温で１０分間以
上の加熱処理で電気的活性領域を形成するものである。A typical conventional technique for recovering crystal defects in an ion-implanted region and electrically activating implanted atoms is a heating method using an electric furnace. In this method, a large number of ion-implanted semiconductor substrates are set on a quartz board, etc., and electrically active regions are formed by heat treatment in an electric furnace at a crystal temperature of, for example, 800 to 1200°C for 10 minutes or more. .
この方法は、大量処理できるという事で生産的ではある
が、一方被加熱体の熱容量が大きい為に短時間の加熱で
は形成される電気的活性層にバラツキが生じてしまう。This method is productive because it can be processed in large quantities, but on the other hand, because the heat capacity of the object to be heated is large, short-term heating causes variations in the electrically active layer formed.
又、イオン注入領域のプロファイルの制御性を半導体素
子作成に利用しようとしても、従来法による長時間加熱
ではイオン注入プロファイルの再分布現象が生じ、イオ
ン注入の利点が損なわれる。Further, even if it is attempted to utilize the controllability of the profile of the ion implantation region in the fabrication of semiconductor devices, long-time heating using the conventional method causes a redistribution phenomenon of the ion implantation profile, which impairs the advantages of ion implantation.
更に例えばＧａＡｓ化合物半導体のように熱的に不安定
な半導体装置の作製においては、高温、長時間の加熱に
よって基板構成元素であるＧａ、＾Ｓ等が蒸発し、表面
に変成層を形成する事によってイオン注入領域の電気的
活性化が損なわれるという問題がある。Furthermore, in the production of thermally unstable semiconductor devices such as GaAs compound semiconductors, the constituent elements of the substrate such as Ga and S may evaporate due to high temperature and long-term heating, forming metamorphic layers on the surface. There is a problem in that the electrical activation of the ion implanted region is impaired by this.
一方、イオン注入領域の新しい加熱処理法即ちアニール
法として、例えばレーザアニール法が検討されている。On the other hand, a laser annealing method, for example, is being considered as a new heat treatment method, that is, an annealing method, for the ion implantation region.
このレーザアニール法は極く短時間（ｎ５ｅｃ” ｍ５
ｅｃ）にイオン注入領域を電気的に活性できるものとし
て研究されているが、そのメカニズムはレーザ光のもつ
エネルギーを半導体基体が吸収し、熱エネルギーに変換
して加熱処理されるものとされている。しかし、この場
合には当然吸収係数のレーザ光波長依存性、半導体基板
の結品性（イオン注入量によって異なる）が吸収係数を
大きく左右し、アニールされる半導体基板によってレー
ザ出力を変えねばならないという欠点がある。又、５ｔ
（ｈ Ｓｉ構造、多結晶５ｔ−３ｉ構造等の如き多層
構造にレーザ光を照射してアニールする場合、例えばＳ
ｔ裏表面のレーザ光の反射があり、レーザ光波長とＳｉ
上の５ｔ（ｈ 膜厚等で決定される干渉効果があり、同
時にアニールに必要なレーザ出力が異なってしまう、さ
らに、レーザアニールの現状は数ｌＯμ曙に集束したレ
ーザビームをＸ−Ｙの走査で半導体基体を均一に７ニー
ルしていくが、レーザ光のふらつき等もあって均一にア
ニールできない、なお大口径レーザで半導体基板に照射
できればよいが、この場合には非常に大きなレーザ出力
が必要となる。This laser annealing method is extremely short (n5ec” m5
ec) has been researched as a device that can electrically activate the ion-implanted region, and the mechanism is that the semiconductor substrate absorbs the energy of the laser beam, converts it into thermal energy, and heats it. . However, in this case, the dependence of the absorption coefficient on the wavelength of the laser light and the integrity of the semiconductor substrate (which varies depending on the amount of ions implanted) greatly affect the absorption coefficient, and the laser output must be changed depending on the semiconductor substrate being annealed. There are drawbacks. Also, 5t
(h When a multilayer structure such as a Si structure or a polycrystalline 5t-3i structure is annealed by irradiating a laser beam, for example, S
There is a reflection of the laser beam on the back surface, and the laser beam wavelength and Si
5t(h) There is an interference effect determined by the film thickness, etc., and at the same time the laser output required for annealing differs.Furthermore, the current state of laser annealing is to scan a laser beam focused at several 10 μm in the X-Y direction. The semiconductor substrate is uniformly annealed for seven steps, but due to fluctuations in the laser light, it is not possible to anneal the semiconductor substrate uniformly.It would be better if the semiconductor substrate could be irradiated with a large diameter laser, but in this case a very high laser output is required. becomes.
本発明は、赤外ランプ光線照射による新しいアニール法
を用いてイオン注入領域の活性化を行い、上記問題点を
改善できるようにした半導体装置の製法を提供するもの
である。The present invention provides a method for manufacturing a semiconductor device that can improve the above-mentioned problems by activating an ion implantation region using a new annealing method using irradiation with infrared lamp light.
本発明においては、半導体基体の表面にイオン注入を行
って後、赤外ランプを用いて基体の両生面から０．４〜
４．０μｍの範囲で連続した波長分布をもつ赤外ランプ
光線を照射して加熱しイオン注入領域を活性化するもの
である。この赤外ランプ光線照射アニールによれば、従
来の電気炉アニールのｌ／１０〜１／ １００の短いア
ニール時間でイオン注入領域の電気的活性化が計れるも
のであり、上述した長時間アニールに伴う従来の諸問題
を解決することができる。又、赤外ランプ光線の照射は
数秒間なので、片面からだけの照射では基体に熱ひずみ
が生じストレスによる結晶欠陥を生じ易いが基体の両生
面から照射するので熱ひずみが生ぜず、結晶欠陥は生じ
ない。In the present invention, after ion implantation is performed on the surface of a semiconductor substrate, an infrared lamp is used to perform ion implantation on the surface of the substrate.
The ion implantation region is activated by irradiating and heating it with an infrared lamp beam having a continuous wavelength distribution in the range of 4.0 μm. According to this infrared lamp beam irradiation annealing, the ion-implanted region can be electrically activated in a short annealing time of 1/10 to 1/100 of the conventional electric furnace annealing. Conventional problems can be solved. In addition, since the irradiation with infrared lamp light is for several seconds, irradiation from only one side tends to cause thermal strain on the substrate and cause crystal defects due to stress, but since it is irradiated from both sides of the substrate, thermal strain does not occur and crystal defects occur. Does not occur.
以下、実施例を参照しながら本発明の詳細な説明する。Hereinafter, the present invention will be described in detail with reference to Examples.
第１図及び第２図は夫々本発明に適用される赤外線ラン
プ加熱装置の例である。第１図は楕円反射鏡による集光
加熱型であり、同図中（１１はアニールずべき被加熱体
、即ちイオン注入された半導体ウェーハ、（２）は半導
体ウェーハ（１１を載置して移動させる移動台である。1 and 2 are examples of infrared lamp heating devices applied to the present invention, respectively. Figure 1 shows a condensing heating type using an elliptical reflecting mirror. It is a mobile platform that allows you to
（３）はタングステン・ハロゲン・ランプで之より ０
．４〜４．０μ曽の波長の赤外ランプ光１［（４）が楕
円曲面の反射ａ（５）によって反射され、半導体ウェー
ハ１１）の面上に集光される。半導体ウェーハ（１）に
対する加熱は赤外線ランプ（３）からの赤外ランプ光線
（４）を反射鏡（５）を介してウェーハ（１）の面上に
集光させ移動台を所定の速度で移動させることによって
赤外ランプ光線スポットをウェーハ（１）の面上に走査
して行う。この場合ウェー八面上で直径３〜５ｆｉのス
ポット加熱（〜１０００℃）が可能となる。(3) is a tungsten halogen lamp.
．． Infrared lamp light 1 [(4) with a wavelength of 4 to 4.0 microns is reflected by the reflection a(5) of the ellipsoidal curved surface and is focused on the surface of the semiconductor wafer 11). The semiconductor wafer (1) is heated by concentrating an infrared lamp beam (4) from an infrared lamp (3) onto the surface of the wafer (1) via a reflecting mirror (5) and moving a moving stage at a predetermined speed. This is done by scanning the infrared lamp light spot onto the surface of the wafer (1). In this case, spot heating (up to 1000° C.) with a diameter of 3 to 5 fi is possible on eight sides of the wafer.
１４２図は放物面反射鏡による均−照射型であり、この
装置は石英管（６）内にサセプタ（７）を介してイオン
注入された半導体ウェーハ（１）が配置され、石英管（
６）の外側上下に放物面反射鏡（８）を具備する均一照
射の赤外線ランプ（３）が一対複数連（図は一対３連）
の構成をもって配されて成る。Figure 142 shows a uniform irradiation type device using a parabolic reflector, in which a semiconductor wafer (1) into which ions have been implanted is placed inside a quartz tube (6) via a susceptor (7).
6) A plurality of pairs of infrared lamps (3) with uniform irradiation equipped with parabolic reflectors (8) on the top and bottom of the outside (one pair and three in the figure)
It is arranged with the following configuration.
実施例（１）
第１図の集光加熱型装置を用いてイオン注入された半導
体基板のアニールを行い、そのイオン注入領域の結晶欠
陥の回復、注入原子の電気的活性化を測定した。試料は
ＣＺ５０〜１００Ω−■の結晶方位（１１１）のシリコ
ン基板を用い、このシリコン基板に２００ＫｅＶのリン
イオン（Ｐ＋）をｌ Ｘ ＩＱ１４ｏｎ−２゜ｌ Ｘ
１Ｇ” Ｑｌ−２室温注入した。赤外線ランプは波長０
．４〜４．０μｍであり定格出力１５０Ｗ、赤外ランプ
光線スポット径は３〜５ｆｌである。Example (1) A semiconductor substrate into which ions had been implanted was annealed using the condensing heating device shown in FIG. 1, and recovery of crystal defects in the ion implanted region and electrical activation of implanted atoms were measured. The sample used was a silicon substrate with crystal orientation (111) of CZ50-100Ω-■, and 200KeV phosphorus ions (P+) were applied to this silicon substrate.
1G” Ql-2 was injected at room temperature.The infrared lamp had a wavelength of 0.
．． The diameter is 4 to 4.0 μm, the rated output is 150 W, and the infrared lamp beam spot diameter is 3 to 5 fl.
結果は、Ｉ Ｘ １０” ３−２注入領域が０．６ｍ／
ｓｅｅの走査速度で充分に活性され、Ｉ Ｘ ＩＱ”
ａｍ−’注入領域が０．３ｍｍ ／ ｓｅｅの走査速度
で充分に活性された。従って赤外ランプ光線スポット径
（３〜５＋ｎ）を加味してＩＱ” ｃｓ−２，１０”
ｃｓ−”注入領域は１０秒前後の赤外ランプ光線照射で
活性化できる。The results show that the I x 10" 3-2 implant area is 0.6m/
fully activated at a scanning speed of see, I
The am-' injection region was fully activated at a scanning speed of 0.3 mm/see. Therefore, taking into account the infrared lamp beam spot diameter (3 to 5+n), the IQ is "cs-2.10"
cs-'' implanted region can be activated by irradiation with infrared lamp light for about 10 seconds.
実施例（２）
試料としＴＣＺ５０〜１００Ω−１の結晶方位（１１１
）のシリコン基板を用い、このシリコン基板に２００Ｋ
ｅＶのリンイオン（Ｐ＋）をＩ Ｘ １０１４Ｃ１１−
２注入した。Example (2) As a sample, the crystal orientation (111
) is used, and this silicon substrate is heated to 200K.
eV phosphorus ion (P+) I X 1014C11-
2 injections were made.
このイオン注入されたシリコン基板を第２図の均−照射
型の装置を用いてアニールし、イオン注入領域の電気的
活性化を測定した。測定結果は、９００℃、１分〜２分
の赤外ランプ光線照射でイオン注入領域が１００％活性
化され、且つ基板内のシート抵抗のバラツキも２〜４％
以内に納められた。This ion-implanted silicon substrate was annealed using the uniform irradiation type apparatus shown in FIG. 2, and the electrical activation of the ion-implanted region was measured. The measurement results show that the ion implantation region is 100% activated by infrared lamp irradiation at 900°C for 1 to 2 minutes, and the variation in sheet resistance within the substrate is reduced to 2 to 4%.
It was delivered within.
ここで得られた活性化領域は、従来の電気炉アニールに
よる９００℃、１５分〜３０分で得られる活性化領域に
相当する。The activated region obtained here corresponds to the activated region obtained by conventional electric furnace annealing at 900° C. for 15 to 30 minutes.
実施例（３）
試料としてＣＺ５０〜１００Ω−１の結晶方位（１１１
）のシリコン基板を用い、このシリコン基板に２００Ｋ
ｅＶのリンイオン（Ｐ＋）、ボロンイオン（Ｂ＋）をＩ
Ｘ ＩＱ１５ｃｓ−２注入した。このイオン注入され
たシリコン基板を第２図の均一照射型の装置を用いてア
ニールし、イオン注入領域の電気的活性化を測定した。Example (3) As a sample, a crystal orientation of CZ50 to 100Ω-1 (111
) is used, and this silicon substrate is heated to 200K.
eV phosphorus ion (P+), boron ion (B+) at I
X IQ15cs-2 was injected. This ion-implanted silicon substrate was annealed using the uniform irradiation type apparatus shown in FIG. 2, and the electrical activation of the ion-implanted region was measured.
結果は、リン及びボロンのｌ Ｘ １０” ａｌ −２
注入領域が１０００℃、１０〜３０秒の短時間加熱で充
分活性化され、且つ基板内のシート抵抗のバラツキも０
．５％前後に納められた。The result is l x 10” al −2 of phosphorus and boron
The implanted region can be sufficiently activated by heating at 1000℃ for a short time of 10 to 30 seconds, and there is no variation in sheet resistance within the substrate.
．． It was paid around 5%.
Ｆ記の表は本発明の赤外ランプ光線アニール（１，Ｒ）
と従来の電気炉アニールと接合深さの測定結果を示す、
尚、試料はＣＺ４０〜８０Ω−ロの結晶方位（１１１）
のｎ型シリコン基扱に２００ＫｅＶのボロンイオン（Ｂ
＋）を１．ＯＸ １０” ｏｎ−２注入したものを使用
した。Table F shows the infrared lamp ray annealing (1, R) of the present invention.
and conventional electric furnace annealing and bonding depth measurement results,
In addition, the sample has a crystal orientation of CZ40~80Ω-Ro (111)
200 KeV boron ion (B
+) 1. OX 10'' on-2 injection was used.
尚、上側の赤外線ランプ加熱装置に於ては第２図の均一
照射型の装置の方が集光加熱型に比べて実用的である。As for the upper infrared lamp heating device, the uniform irradiation type device shown in FIG. 2 is more practical than the condensing heating type device.
この場合、使用に際しては半導体ウェーハ（１）を石英
管（６）内に入れ、Ｎ２ガスを流して半導体ウェーハ（
１）に酸化膜が形成されないようにしているが、石英の
赤外線吸収率が低いので、加熱は通常の電気炉のように
石英管を介してなされるものでなく、この為石英加熱に
よるＮ＋などの汚染が少ない、又、第１図及び第２図の
夫々の赤外線ランプ加熱装置においては半導体ウェーハ
（１）に熱電対（９）を取付け、赤外ランプ光線照射に
よる加熱温度を検出して任意の設定温度、設定加熱時間
に制御し、加熱条件をより好条件とするようになすこと
もできる。第２図の場合には半導体ウェーハと同一の熱
容量を持つ基板に熱電対を埋込んで制御する事も可能で
ある。又、これらの赤外線ランプ加熱装置はイオン注入
機に組込み、イオン注入された半導体ウェーハを大気中
に取り出す事なく、イオン注入機内で加熱し電気的活性
化領域を形成することも出来る。さらに、半導体ウェー
への保持は、石英のリングの内周に設けられた３本又は
４本の細い突起によって中空に支持される。このとき上
下に２枚重ねてもよい。これによって半導体ウェーハの
みを（熱容量が少いので）瞬間的に加熱する（ １００
０℃／ ４ ｓｅｃ ）ことができる。加熱温度は照射
時間を決めるだけでよく、熱電対などによる温度の制御
を要しない。照射時間は数ｓｅｃである。半導体ウェー
ハのみを均一に加熱するのでウェーハ面内の均一性がよ
（、反りも少い。又炉芯管内壁からの汚染の問題がない
。赤外ランプ光線照射部をウェーハが移動していくよう
にすれば、加熱工程を自動化することができる。In this case, when using the semiconductor wafer (1), place it in the quartz tube (6), flow N2 gas, and put the semiconductor wafer (1) into the quartz tube (6).
1) However, since quartz has a low infrared absorption rate, heating is not done through a quartz tube like in a normal electric furnace. In addition, in the infrared lamp heating devices shown in Figures 1 and 2, a thermocouple (9) is attached to the semiconductor wafer (1) to detect the heating temperature caused by the infrared lamp irradiation. It is also possible to make the heating conditions more favorable by controlling the temperature and heating time to a set temperature and a set heating time. In the case of FIG. 2, it is also possible to control the thermocouple by embedding it in a substrate having the same heat capacity as the semiconductor wafer. Furthermore, these infrared lamp heating devices can be incorporated into an ion implanter to heat the ion-implanted semiconductor wafer within the ion implanter and form an electrically active region without taking the ion-implanted semiconductor wafer out into the atmosphere. Further, the holding to the semiconductor wafer is supported in the hollow by three or four thin protrusions provided on the inner periphery of the quartz ring. At this time, two sheets may be stacked one above the other. This instantaneously heats only the semiconductor wafer (because its heat capacity is small) (100
(0°C/4 sec). The heating temperature only needs to be determined by the irradiation time, and there is no need to control the temperature using a thermocouple or the like. The irradiation time is several seconds. Since only the semiconductor wafer is heated uniformly, there is good uniformity within the wafer surface (and there is little warpage. Also, there is no problem of contamination from the inner wall of the furnace core tube.The wafer moves through the infrared lamp irradiation section. By doing so, the heating process can be automated.
上述の本発明によれば、赤外線ランプを用いてイオン注
入された半導体基体に対して赤外ランプ光線を照射し加
熱することにより、高温、短時間でイオン注入領域の電
気的活性化ができ、且つ赤外ランプ光線の均一照射によ
り半導体基体内のシート抵抗の均一性も得られる。アニ
ール時間は従来の電気炉アニールのｌ／１０〜１／ １
００であり、従ってイオン注入分布を再分布させずに活
性化することができ、より浅い接合の形成が可能となる
。According to the present invention described above, the ion-implanted region can be electrically activated at high temperature in a short time by irradiating and heating the semiconductor substrate into which ions have been implanted using an infrared lamp, and In addition, uniform irradiation of the infrared lamp beam also provides uniform sheet resistance within the semiconductor substrate. Annealing time is 1/10 to 1/1 of conventional electric furnace annealing.
00, therefore, activation can be performed without redistributing the ion implantation distribution, making it possible to form a shallower junction.
特にボロン注入領域の場合は注入分布の制御、浅い接合
形成が可能となる。Particularly in the case of boron implanted regions, it is possible to control the implantation distribution and form shallow junctions.
又、例えばＧａＡｓ化合物半導体の如く熱的に不安定な
半導体装置の作製においても、赤外ランプ光線照射アニ
ールによって短時間でイオン注入領域の活性化が行われ
るので、Ｇａ、＾Ｓの蒸発が抑えられる変成層の形成が
阻止でき、イオン注入領域の活性化が損なわれない。Furthermore, even in the production of thermally unstable semiconductor devices such as GaAs compound semiconductors, the ion implantation region is activated in a short time by infrared lamp irradiation annealing, which suppresses the evaporation of Ga and S. This prevents the formation of a metamorphic layer, and the activation of the ion-implanted region is not impaired.
又、５ｉ−ＳｉＯ２構造、多結晶５ｉ−５ｔ構造等の如
き多層構造のアニールに本発明の赤外ランプ光線照射゛
７二−ルを通用した場合赤外ランプ光線波長が０．４〜
４．０μ醜の広範囲にあるためにレーザアニールで問題
となる波長干渉効果は無視できる。Furthermore, when the infrared lamp beam irradiation of the present invention is applied to annealing a multilayer structure such as a 5i-SiO2 structure, a polycrystalline 5i-5t structure, etc., the wavelength of the infrared lamp beam is 0.4~
The wavelength interference effect, which is a problem in laser annealing, can be ignored because it is over a wide range of 4.0 μm.
又、半導体基体の両生面から赤外ランプ光線を照射する
ので、基体に熱ひずみは生ぜず、熱ひずみによる結晶欠
陥を生じることな（、良好なアニール処理ができる。（
尚、従来のレーザー、Ｘｅランプアニールでは、極短時
間であったので熱吸収は表面部のみであり、片面照射で
も熱ひずみは問題とならなかった。）
さらに、赤外ランプ光線照射アニールは省エネルギーで
且つ半導体基体を均一にアニールできる。In addition, since the infrared lamp beam is irradiated from both sides of the semiconductor substrate, no thermal strain occurs on the substrate, and a good annealing process can be performed without causing crystal defects due to thermal strain.
In addition, in the conventional laser and Xe lamp annealing, the heat absorption was only in the surface area because the annealing time was extremely short, and thermal distortion did not become a problem even with single-sided irradiation. ) Furthermore, infrared lamp irradiation annealing is energy-saving and can uniformly anneal the semiconductor substrate.
即ち、半導体基体内の活性化のバラツキを１％以下に抑
えることができる。That is, the variation in activation within the semiconductor substrate can be suppressed to 1% or less.
さらに又赤外ランプ光線照射アニールは熱応答の早さか
ら極めて短時間に昇温出来（現在〜１００℃／ｓｅｃで
昇温可能）、また高温短時間の制御が容易である。従っ
て本発明はイオン注入層からの拡散現象の解明、結晶性
回復、２次欠陥の成長等の解析にも活用できる。Furthermore, infrared lamp irradiation annealing can raise the temperature in an extremely short time due to its quick thermal response (currently, it is possible to raise the temperature at ~100° C./sec), and it is easy to control the high temperature and short time. Therefore, the present invention can also be utilized for elucidating diffusion phenomena from ion-implanted layers, analyzing crystallinity recovery, growth of secondary defects, etc.
尚、本発明においては、例えば４００〜６００℃、ＩＯ
分〜１時間の熱処理を施した後、１０００℃、１０秒の
熱処理を行う所ＦＷ２段階アニールを行うことも可能で
あり、この場合には理論注入キャリア分布を得ることが
出来る。In addition, in the present invention, for example, 400 to 600°C, IO
It is also possible to perform a FW two-step annealing in which heat treatment is performed for minutes to 1 hour, followed by heat treatment at 1000° C. for 10 seconds, and in this case, the theoretical injection carrier distribution can be obtained.
第１図及び第２図は夫々本発明に通用される赤外線ラン
プ加熱装置の例を示す配置図である。
（１１は被加熱体、（３）は赤外線ランプ、（４）は赤
外ランプ光線、（９）は熱電対である。FIGS. 1 and 2 are layout diagrams showing examples of infrared lamp heating devices applicable to the present invention, respectively. (11 is an object to be heated, (3) is an infrared lamp, (4) is an infrared lamp beam, and (9) is a thermocouple.
Claims (1)
から赤外ランプ光線を照射して加熱し、イオン注入領域
を活性化することを特徴とする半導体装置の製法。1. A method for manufacturing a semiconductor device, which comprises implanting ions into the surface of a semiconductor substrate, heating the substrate by irradiating infrared lamp light from both main surfaces of the substrate, and activating the ion-implanted region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19692285A JPS61198625A (en) | 1985-09-06 | 1985-09-06 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19692285A JPS61198625A (en) | 1985-09-06 | 1985-09-06 | Manufacture of semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16374679A Division JPS56100412A (en) | 1979-12-17 | 1979-12-17 | Manufacture of semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP549788A Division JPS63170916A (en) | 1988-01-13 | 1988-01-13 | Infrared lamp heating apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61198625A true JPS61198625A (en) | 1986-09-03 |
| JPH0210569B2 JPH0210569B2 (en) | 1990-03-08 |
Family
ID=16365898
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19692285A Granted JPS61198625A (en) | 1985-09-06 | 1985-09-06 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61198625A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003338561A (en) * | 2002-05-20 | 2003-11-28 | Hynix Semiconductor Inc | Method for forming transistor of semiconductor device |
| US7381598B2 (en) | 1993-08-12 | 2008-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| JP2016207505A (en) * | 2015-04-23 | 2016-12-08 | 日本碍子株式会社 | Infrared heater and infrared processing apparatus |
-
1985
- 1985-09-06 JP JP19692285A patent/JPS61198625A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7381598B2 (en) | 1993-08-12 | 2008-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| JP2003338561A (en) * | 2002-05-20 | 2003-11-28 | Hynix Semiconductor Inc | Method for forming transistor of semiconductor device |
| JP2016207505A (en) * | 2015-04-23 | 2016-12-08 | 日本碍子株式会社 | Infrared heater and infrared processing apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0210569B2 (en) | 1990-03-08 |
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