JPS61195415A - Constant voltage power supply - Google Patents
Constant voltage power supplyInfo
- Publication number
- JPS61195415A JPS61195415A JP3679685A JP3679685A JPS61195415A JP S61195415 A JPS61195415 A JP S61195415A JP 3679685 A JP3679685 A JP 3679685A JP 3679685 A JP3679685 A JP 3679685A JP S61195415 A JPS61195415 A JP S61195415A
- Authority
- JP
- Japan
- Prior art keywords
- current
- load
- fet
- power supply
- constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241000277331 Salmonidae Species 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は定電圧電源装置の改良に関する。。[Detailed description of the invention] [Industrial application field] The present invention relates to improvements in constant voltage power supplies. .
本発明は、演算増幅器の出力端子と反転入力端子とを接
続すると共に、非反転入力端子に基準電圧を供給するよ
うにした定電圧電源装置におい1負荷電流の固定電流成
分を出力端子と外部電源との間に接続した定電流源に分
担させ、演算増幅器の出力トランジスタの負担を軽くし
、入力静電容量を減少させることによって、高周波特性
及び安定性を向上させるようにしたものである。The present invention provides a constant voltage power supply device that connects the output terminal of an operational amplifier to an inverting input terminal and also supplies a reference voltage to a non-inverting input terminal. This reduces the load on the output transistor of the operational amplifier and reduces the input capacitance, thereby improving high frequency characteristics and stability.
従来、第3図に示すように、演算増幅器(1)の非反転
入力端子(2)に入力電圧e4を供給すると共に、出力
端子(3)から反転入力端子に負帰還を施した場合、出
力電圧e0はe0=e<となって電圧利得が1の電圧ホ
ロワとなることが知られて−る。また、演算増幅器の非
反転入力端子に基準直流電圧Vr、。Conventionally, as shown in FIG. 3, when an input voltage e4 is supplied to the non-inverting input terminal (2) of an operational amplifier (1) and negative feedback is applied from the output terminal (3) to the inverting input terminal, the output It is known that the voltage e0 satisfies e0=e< and becomes a voltage follower with a voltage gain of 1. Also, a reference DC voltage Vr is applied to the non-inverting input terminal of the operational amplifier.
を接続して、出力端子から基準電圧に等し一直流電圧を
得るようにした定電圧電源装置も公知である。A constant voltage power supply device is also known in which a DC voltage equal to the reference voltage is obtained from the output terminal by connecting the two.
まず、第4図を参照しながら、このような定電圧電源装
置の具体的な構成例について説明する。First, a specific example of the configuration of such a constant voltage power supply device will be described with reference to FIG. 4.
第4図において、(イ)は差動増幅器を全体として示し
、との差動増幅器α4itt対のNチャンネルMO8F
ET (iυ及び(2)の各ソースが定電流源としての
NチャンネルMO8FET(2)のドレインに共に接続
されると共に、両PETαD及び(6)の各ドレインが
カレントミラー回路を構成する1対のPチャンネルMO
8FETα→及び(ト)の各ドレインにそれぞれ接続さ
れる。両FETα→及び(2)の各?−)はFET (
14のドレインに共通に接続されると共に、両FET
(1→及び(6)の各ソースは共に、所定の外部電源電
圧vDDが供給される電源端子TPに接続される。PE
T (Llのソースは接地され、r−トにはバイアス源
(図示を省略)から適宜のバイアス電圧が供給される。In FIG. 4, (A) shows the differential amplifier as a whole, and N-channel MO8F of the differential amplifier α4itt pair with
The sources of ET (iυ and (2) are connected together to the drain of N-channel MO8FET (2) as a constant current source, and the drains of both PETαD and (6) form a pair of current mirror circuits. P channel MO
It is connected to each drain of 8FETα→ and (G), respectively. Both FETα → and each of (2)? -) is FET (
14 drains in common, and both FETs
(1 → and (6) are both connected to a power supply terminal TP to which a predetermined external power supply voltage vDD is supplied.PE
The source of T(Ll) is grounded, and an appropriate bias voltage is supplied to r-t from a bias source (not shown).
まだ、FET(6)の?−1には基準電圧端子(財)か
ら所定の基準電圧V が供給される。この基準電圧Vr
、1 tief
電源電圧vDDよりも小さく設定される。また、基準電
圧端子αηは第4図の演算増幅器の非反転入力端子でも
あり、これと対をなす反転入力端子(ト)がFET a
Dのゲート及び出力端子(財)に接続されて負帰還ルー
プが形成さnる。なお、%MO8FETは同一の半導体
チップ上に集積される。Is it still FET (6)? -1 is supplied with a predetermined reference voltage V from a reference voltage terminal. This reference voltage Vr
, 1 tief is set smaller than the power supply voltage vDD. Further, the reference voltage terminal αη is also a non-inverting input terminal of the operational amplifier shown in FIG.
It is connected to the gate of D and the output terminal to form a negative feedback loop. Note that the %MO8FETs are integrated on the same semiconductor chip.
(2)は躯″m用の反転増幅器であって、Pチャンネル
MO8FIT 011とNチャンネルMO8FET(2
)のドレイン同士及びゲート同士がそれぞれ接続される
と共に、FIT (211のソースが電源端子TPに接
続され、FET 1221のソースが接地されて構成さ
れる。F’ET CI!11及び(2)のゲートは差動
増幅器(11のFET (121及び(151の各ドレ
インの接続中点Aに接続され、FE’lll及び@の各
ドレインの接続中点Bが出力制御用のNチャンネルMO
8PET @のゲートに接続される。FET(ハ)のド
レインは電源亀子TPに接続され、ソースは出力端子■
及び負荷(至)を介して接地される。(2) is an inverting amplifier for body ''m, which consists of P channel MO8FIT 011 and N channel MO8FET (2
) are connected to each other, and the source of FET (211) is connected to the power supply terminal TP, and the source of FET 1221 is grounded. The gate is connected to the connection midpoint A of each drain of the differential amplifier (11 FETs (121 and (151), and the connection midpoint B of each drain of FE'llll and @ is an N-channel MO for output control.
Connected to the gate of 8PET@. The drain of FET (c) is connected to the power supply Kameko TP, and the source is the output terminal ■
and grounded through the load.
このような構成の従来の定電圧電源装置の出力端子(至
)から負荷(ハ)に負荷電流ILが供給される。この場
合、負荷(ハ)が例えば多数の半導体素子を含む電子回
路から成り、その動作によって負荷電流ILが変動し【
も、前述の負帰還ループが存在するため、負荷(ハ)に
は一定の電圧vrefが供給され、電子回路は安定に動
作する。A load current IL is supplied from the output terminal (to) of the conventional constant voltage power supply device having such a configuration to the load (c). In this case, the load (c) is composed of an electronic circuit including a large number of semiconductor elements, and the load current IL varies depending on its operation.
Also, since the aforementioned negative feedback loop exists, a constant voltage vref is supplied to the load (c), and the electronic circuit operates stably.
ところで、上述のような従来の定電圧電源装置において
、負荷に)が大きくなると、電流を安定に供給するため
、出力FET g3並びにこれを駆動する駆動増幅器−
の各FET@、(2)の駆動能力、即ち、各FETの電
流容量を負荷電の大きさに見合って大きくしなければな
らない。MOSFETの場合、電流容量はFET自体の
電極の面積(幅)に比例するので、FET @1) 、
(2)及び(至)の電流駆動能力を高めるためには、各
FE11.@ 、(財)の面積(幅)を大きくしなけれ
ばならな−。By the way, in the conventional constant voltage power supply device as described above, when the load becomes large, in order to stably supply current, the output FET g3 and the drive amplifier that drives it are
The drive capability of each FET@, (2), that is, the current capacity of each FET, must be increased in accordance with the magnitude of the load current. In the case of MOSFET, the current capacity is proportional to the area (width) of the electrode of the FET itself, so FET @1),
In order to increase the current drive capability of (2) and (to), each FE11. @, we have to increase the area (width) of (goods).
ところが、この面積の増大は直ちに各FET(2)。However, this increase in area immediately affects each FET (2).
(イ)及び(2)の静電容量(ハ)及び鋤の増大につな
がる。(a) and (2) lead to an increase in capacitance (c) and plow.
即ち、駆動増幅器(イ)の両FET 121)及び(イ
)の入力静電容量(2)は差動増幅器αQの負荷回路の
時定数τ、を決定し、大面積の出力PET(至)の入力
静電容量に)は駆動増幅器(イ)の負荷回路の時定数τ
、を決定する。That is, both FETs 121) of the drive amplifier (a) and the input capacitance (2) of the drive amplifier (a) determine the time constant τ of the load circuit of the differential amplifier αQ, and the large-area output PET (to) input capacitance) is the time constant τ of the load circuit of the drive amplifier (a)
, determine.
両静電容量四、@の値をそれぞれC26” 27とすれ
ば、C24<<C27であるから、上述の両持定数の関
係はτ、くτ1となる。このように、駆動増幅器(ホ)
の負荷回路の時定数τ、が大きいと、演算増幅器の高周
波特性が劣化して、定電圧電源装置としての制御動作が
負荷電流の急激な変動に追随できないという問題があつ
゛た。If the values of both capacitances 4 and @ are respectively C26''27, then C24<<C27, so the relationship between the above-mentioned constants is τ, τ1.In this way, the drive amplifier (H)
If the time constant τ of the load circuit is large, the high frequency characteristics of the operational amplifier deteriorate, causing a problem that the control operation as a constant voltage power supply cannot follow rapid fluctuations in the load current.
また、負荷に)Kもかな〕大きな静電容量がちシ、これ
によって負荷(2)の時定数τ1が定まる。このτ。The load also has a large capacitance, which determines the time constant τ1 of the load (2). This τ.
と上述のτ、及びτ、の3つの時定数が接近すると、定
電圧電源装置が不安定な状態にな)、甚しい場合には発
振してしまうので、位相等化のような煩瑣な対策を施さ
なければならないという問題があった。When the three time constants τ, τ, and τ mentioned above become close to each other, the constant voltage power supply becomes unstable), and in severe cases, it may oscillate, so it is necessary to take complicated measures such as phase equalization. The problem was that it had to be done.
かかる点に鑑み、本発明の目的は、高周波特性及び安定
性のよい定電圧電源装置を提供するところにある。In view of this, an object of the present invention is to provide a constant voltage power supply device with good high frequency characteristics and stability.
本発明は、外部電源?、に接続された出方トランジスタ
(至)を含む演算増幅器の出力端子−と反転入力端子α
・とを接続すると共に、非反転入力端子(財)に基準電
圧vrdを供給して、出力端子(財)から基準電圧vr
efに等しい電圧の負荷電流!、が得られるようになさ
れた定電圧電源装置において、外部電源T、と出力端子
(ハ)との間に定電流回路(ロ)を接続し、
この定電流回路(ロ)を介して負荷電流11の固定電流
成分1.を供給すると共に、
演算増幅器の出力トランジスタ(至)を介して負荷電流
ILの変動電流成分!7を供給するようにした定電圧電
源装置である。Is this invention an external power source? , and the inverting input terminal α of the operational amplifier including the output transistor (to) connected to
・At the same time, supply the reference voltage vrd to the non-inverting input terminal (material), and output the reference voltage vr from the output terminal (material)
Load current with voltage equal to ef! In a constant voltage power supply device designed to provide 11 fixed current components 1. At the same time, the fluctuating current component of the load current IL is supplied through the output transistor (to) of the operational amplifier! This is a constant voltage power supply device that supplies 7.
かかる構成によれば、出力トランジスタ(2)の電流容
量を減少させることができて、入力静電容量が減少し、
高周波特性及び安定性が向上する。According to this configuration, the current capacity of the output transistor (2) can be reduced, the input capacitance is reduced,
High frequency characteristics and stability are improved.
以下、第1図及び第2図を参照しながら、本発明による
定電圧電源装置の一実施例について説明する。Hereinafter, one embodiment of a constant voltage power supply device according to the present invention will be described with reference to FIGS. 1 and 2.
本発明の一実施例の構成を第1図に示す。この第1図に
おいて、第3図に対応する部分には同一の符号を付して
重複説明を省略する・
第1図において、cIQは駆動増幅器であって、これを
構成するMOSFET 91及びに)は、第3図の従来
装置0FET(ハ)及び(2)と同様に接続されるが、
FIT 9ρ及びに)の捧の電流容量を有するようにな
されている。に)は緩衝出力用NチャンネルMO8FE
Tであって。FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, parts corresponding to those in FIG. 3 are given the same reference numerals and redundant explanations are omitted. In FIG. 1, cIQ is a drive amplifier, and the MOSFETs 91 and are connected in the same way as the conventional device 0FET (c) and (2) in FIG.
FIT is designed to have a current capacity of 9ρ and 2). ) is N-channel MO8FE for buffer output.
It's T.
第3図0FETに)と同様に接続されるが、FET q
の棒の電流容量を有するようになされている。(ロ)は
定電流源としてのPチャンネルMO8FETであって、
そのソース及び?レイーンがそれぞれ電源端子T、及び
出力端子−に夫々接続されると共に、そのf−)が直接
に接地される。このFIT(ロ)は、FET(至)と同
様に、fIL3図のFIT Elの強の電流容量を有す
るよう罠なされている。0FET in Figure 3), but with FET q
It is designed to have a current capacity of a bar. (b) is a P-channel MO8FET as a constant current source,
The source and? The lanes are respectively connected to the power supply terminal T and the output terminal -, and their f-) are directly grounded. This FIT (b), like the FET (to), is configured to have a strong current capacity of FIT El in the fIL3 diagram.
このように構成されているので1本笑施例においては、
第2図に示すように、その大きさが変動する負荷電流1
1のうち、その最大値の輪の固定電流成分IKが定電流
源としてのFICT e3J)から負荷(ハ)に供給さ
れると共に、負荷電流ILから固定電流成分!工を差引
いた残シの変動電流成分!7が出力F]iT(至)から
負荷に)に供給される。つtb、全負荷電流X。Since it is configured like this, in the example,
As shown in Figure 2, the load current 1 whose magnitude fluctuates
1, the fixed current component IK of the ring with the maximum value is supplied to the load (c) from the FICT e3J) as a constant current source, and the fixed current component IK of the ring with the maximum value is supplied from the load current IL! The fluctuating current component of the residual after subtracting the 7 is supplied from the output F]iT to the load. tb, full load current X.
が出力FET 03と定電流FIT(ロ)とで略竹ずつ
分担されるので両FET@及び−の□電流容量、即ちそ
の電極の面積(幅)はそれぞれ従来例の出力FITに)
のそれのWであればよい。従って、本実施例の出力FI
T(2)の入力静電容量(ロ)は従来例の出力FET0
1の入力静電容量(2)の捧に減少する。Since the output FET 03 and the constant current FIT (b) share approximately the same amount, the □ current capacity of both FETs @ and -, that is, the area (width) of their electrodes, is the same as that of the conventional output FIT.
It suffices if it is W of that. Therefore, the output FI of this embodiment
The input capacitance (b) of T(2) is the output FET0 of the conventional example.
The input capacitance (2) of 1 is reduced.
また、本実施例では、上述のように、出力FET(至)
の電流容量が従来例のそれの棒に減小するので。In addition, in this embodiment, as described above, the output FET (to)
Since the current capacity of is reduced to that of the conventional example.
出力FΣT(至)を駆動するFIT (It及び(至)
の電流容量、即ち電極面積も従来例の駆動増幅器■のF
ET(2)及び(イ)のそれのAであればよい。従って
、本実施例の駆動増幅器−のFET Cl0) 、(至
)の入力静電容量(至)は従来例rr)114動増幅器
(ホ)のFl’l’ @j 、 @O入力静電容量(2
)の棒に減少する。FIT (It and (to)) that drives the output FΣT (to)
The current capacity, that is, the electrode area is also F of the conventional drive amplifier ■.
Any A in ET (2) and (a) is sufficient. Therefore, the input capacitance (to) of the FET Cl0), (to) of the drive amplifier of this embodiment is equal to the input capacitance (to) Fl'l' @j, @O of the conventional example rr)114 dynamic amplifier (e). (2
) decreases to a bar.
このように、駆動増幅器■及び出力FET C(Iの入
力静電容量がそれぞれ竹に減少するので、本実施例にお
いては、差動増幅器(2)及び駆動増幅器(至)の負荷
回路の時定数もそれぞれ従来例のτ4.τ、からτ、/
2.τ、/2と小さくなシ、従来例と同一の電流供給能
力を保ちながら、高周波特性や安定性が向上する。In this way, since the input capacitances of the drive amplifier (2) and the output FET C (I) are respectively reduced, in this embodiment, the time constants of the load circuits of the differential amplifier (2) and the drive amplifier (to) are are respectively τ4.τ, to τ, / of the conventional example.
2. With a small τ of /2, high frequency characteristics and stability are improved while maintaining the same current supply capacity as the conventional example.
逆に、一定の高周波特性及び安定性を維持すればよい場
合には、電流供給能力が倍増する。Conversely, if it is sufficient to maintain constant high frequency characteristics and stability, the current supply capability will be doubled.
なお、本実施例においては、負荷電流!、の変動電流成
分Ivと固定電流成分X]cとが等しくされているが、
両成分の割合は負荷電流の変動状態に応じて適宜に設定
されることは言うまでもない。In addition, in this example, the load current! The variable current component Iv and the fixed current component X]c are made equal, but
It goes without saying that the ratio of both components is appropriately set depending on the fluctuation state of the load current.
また、上述の実施例においては、各MO8FET(l]
)〜(ト)、0傘〜(ロ)は相補的に構成されているが
、Pチャンネルのみ又はNチャンネルのみで各FETが
構成されてもよい。この場合、定電流源用FET (1
4をデプレッションfi FITとすれば良好な定電流
特性が得られる。In addition, in the above embodiment, each MO8FET (l]
) to (g) and 0 to (b) are configured in a complementary manner, but each FET may be configured with only a P channel or only an N channel. In this case, constant current source FET (1
If 4 is used as a depression fi FIT, good constant current characteristics can be obtained.
また、本発明による定電圧電源装置は、負荷電流の固定
電流成分を分担する定電流源回路がやや複雑になるが、
バイポーラトランジスタ忙よっても、上述の実施例と同
様に構成することができる。Further, in the constant voltage power supply device according to the present invention, the constant current source circuit that shares the fixed current component of the load current is somewhat complicated;
Even if a bipolar transistor is used, the structure can be similar to the above embodiment.
以上詳述のように、本発明によれば、負荷電流の固定電
流成分を定電流源に分担させて、出力トランジスタ等の
電流容量を減少させたので、この出力トランジスタ等の
電極面積、従って入力静電容量を減少させることができ
て、高周波特性及び安定性の向上した定電圧電源装置を
得ることができる。As described in detail above, according to the present invention, the fixed current component of the load current is shared by the constant current source to reduce the current capacity of the output transistor, etc., so that the electrode area of the output transistor, etc., and therefore the input A constant voltage power supply device with reduced capacitance and improved high frequency characteristics and stability can be obtained.
第1図は本発明による定電圧電源装置の一実施例を示す
結線図、第2図は本発明の説明に供する線図、第3図及
び第4図は従来の定電圧電源装置の基本的構成及び具体
的構成例を示す結線図であ(2)は反転入力端子、(ロ
)は非反転入力端子、鱒は出力端子、(ハ)は負荷、(
至)は出力FE’l’ 、(ロ)は定電流源用FET、
ILは負荷電流、I工は固定電流成分、!マは変動電流
成分、TFは外部電源端子、Vrefは基準電圧である
。Fig. 1 is a wiring diagram showing an embodiment of a constant voltage power supply according to the present invention, Fig. 2 is a diagram for explaining the present invention, and Figs. 3 and 4 are basic diagrams of a conventional constant voltage power supply. It is a wiring diagram showing a configuration and a specific configuration example. (2) is an inverting input terminal, (B) is a non-inverting input terminal, a trout is an output terminal, (C) is a load, (
(to) is the output FE'l', (b) is the constant current source FET,
IL is the load current, I is the fixed current component, ! MA is a fluctuating current component, TF is an external power supply terminal, and Vref is a reference voltage.
Claims (1)
器の出力端子と反転入力端子とを接続すると共に、非反
転入力端子に基準電圧を供給して、上記出力端子から上
記基準電圧に等しい電圧の負荷電流が得られるようにな
された定電圧電源装置において、 上記外部電源と上記出力端子との間に定電流回路を接続
し、 該定電流回路を介して上記負荷電流の固定電流成分を供
給すると共に、 上記演算増幅器の上記出力トランジスタを介して上記負
荷電流の変動電流成分を供給するようにしたことを特徴
とする定電圧電源装置。[Claims] An output terminal of an operational amplifier including an output transistor connected to an external power supply is connected to an inverting input terminal, and a reference voltage is supplied to a non-inverting input terminal, so that the reference voltage is output from the output terminal to the inverting input terminal. In the constant voltage power supply device, a constant current circuit is connected between the external power supply and the output terminal, and the fixed current of the load current is supplied through the constant current circuit. A constant voltage power supply device, characterized in that the constant voltage power supply device is configured to supply a variable current component of the load current through the output transistor of the operational amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3679685A JPS61195415A (en) | 1985-02-26 | 1985-02-26 | Constant voltage power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3679685A JPS61195415A (en) | 1985-02-26 | 1985-02-26 | Constant voltage power supply |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61195415A true JPS61195415A (en) | 1986-08-29 |
Family
ID=12479746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3679685A Pending JPS61195415A (en) | 1985-02-26 | 1985-02-26 | Constant voltage power supply |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61195415A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000039923A (en) * | 1998-07-23 | 2000-02-08 | Nec Corp | Voltage regulator |
JP2008129717A (en) * | 2006-11-17 | 2008-06-05 | New Japan Radio Co Ltd | Reference voltage circuit |
-
1985
- 1985-02-26 JP JP3679685A patent/JPS61195415A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000039923A (en) * | 1998-07-23 | 2000-02-08 | Nec Corp | Voltage regulator |
JP2008129717A (en) * | 2006-11-17 | 2008-06-05 | New Japan Radio Co Ltd | Reference voltage circuit |
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