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JPS61184687A - Control system of multilevel image magnification and reduction - Google Patents

Control system of multilevel image magnification and reduction

Info

Publication number
JPS61184687A
JPS61184687A JP60025653A JP2565385A JPS61184687A JP S61184687 A JPS61184687 A JP S61184687A JP 60025653 A JP60025653 A JP 60025653A JP 2565385 A JP2565385 A JP 2565385A JP S61184687 A JPS61184687 A JP S61184687A
Authority
JP
Japan
Prior art keywords
circuit
image
converted image
address
luminance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60025653A
Other languages
Japanese (ja)
Inventor
Masashi Nishide
西出 政司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60025653A priority Critical patent/JPS61184687A/en
Publication of JPS61184687A publication Critical patent/JPS61184687A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformations in the plane of the image
    • G06T3/40Scaling of whole images or parts thereof, e.g. expanding or contracting

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Studio Circuits (AREA)
  • Editing Of Facsimile Originals (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Processing (AREA)

Abstract

PURPOSE:To obtain an magnified/reduced image of excellent quality with simple circuitry by determining a luminance value of the converted image by the weighted average of the luminance values of the original image in the four points around the converted image and of the inverse number of the displacement of the point of the converted image from the said four points. CONSTITUTION:An address timing circuit 15 sets a converted image address (x+DELTAx, y+DELTAy) in a manner that its integer part x, y is in address holding circuits 11 and 13, and the decimal part DELTAx, DELTAy is in address holding circuits 12 and 14, also sets by means of a timing signal 26 the luminance value I1 of the original image from a 2-dimensional address memory circuit 10 in a holding circuit 16. Then the same circuit 15 sets I2 in a circuit 17 by setting x+1 in the circuit 11, I3 in a circuit 18 by setting x in the circuit 11 and y+1 in the circuit 13, and sets I4 in a circuit 19 by setting x+1 in the circuit 11 and y+1 in the circuit 13. Meanwhile, a distance- inverse generation table 20 generates the distance inverse numbers L1-L4 from DELTAx, DELTAy which are the multiplying numbers on the luminance values I1-I4 and outputs them. A data conversion table 21-24 outputs the products of I1L1-I4L4, which are added up by an adder 25. In result, the luminance I5 of the converted image of an accuracy equal to that of the original-image luminance I1-I4 is outputted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は濃淡を持った多値面1象データを拡大縮小す
るための多値画像拡大縮小制御方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multi-value image enlargement/reduction control method for enlarging/reducing multi-value plane single image data having shading.

〔従来の技術〕[Conventional technology]

第2図は画像の拡大縮小のアルゴリズムを説明するため
の図である。同図において、 +11.(2)、 +3
1゜(4)は原画像、 (51は変換画像で9図では+
11から(5)への水平方向の変位をdx、垂直方向の
変位をayとしている。変換面# (51から原画像(
2)または(4)への水平方向への変位は1− dx、
変換画像(5)から原画像(3)または(4)への垂直
方向への変位は1−(17である。また、原画像(1)
、 +21.131. +41の輝度値をそれぞれ工1
.工2.I3.工4.変換画像(5)の輝度値を15と
する。
FIG. 2 is a diagram for explaining an algorithm for enlarging and reducing an image. In the same figure, +11. (2), +3
1゜(4) is the original image, (51 is the converted image, + in Figure 9)
The horizontal displacement from 11 to (5) is dx, and the vertical displacement is ay. Conversion surface # (from 51 to original image (
2) or (4) horizontal displacement is 1-dx,
The vertical displacement from the converted image (5) to the original image (3) or (4) is 1 - (17).
, +21.131. +41 brightness value by 1
.. Engineering 2. I3. Engineering 4. The brightness value of the converted image (5) is assumed to be 15.

画像の拡大・縮小のアルゴリズムは、水平方向の変位A
x、垂直方向の変位6yおよび原画像d輝度値工1.工
2.工3.工4より変換画像の輝度値工5を決定する方
法であって、既にこの種のものとして数種のアルゴリズ
ムが提案されている@〔発明が解決しようとする問題点
〕 第1の方法は変換画像(5)に一番近い原画1象の輝度
値を工5とする方法で比較的簡単な回路で実現できる。
The image enlargement/reduction algorithm uses horizontal displacement A
x, vertical displacement 6y and original image d brightness value 1. Engineering 2. Engineering 3. This is a method of determining the brightness value of the converted image from step 4, and several algorithms of this kind have already been proposed. This can be realized with a relatively simple circuit by using the brightness value of the original image closest to image (5) as step 5.

しかし、この方法では縮小時にストロークが細くなり連
続性が失なわれるという問題点があった。
However, this method has a problem in that the stroke becomes thinner and continuity is lost during reduction.

第2の方法は輝度値工1.工2.工5.工4の論理和で
変換画像の輝度値工5を決定する方法で、これも比較的
簡単な回路で実現できるが、同じくストロークが太くな
り縮小時に図形のりぶれが目立つという問題点があった
The second method is luminance value processing 1. Engineering 2. Engineering 5. This method uses the logical sum of step 4 to determine the brightness value step 5 of the converted image, and this can also be realized with a relatively simple circuit, but it also has the problem that the stroke becomes thicker and the blurring of the figure becomes noticeable when it is reduced.

この他にもいくつかのアルゴリズムが提案されておシ上
記第1.第2の方法に比べ品質の良い画像が得られるが
その回路が複雑となるという問題点があった。
Several other algorithms have been proposed as well. Although a higher quality image can be obtained than the second method, there is a problem in that the circuit is complicated.

この発明は、上記のような問題点を解消するためになさ
れたもので、簡単な回路で品質の良い拡大縮小画像が得
られる多値画像拡大縮小制御方法を提供することを目的
とするものである。
This invention was made in order to solve the above-mentioned problems, and aims to provide a multi-valued image enlargement/reduction control method that can obtain high-quality enlarged/reduced images with a simple circuit. be.

〔問題点を解決するための手段〕[Means for solving problems]

この発明にかかる多値画像拡大縮小制御方法は。 A multi-valued image enlargement/reduction control method according to the present invention.

変換画像の周辺4点の原画像の輝度値を保持する手段と
、前記変換画像の周辺4点の原画像位置と変換画像位置
との間の距離の逆数をとる手段と。
means for holding the luminance values of the original image at four points around the converted image; and means for taking the reciprocal of the distance between the original image position and the converted image position at the four points around the converted image.

前記原画像の各輝度値と前記距離の逆数との加重平均を
とる手段とを備えたものである。
and means for taking a weighted average of each brightness value of the original image and the reciprocal of the distance.

〔作用〕[Effect]

上記手段により保持した原画像の輝度値と、上記手段、
により得た距離値の逆数とを上記加重平均をとる手段に
よυ加重平均し、変換画像の輝度値を決定する。
The brightness value of the original image held by the above means, and the above means,
The reciprocal of the distance value obtained by υ is weighted averaged by the above weighted averaging means to determine the luminance value of the converted image.

〔実施例〕〔Example〕

第1図においてαlは原画像を記憶するx、yの2次元
アドレスメモリ回路、(111,αz、0.α4は変換
画像の原画像におけるアドレスを保持するアドレス保持
回路で、変換画像のアドレスを(X+ΔX。
In Figure 1, αl is an x, y two-dimensional address memory circuit that stores the original image, (111, αz, 0. α4 is an address holding circuit that holds the address of the converted image in the original image, and (X+ΔX.

y+Δy)とするとαυにはX、C2にはΔX、13に
はy、C4)にはJyがそれぞれアドレス−タイミング
発生回路α9によりその各値が設定されるよ”5に構成
されている・ここで、  !、  7はそれぞれ変換画
像アドレスの整数部、ΔX’Δyは小数部である。
y+Δy), then X for αυ, ΔX for C2, y for 13, and Jy for C4), each value is set by the address-timing generation circuit α9. ! and 7 are the integer part of the converted image address, respectively, and ΔX'Δy is the decimal part.

(IS、aη、α秒、(1gは原画像データ保持回路で
、それぞれアドレス・タイミング回路α9が発生する保
持タイミング(ト)、 fi、 @、 C1!!lによ
シ原画像の輝度値工1.工2.工3.工4を保持する。
(IS, aη, α seconds, (1g is the original image data holding circuit, and the holding timing (g) generated by the address timing circuit α9, respectively), fi, @, C1!!l are the luminance value processing of the original image. 1. Work 2. Work 3. Hold work 4.

Qυ、勾、 C23,ff141はデータ変換テーブル
で、原画像の輝度値工1.工2゜工3.工4に対し距離
逆数発生テーブル■の発生する逆数”1 y L2 +
 IJ5 * TJ4をそれぞれ乗算するだめのテーブ
ルである。(ハ)は加算器でデータ変換テーブル3υ、
(2)、@、(財)の変換テーブルの出カニ1L1゜工
2L2.工3L3.工4L4  を加算し原画像の輝度
値工1゜工2.工5.工4と同一精度に切り捨てて変換
画像の輝度値工5を出力する。
Qυ, slope, C23, ff141 are data conversion tables, and the brightness values of the original image are calculated 1. Engineering 2゜ Engineering 3. The reciprocal number generated in the distance reciprocal generation table ■ for the process 4 is 1 y L2 +
This is a table for multiplying IJ5*TJ4. (c) is a data conversion table 3υ using an adder,
(2), @, (Foundation) conversion table output crab 1L1゜work 2L2. Engineering 3L3. Process 4L4 is added to obtain the luminance value of the original image Process 1° Process 2. Engineering 5. The brightness value of the converted image is rounded down to the same precision as step 4 and output as the brightness value step 5.

アドレス・タイミング発生回路a9は、変換画像アドレ
ス(X+Δ”+7+Δy)に対しαυにx、+13にΔ
X、03にy、C4にJyを設定し、タイミング信号(
4)により2次元アドレスメモリ回路α1の出力データ
エ1を原画像データ保持回路(Ieに設定する0その後
(11)に!+1を設定し工2を原画像データ保持回路
Oηに、またαυに!、Q3にy+1を設定し工3を原
画像データ保持回路(I8に、αυにx+1.C4にy
+1を設定し原画像データ保持回路a9に工4を設定す
る。一方、距離逆数発生テーブル■はΔX。
The address/timing generation circuit a9 generates x for αυ and Δ for +13 for the converted image address (X+Δ”+7+Δy).
Set y to X, 03, Jy to C4, and send the timing signal (
4), set the output data E1 of the two-dimensional address memory circuit α1 to the original image data holding circuit (Ie) 0, then set !+1 to (11), and set the output data E1 of the two-dimensional address memory circuit α1 to the original image data holding circuit Oη, and to αυ again! , set y+1 to Q3, and set 3 to the original image data holding circuit (I8, x+1 to αυ, y to C4
+1 is set, and 4 is set in the original image data holding circuit a9. On the other hand, the distance reciprocal generation table ■ is ΔX.

Jyより前記輝度値工1.工2.工3.工4に乗算すべ
き距離逆数値L1.II2.L5.L4を出力する。
From Jy, the luminance value processing 1. Engineering 2. Engineering 3. Distance reciprocal value L1 to be multiplied by 4. II2. L5. Output L4.

この場合例えばLlは下記のように決定される。In this case, for example, Ll is determined as follows.

距離逆数発生テーブル■はΔX、Δyの入力に対し1 
/  (Jc)’+’(Jy)’の近似値を出力するが
The distance reciprocal generation table ■ is 1 for the input of ΔX and Δy.
/ Outputs the approximate value of (Jc)'+'(Jy)'.

(Δ、)2+(Jy)2の値は0からbまで変化する。The value of (Δ,)2+(Jy)2 changes from 0 to b.

出力L1i1.Gに対してはLl−a、6に対してはL
j−0,その間の値に対してはこの回路に対して与えら
れた精度で4から0までの間を直線近似した値を採用し
て出力する@ΔI、Δyの代シに。
Output L1i1. Ll-a for G, L for 6
j-0, and for values in between, adopt values obtained by linear approximation between 4 and 0 with the precision given to this circuit, and output them in place of @ΔI and Δy.

1−Δx、1−Δyを用いることによシ距離逆数値L2
 y J 5xJ4は同様にして決定される。
By using 1-Δx and 1-Δy, the distance reciprocal value L2
y J 5xJ4 is determined in the same way.

データ変換テーブルate、(2)、■、 aaはそれ
ぞれ工1L1+ l2L2 t X5Ls + XaL
a e出力スル乗Nf −プルでその出力を加算器(ハ
)で加算し原画像の輝度値工1.工2.工3.工4 と
同一精度で変換画像の輝度値工5を出力する。
Data conversion tables ate, (2), ■, and aa are respectively
a e Output to the power Nf -Pull and add the output with an adder (c) to calculate the brightness value of the original image 1. Engineering 2. Engineering 3. The brightness value of the converted image is output with the same accuracy as step 4.

なお、上記実施例では距離逆数発生テーブル■の構造を
1/677F767戸により決定しているが、1/(Δ
x)2+(Jy)2を使用して距離の逆数ではなく面積
の逆数としてもよい。また、出力は距離0と乃の間を直
線補間したが、何らかの関数を用いて近似することも可
能である◇またこれらを組み合わせて用いてもよい。
In the above embodiment, the structure of the distance reciprocal generation table ■ is determined by 1/677F767 houses, but 1/(Δ
x)2+(Jy)2 may be used as the reciprocal of the area instead of the reciprocal of the distance. Further, although the output is linearly interpolated between distances 0 and 0, it is also possible to approximate using some kind of function◇Also, these may be used in combination.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明では単純な逆数テーブルと乗算テ
ーブルを用いて変換画像の輝度値を決定するようにした
ので簡単な回路で比較的画質の良い拡大縮小画1象を得
ることができる。
As described above, in this invention, the brightness value of the converted image is determined using a simple reciprocal table and a multiplication table, so that a single enlarged/reduced image with relatively good image quality can be obtained with a simple circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す多値画像拡大縮小制
御方法を実施するだめのブロック図、第2図は画f象の
拡大、縮小のアルゴリズムを説明するための説明図であ
る〇 図において、 cutは2次元アドレスメモリ回路。 αB、α2.αJ、α4はアドレス保持回路、 acj
はアドレス・タイミング発生回路、住e、 (171,
(Il、α値は原画1象デ一タ保持回路、■は距離逆数
発生テーブル。 Qυ、 H,@、 r241はデータ変換テーブル、(
ハ)は加算器である。
FIG. 1 is a block diagram for implementing a multivalued image enlargement/reduction control method showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram for explaining an algorithm for enlarging and reducing an image f. In the figure, cut is a two-dimensional address memory circuit. αB, α2. αJ, α4 are address holding circuits, acj
is the address/timing generation circuit, (171,
(Il, α value is the original image 1-image data holding circuit, ■ is the distance reciprocal generation table. Qυ, H, @, r241 is the data conversion table, (
C) is an adder.

Claims (1)

【特許請求の範囲】[Claims] 変換画像の周辺4点における原画像の輝度値と、原画像
位置4点と変換画像位置との変位の逆数とで加重平均し
変換画像の輝度値を決定することを特徴とする多値画像
拡大縮小制御方法。
A multivalued image enlargement characterized in that the brightness value of the converted image is determined by weighted averaging of the brightness values of the original image at four points around the converted image and the reciprocal of the displacement between the four original image positions and the converted image position. Reduction control method.
JP60025653A 1985-02-13 1985-02-13 Control system of multilevel image magnification and reduction Pending JPS61184687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60025653A JPS61184687A (en) 1985-02-13 1985-02-13 Control system of multilevel image magnification and reduction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60025653A JPS61184687A (en) 1985-02-13 1985-02-13 Control system of multilevel image magnification and reduction

Publications (1)

Publication Number Publication Date
JPS61184687A true JPS61184687A (en) 1986-08-18

Family

ID=12171777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60025653A Pending JPS61184687A (en) 1985-02-13 1985-02-13 Control system of multilevel image magnification and reduction

Country Status (1)

Country Link
JP (1) JPS61184687A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01112379A (en) * 1987-10-26 1989-05-01 Nippon Telegr & Teleph Corp <Ntt> Picture reducing and converting method
JPH01221058A (en) * 1988-02-29 1989-09-04 Matsushita Electric Ind Co Ltd Picture memory and picture processor
JPH01312671A (en) * 1988-06-10 1989-12-18 Hitachi Ltd Image processing device
JPH01321574A (en) * 1988-06-24 1989-12-27 Sony Corp Memory device
JPH03259193A (en) * 1990-03-08 1991-11-19 Teremateiiku Kokusai Kenkyusho:Kk Gray scale character display device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56123055A (en) * 1980-03-03 1981-09-26 Ricoh Co Ltd Picture processing method
JPS5884358A (en) * 1981-11-13 1983-05-20 Toshiba Corp Picture enlargement processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56123055A (en) * 1980-03-03 1981-09-26 Ricoh Co Ltd Picture processing method
JPS5884358A (en) * 1981-11-13 1983-05-20 Toshiba Corp Picture enlargement processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01112379A (en) * 1987-10-26 1989-05-01 Nippon Telegr & Teleph Corp <Ntt> Picture reducing and converting method
JPH01221058A (en) * 1988-02-29 1989-09-04 Matsushita Electric Ind Co Ltd Picture memory and picture processor
JPH01312671A (en) * 1988-06-10 1989-12-18 Hitachi Ltd Image processing device
JPH01321574A (en) * 1988-06-24 1989-12-27 Sony Corp Memory device
JPH03259193A (en) * 1990-03-08 1991-11-19 Teremateiiku Kokusai Kenkyusho:Kk Gray scale character display device

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