JPS61179506U - - Google Patents
Info
- Publication number
- JPS61179506U JPS61179506U JP4555185U JP4555185U JPS61179506U JP S61179506 U JPS61179506 U JP S61179506U JP 4555185 U JP4555185 U JP 4555185U JP 4555185 U JP4555185 U JP 4555185U JP S61179506 U JPS61179506 U JP S61179506U
- Authority
- JP
- Japan
- Prior art keywords
- protrusions
- optical fiber
- substrate
- areas
- density
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013307 optical fiber Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 4
- 230000002265 prevention Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
Landscapes
- Mechanical Coupling Of Light Guides (AREA)
- Cable Accessories (AREA)
Description
第1図は、本考案の第1実施例の基板1を取付
けた光フアイバー接続箱Bの平面図、第2図は、
同じく基板1の部分斜視図、第3図は、第1図の
X−X線拡大断面図、第4図イは、抜け出し防止
具C1の斜視図、同ロは、抜け出し防止具C1を
突起体2に嵌め込んだ状態の断面図、第5図は、
抜け出し防止具C2を突起体2に嵌め込んだ状態
の断面図、第6図は、本考案の第2実施例の基板
1′を取付けた光フアイバー接続箱B′の平面図
、第7図イは、従来の光フアイバー接続箱B′の
平面図、同ロは、同イのY−Y線拡大断面図、同
ハは同イのZ−Z線拡大断面図である。
(主要部分の符号の説明)、1,1′:基板、
2:突起体、3:補強管、6:光フアイバーのコ
ード、A1:基板1の中央部、A2:基板1の上
部、A3:基板1の下部、A4:基板1′の上半
部、A5:基板1′の下半部。
FIG. 1 is a plan view of an optical fiber junction box B to which a substrate 1 according to the first embodiment of the present invention is attached, and FIG.
Similarly, FIG. 3 is a partial perspective view of the substrate 1, FIG. 3 is an enlarged sectional view taken along the line X-X of FIG. 1, FIG. Figure 5 is a cross-sectional view of the state in which it is fitted into 2.
FIG. 6 is a cross-sectional view of the slip-out prevention device C2 fitted into the protrusion 2, and FIG. 1 is a plan view of a conventional optical fiber junction box B', 2 is an enlarged sectional view taken along the Y-Y line of 1, and 3 is an enlarged sectional view taken along the Z-Z line of 1. (Explanation of symbols of main parts), 1, 1': board,
2: Protrusion, 3: Reinforcement tube, 6: Optical fiber cord, A1: Center of board 1, A2: Upper part of board 1, A3: Lower part of board 1, A4: Upper half of board 1', A5 : Lower half of board 1'.
Claims (1)
護するための無数本の突起体を基板に形成し、こ
の突起体の密度を部分的に異ならしめて、接続さ
れた光フアイバーのコードの直線部およびわん曲
部をそれぞれ突起体の密度が密な部分および疎な
部分に挿入するように構成したことを特徴とする
光フアイバー接続箱用基板。 Numerous protrusions are formed on the substrate to insert and protect the connected optical fiber cords, and the density of these protrusions is made partially different so that the straight and dovetail parts of the connected optical fiber cords can be inserted and protected. 1. A substrate for an optical fiber junction box, characterized in that the curved portions are configured to be inserted into areas where the density of protrusions is dense and areas where the protrusions are sparse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4555185U JPS61179506U (en) | 1985-03-28 | 1985-03-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4555185U JPS61179506U (en) | 1985-03-28 | 1985-03-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61179506U true JPS61179506U (en) | 1986-11-08 |
Family
ID=30559152
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4555185U Pending JPS61179506U (en) | 1985-03-28 | 1985-03-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61179506U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5941319B2 (en) * | 1979-04-23 | 1984-10-05 | ウエスタ−ン エレクトリツク カムパニ−,インコ−ポレ−テツド | Multilayer printed circuit board processing |
-
1985
- 1985-03-28 JP JP4555185U patent/JPS61179506U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5941319B2 (en) * | 1979-04-23 | 1984-10-05 | ウエスタ−ン エレクトリツク カムパニ−,インコ−ポレ−テツド | Multilayer printed circuit board processing |