JPS61174773A - Manufacture of field effect transistor - Google Patents

Abstract

PURPOSE:To form the junction between an operating layer and a gate electrode stably and with good reproducibility, by forming the metal thin film of a high melting point gate on the surface of a semi-insulating substrate, and thereafter forming the operating layer through the metal thin film. CONSTITUTION:A WSi thin film 3a is formed on an semi-insulating GaAs 1. A resist mask 8 is applied. Si ions are implanted and an (n) layer 2 is formed. The resist 8 is removed, and a W gate 3b is formed. Si ions are implanted through the thin film 3a, and an n<+> source and a drain 4 and 5 are formed. Then, with the gate pattern 3b as a mask, the thin film 3a is etched away. SiO2 9 is applied and electrodes 6 and 7 are attached. In this method, contamination of impurities and contamination due to oxidation or resist in the surface of the substrate 1 are conspicuously decreased, a threshold voltage becomes uniform and the junction between the operating layer and the gate electrode can be formed stably with good reproducibility.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a field effect transistor.

[Conventional technology]

Regarding the conventional manufacturing method of this type of field effect transistor, a gallium arsenide field effect transistor (hereinafter referred to as rGaAs-FETJ) will be taken as an example.
The main stages of the manufacturing process are shown in FIGS. 2(A) to C).

That is, in this conventional method, first
As shown in , an n-type GaAs operating layer R (hereinafter referred to as "n-type operating layer") 2 having a predetermined electron concentration is formed on the main surface of a semi-insulating GaAs substrate (hereinafter referred to as "semi-insulating substrate") 1. is formed by ion implantation, and a gate electrode 3 made of a high melting point metal thin film such as tungsten silicide (WSi) is selectively formed on a required portion of the surface of this n-type active layer 2 by photolithography or the like. Next, as shown in FIG. 2B, by ion implantation using the gate electrode 3 as a mask, this n-type operation layer is implanted from the surface of the n-type operation layer 2 to a part of the semi-insulating substrate l. A source region 4 and a drain region 5 having a higher electron concentration than the layer 2 are formed, and then a source electrode is formed on a part of the surface of the source region 4 and drain region 5 by photolithography or the like in the same manner as described above. 6 and drain electrode 7 are selectively formed to form the intended GaAs-FET.

[Problem that the invention seeks to solve]

However, GaA formed by the conventional method
In an s-FET, the interface between the active layer and the gate electrode is not protected, and as a result, the active layer may be contaminated with impurities, oxidized, or contaminated with resist, and the FET's threshold voltage, etc. It has drawbacks such as the habit of causing variations in characteristics.

This invention is an attempt to improve these shortcomings of the conventional method, and the active layer and the gate are bonded together without the surface of the semi-insulating substrate directly touching the resist or the like and without being contaminated by impurities or oxidized. It is an object of the present invention to provide a method for manufacturing a field effect transistor that can form a bond with an electrode stably and with good reproducibility.

[Means for solving problems]

In order to achieve the above object, the present invention method.

First, a high melting point gate metal thin film is formed on the principal surface of a semi-insulating substrate, and an ion implantation method is applied through this high melting point gate metal thin film to form an active layer.

[For production]

Therefore, in the method of this invention, after forming a high melting point gate metal thin film on the surface of a semi-insulating substrate, the active layer is formed through this high melting point gate metal thin film, so that there is no contamination of the substrate surface with impurities.

Oxidation and contamination caused by resist can be significantly reduced, and as a result, characteristics such as the threshold voltage of the GaAs-FET do not change, and the junction between the active layer and the gate electrode can be formed stably and with good reproducibility. It is possible.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a field effect transistor according to the present invention will be described in detail with reference to FIGS. 1(A) to CG).

FIGS. 1(A) to CG) are cross-sectional views showing the method of this embodiment in the order of steps. In this method, first, as shown in FIG. 1(A), A high melting point gate metal thin film (hereinafter referred to as "gate metal thin film") such as tungsten silicide (WSi) that is on the top and has a thickness that allows ion implantation while protecting the surface of the main surface.
Then, as shown in the figure (B), a photoresist film 8 is formed on the required portions of the gate metal thin film 3a by photolithography, and as shown in the figure (C). Using this photoresist H8 as a mask, ions such as silicon (Si) are applied to the main surface of the semi-insulating substrate 1 from the direction of the arrow. 43a to form an n-type operation pattern 2 with a predetermined electron concentration.

Next, as shown in the same figure (D), the photoresist film 8
After removing the n-type active layer 2, a gate pattern 3b made of tungsten (W), tantalum (Ta), etc. is formed on the surface of the gate metal thin layer 1113a corresponding to the n-type active layer 2, and a gate pattern 3b of tungsten (W) or tantalum (Ta) is formed as shown in FIG. Using this gate pattern 3b as a mask, ions such as silicon (St) are similarly applied to the main surface of the semi-insulating substrate 1 from the direction of the arrow.
Injected through the gate metal thin film 3a, the source region 4 and drain region 5 have higher electron concentration than the n-type operating layer 2.
Then, as shown in FIG. CF), the gate metal thin film 3a is removed by etching using the gate pattern 3b as a mask.

Finally, as shown in CG in the figure, an insulating layer H8 such as a silicon oxide (S102) film or a silicon nitride (si3*, ) film is formed on the surfaces of the semi-insulating substrate 1 and the gate pattern 3b. , a source electrode 8 and a drain electrode 7 are selectively formed on a part of the surface of the source region 4 and drain region 5, respectively, to obtain a target G
This constitutes an aAa-FEET.

That is, in this embodiment method, the semi-insulating substrate 1
After forming a gate metal thin film 3a on the surface of the gate metal thin film 3a, in order to form an active layer through this gate metal thin film 3a,
Impurity contamination, oxidation, resist contamination, etc. on the surface of the substrate 1 can be significantly reduced.

Incidentally, in the method of the above embodiment, a case was described in which the source region 4 and drain region 5 were formed through the gate metal thin film 3a on the semi-insulating substrate l, but the gate pattern 3b was used as a mask to form the gate metal thin film 3a. After removing the etching, the source region 48 and drain region 5 may be formed, and the n-type active layer 2 may be formed.
．． Although the case where the source region 4° and the drain region 5 are used has been described, the same applies to the p-type case.

In addition, although the method of the embodiment described above is based on the case of a semi-insulating GaAs substrate, it is not necessarily limited to this, and may also be applied when using other semi-insulating semiconductor substrates such as indium phosphide (InP). Of course, it can be applied.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, a high melting point gate metal thin film is formed on the main surface, that is, the surface, of a semi-insulating semiconductor substrate in the initial step, so that the semi-insulating semiconductor substrate There is no risk that the surface of the FET will be contaminated by contact with resist, etc., or that it will be contaminated by impurities or oxidized. Therefore, the characteristics such as the threshold voltage of the FET will not change, and the active layer and gate It has the advantage of being able to form a bond with an electrode stably and with good reproducibility.

[Brief explanation of drawings]

1(A) to CG) are cross-sectional views showing an embodiment of the method for manufacturing a field effect transistor according to the present invention in the order of steps, and FIGS. 2(A) to CG) are sectional views showing the conventional method as above. FIG. l... Semi-insulating GaAs substrate (semi-insulating semiconductor substrate), 2... n-type GaAs operating layer (active layer), 3a
...High melting point gate metal thin film, 3b... Gate pattern, 4... Source region, 5... Drain region, 6... Source electrode, 7... Drain electrode,
8... Photoresist film, 9... Insulating film. Agent Masuo Oiwa Figure 1 (B) (C) Figure 1 (F) (G)

Claims (1)

[Claims] In a method for manufacturing a field effect transistor in which gate, source, and drain regions and an active layer are respectively formed on the main surface of a semi-insulating semiconductor substrate, first, a high After forming the melting point gate metal thin film, a step of selectively forming an active layer on a required portion of the semi-insulating semiconductor substrate by ion implantation through the high melting point gate metal thin film; selectively etching to form a gate electrode on the active layer.