JPS61168270A - Manufacturing method of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain desired electric characteristic accurately in a short time by connecting a contactor between two points through a P-N junction, and heat treating in nonoxidative atmosphere while measuring electric characteristic between the both contactors. CONSTITUTION:Insulating films 3, 3 such as oxide films are formed on both front and back surfaces of a semiconductor wafer 10, and a window hole 3a is formed only on the film 3 of the surface. Then, a P-type impurity is selectively diffused from the hole 3a to form a P-type region 2. Then, only thin oxide film of the hole 3a portion is removed by etching. Then, contactors 6, 7 are contacted with the adjacent regions 2, 2, heated at 1,150-1,250 deg.C in reduced nonoxidative atmosphere while measuring a Zener voltage by a measuring unit 8 to additionally press the P-type impurity of the region 2 into an N-type region 1. When the Zener voltage arrives at the desired value, the heating is stopped. Subsequently, an anode electrode 4 and a cathode electrode 5 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a method for manufacturing a semiconductor device, and is particularly used for adjusting the Zener voltage of a diffusion junction type constant voltage diode.

Summary of the Invention This invention adjusts the Zener voltage of a diffusion bonded voltage regulator diode by full heat treatment, in which all contacts are connected between two points across all PN junctions, and all electrical characteristics between both contacts are measured. By performing all heat treatments in a non-oxidizing atmosphere, it is possible to manufacture semiconductor devices with desired frost and pore characteristics.

There are two types of conventional voltage regulating diodes: polycrystalline silicon junction type and diffusion junction type. The former is made by growing P-type polycrystalline silicon in a vapor phase on an N-type silicon substrate, and by increasing the impurity concentration of P-type polycrystalline silicon, a low Zener voltage can be obtained, making it easier to manufacture. It is cumbersome and relatively remote. On the other hand, in the latter case, P-type impurities are completely diffused into an N-type silicon substrate by selective diffusion, and although it can withstand only a relatively short Zener voltage, it has the advantage of being inexpensive.
have t.

FIG. 2 is a basic sectional view of a conventional diffusion bonded constant voltage diode pellet. In the figure, 1 is an N-type region, 2
is a P-type region formed by selective diffusion in the N-type region l, 3 is an insulating film such as an oxide film, 4 is an anode electrode formed on the P-type head region 2, and 4 is formed in the N-type region l. This is the cathode electrode.

Next, a method for manufacturing the diode pellets will be described with reference to FIG. 3 (Al to CD+).

First, the entire semiconductor wafer 1o, which will become the N-type region 1, is completely formed with insulating films 3, 3 such as oxide films on both the front and back surfaces, and then a large number of windows are formed in the insulating film 3 on the front side by well-known photolithography. Form 3a (B). Next, the P-type impurity@all selectively diffuses from each window hole 3a, and the P-type head region 2'f
! : Formation (01° Since this selective diffusion is carried out in an oxidizing atmosphere, a thin oxide film is formed in the window hole 3a portion. 3 After removing all etching, P head area 2
Then, an anode electrode 4 and a cathode electrode 5 are formed in the N-type region 1, respectively. After DI and L are cut, the diode pellet shown in FIG. 1 is obtained by dicing or the like from a single point @ line.

In the above-mentioned constant voltage diode pellet, the Zener voltage is determined by the impurity concentration of the p-type head region 2, as shown in FIG. It will be done. However, even if the impurity concentration in the P head region 2 is set according to the desired Zener voltage, variations in the impurity concentration in the N required region l, the temperature distribution during diffusion in the P head region 2, and the impurity concentration in the gas, etc. Therefore, it is often not possible to obtain the desired Zener voltage. Therefore, it is necessary to adjust the Zener voltage.

The adjustment of the Zener voltage described above is shown in Figure 3 (P-type head area 2 of C1).
After the entire diffusion is formed, as shown in FIG. Contactors 6 and 7 are brought into contact with region 1, respectively, and the Zener voltage is measured by measuring device 8.

As a result of this measurement, if the Zener voltage is insufficient to the desired value, all additional heat treatment conditions are determined and heat treatment is performed again in the forced furnace to eliminate impurities in the P head region 2. IPN type area upper area 1
The impurity concentration in the P head region 2 is completely lowered, and the A Zener voltage is completely increased. Thereafter, the insulating film formed on the P head region 2 and the N type region 1 is completely removed again, and the entire Zener voltage is measured by the method shown in FIG. After repeating this operation several times, find the desired Zener voltage. (Japanese Patent Application No. 58-133984).

Problems to be Solved by the Invention However, if the above Zener voltage adjustment method is followed, the steps of inserting the semiconductor wafer 10 into the pushing furnace - pushing the semiconductor wafer 10 - taking it out from the pushing furnace - removing the insulating film - measuring the Zener voltage - entering the pushing furnace. Not only is the work extremely complicated as the entire push-in operation has to be repeated, but it also takes a long time to complete the installation to obtain the desired Zener voltage, and furthermore, it is difficult to reliably obtain the desired Zener voltage. There were various problems such as a low drop-in rate.

Means for Solving the Problems In order to solve all of the above problems, the present invention connects contacts between two points of a semiconductor wafer in which a large number of PN junctions are all interposed, and connects the contacts between both contacts. After measuring the electrical properties of the material, heat treatment is performed in a non-abrasive atmosphere.

Effect According to the above means, since the entire pushing process is performed while measuring the Zener voltage, etc., the desired Zener voltage, etc. can be accurately obtained in one step.

Embodiment Hereinafter, all embodiments of the present invention, FIG. 1 (Al-(Gl
I will explain with reference to 'e.

First, an N-type semiconductor wafer 10 is prepared (Al.

Insulating films 3, such as oxide films, are entirely formed on both the front and back surfaces of this semiconductor wafer 10, and window holes 3a are formed only in the front insulating film 3 by Ill photolithography (B).

Next, the P-type impurity is selectively diffused from the window hole 3a to form the entire P-type head region 2 (01° By forming the P-type head region 2, a thin oxide film is formed in the window hole 3a portion. After CDI OC, which completely etches only the thin oxide film on this window hole 3a portion, contactor 6°7 is brought into contact with the adjacent P head regions 2, 2, and 1 measurement device 8 is applied.
Neutral such as N2 or N2 while measuring Zener voltage with
1150-1250 in a reducing non-oxidizing atmosphere such as
By heating at a temperature of about °C, the P-type impurity in the P-type region 2 is removed.
Perform all additional indentation processing on kN type area 1A. Then,
As time passes, the impurity concentration of the P-type region 2 decreases, and the Zener current H- gradually increases. At this time, since the PN junction at -1000 is in the forward direction, it is not related to the Zener voltage. In this way, when the Zener voltage reaches the desired level, heating is completely stopped and the additional pushing process is completely completed (drama).

Next, the insulating film 3 in the N-type region 1 is removed, and an anode electrode 4 and a cathode electrode 4@5 are completely formed in the P-type region 2 and the N-type region 1, respectively (F).

Thereafter, by cutting from one point @gland position in FIG. 1 (P''), a constant voltage diode pellet similar to that in FIG. 2 is obtained (Gl.

Effects of the Invention According to the present invention, the entire additional/10 push process can be performed without measuring all electrical characteristics such as the Zener voltage, making it much easier and faster to accurately obtain the desired electrical characteristics than with conventional methods. characteristics can be obtained.

[Brief explanation of the drawing]

Figure 1 (Al- (Gl is a constant voltage diode according to an embodiment of the present invention) is a cross-sectional view of a semiconductor wafer or pellet at each step to explain the manufacturing method of a piezo diode. A cross-sectional view of FIG. 3(A)-
(D) is a cross-sectional view of a semiconductor wafer at each step for explaining the method for manufacturing the constant voltage diode, FIG. 4 is a characteristic diagram of the impurity concentration of the P-type region versus Zener voltage, and FIG. 5 is when adjusting the Zener voltage. FIG. 2 is a cross-sectional view of a semi-integrated wafer showing its entire state. 1... N-type region, 2... P-type region, 3... Insulating film (oxide film), 3a... Keikou, 6.7. ... Contactor, 8 ... Measurement and measurement device, 10 ... Semiconductor wafer. Patent applicant Kansai NEC Co., Ltd.

Claims (1)

[Claims] A contact is connected between two points of a semiconductor wafer with many PN junctions interposed therebetween, and the electrical characteristics between both contacts are measured while heat treatment is performed in a non-oxidizing atmosphere. A method for manufacturing a featured semiconductor device.