JPS61163426U - - Google Patents
Info
- Publication number
- JPS61163426U JPS61163426U JP4669685U JP4669685U JPS61163426U JP S61163426 U JPS61163426 U JP S61163426U JP 4669685 U JP4669685 U JP 4669685U JP 4669685 U JP4669685 U JP 4669685U JP S61163426 U JPS61163426 U JP S61163426U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- current mirror
- mirror circuit
- stage
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
Description
第１図は本考案の一実施例を示す電気回路図、
第２図は本考案の最小構成例を示す電気回路図、
第３図、第４図は本考案の他の実施例を示す電気
回路図、第５図、第６図は本考案の等価回路図、
第７図乃至第９図は従来回路例を示す図、第１０
図は各場合における出力誤差を示す図である。
Ｑ１〜Ｑ４，Ｑ１１〜Ｑ１２，Ｑ２１〜Ｑ２ｎ
，Ｑ２１′〜Ｑ２ｎ′…トランジスタ。
FIG. 1 is an electrical circuit diagram showing an embodiment of the present invention;
FIG. 2 is an electric circuit diagram showing an example of the minimum configuration of the present invention.
Figures 3 and 4 are electrical circuit diagrams showing other embodiments of the present invention, Figures 5 and 6 are equivalent circuit diagrams of the present invention,
7 to 9 are diagrams showing examples of conventional circuits, and FIG.
The figure shows the output error in each case. Q1 to Q4 , Q11 to Q12 , Q21 to Q2n
, Q21 ' to Q2n '...transistors.
Claims (1)
、出力段トランジスタ回路の下段に、入力側トラ
ンジスタと出力側トランジスタのエミツタ面積比
が１：ｋで且つベース同志が共通接続されたトラ
ンジスタペアを複数個縦続接続してなる電流ミラ
ー回路。 A plurality of transistor pairs are connected in cascade in the lower stage of the input stage transistor and output stage transistor circuits constituting the current mirror circuit, and the emitter area ratio of the input side transistor and the output side transistor is 1:k, and the bases are commonly connected. Current mirror circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4669685U JPH0441615Y2 (en) | 1985-03-29 | 1985-03-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4669685U JPH0441615Y2 (en) | 1985-03-29 | 1985-03-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61163426U true JPS61163426U (en) | 1986-10-09 |
| JPH0441615Y2 JPH0441615Y2 (en) | 1992-09-30 |
Family
ID=30561338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4669685U Expired JPH0441615Y2 (en) | 1985-03-29 | 1985-03-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441615Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016206829A (en) * | 2015-04-20 | 2016-12-08 | Ｓｉｍｐｌｅｘ Ｑｕａｎｔｕｍ株式会社 | Temperature compensation circuit |
-
1985
- 1985-03-29 JP JP4669685U patent/JPH0441615Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016206829A (en) * | 2015-04-20 | 2016-12-08 | Ｓｉｍｐｌｅｘ Ｑｕａｎｔｕｍ株式会社 | Temperature compensation circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0441615Y2 (en) | 1992-09-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61163426U (en) | ||
| JPS59125116U (en) | current mirror circuit | |
| JPS62146311U (en) | ||
| JPS6444723U (en) | ||
| JPS6344521U (en) | ||
| JPS60184156U (en) | multiplication circuit | |
| JPS6268320U (en) | ||
| JPS61107015U (en) | ||
| JPS6150344U (en) | ||
| JPS62158921U (en) | ||
| JPS6356417U (en) | ||
| JPS6232636U (en) | ||
| JPH0263108U (en) | ||
| JPS62125018U (en) | ||
| JPS63142907U (en) | ||
| JPS6224517U (en) | ||
| JPS61121017U (en) | ||
| JPS6315618U (en) | ||
| JPS6442612U (en) | ||
| JPS62171214U (en) | ||
| JPH0272017U (en) | ||
| JPS63153629U (en) | ||
| JPS62178628U (en) | ||
| JPS6277928U (en) | ||
| JPS6390333U (en) |