JPS61149421U - - Google Patents
Info
- Publication number
- JPS61149421U JPS61149421U JP2272186U JP2272186U JPS61149421U JP S61149421 U JPS61149421 U JP S61149421U JP 2272186 U JP2272186 U JP 2272186U JP 2272186 U JP2272186 U JP 2272186U JP S61149421 U JPS61149421 U JP S61149421U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- antenna
- input signal
- signal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図はこの考案の一実施例になるアンテナ回
路と高周波増幅巾部を回路図で示し、後の部分を
ブロツク図で示したラジオ受信機の図でぎる。第
２図は他の実施例になる第１図のアンテナ回路部
に同調回路を有する場合の図、第３図はダイオー
ドの電圧対電流特性を示す。第４図は受信機の受
信信号電圧対歪率特性を示す。第５図は第１図の
変形例を示す。
Ｄ１は自動利得制御用ダイオード、Ｃ１は直流
阻止用コンデンサ、Ｒ１はバイアス抵抗、Ｄ４は
可変ダイオード、Ｑ２はトランジスタ。
FIG. 1 is a circuit diagram of an antenna circuit and a high-frequency amplification section according to an embodiment of this invention, and a diagram of a radio receiver with the latter part shown as a block diagram. FIG. 2 is a diagram showing another embodiment in which the antenna circuit section of FIG. 1 includes a tuning circuit, and FIG. 3 shows the voltage versus current characteristics of a diode. FIG. 4 shows the received signal voltage versus distortion characteristic of the receiver. FIG. 5 shows a modification of FIG. 1. D1 is an automatic gain control diode, C1 is a DC blocking capacitor, R1 is a bias resistor, D4 is a variable diode, and Q2 is a transistor.
Claims (1)
より、自動利得制御される無線受信機において、
アンテナとアース間にコンデンサとトランジスタ
とを直列に接続し、そのトランジスタの制御電極
に該直流電圧が該トランジスタを順方向にバイア
スする様に制御信号が供給され、該アンテナと高
周波増巾素子とを非直線素子を介さないで接続し
、該アンテナへ入力された信号の強度に応じて該
トランジスタにて該入力信号を分流させる様にし
た事を特徴とする自動利得制御回路。 In a wireless receiver whose gain is automatically controlled using a DC voltage obtained by rectifying a part of the input signal,
A capacitor and a transistor are connected in series between the antenna and ground, and a control signal is supplied to the control electrode of the transistor so that the DC voltage biases the transistor in the forward direction, and the antenna and the high frequency amplification element are connected. An automatic gain control circuit, characterized in that the transistor is connected without using a non-linear element, and the transistor divides the input signal according to the intensity of the signal input to the antenna.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2272186U JPS61149421U (en) | 1986-02-19 | 1986-02-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2272186U JPS61149421U (en) | 1986-02-19 | 1986-02-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61149421U true JPS61149421U (en) | 1986-09-16 |
Family
ID=30515282
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2272186U Pending JPS61149421U (en) | 1986-02-19 | 1986-02-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61149421U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4883759A (en) * | 1972-02-01 | 1973-11-08 | ||
| JPS5047544A (en) * | 1974-05-13 | 1975-04-28 |
-
1986
- 1986-02-19 JP JP2272186U patent/JPS61149421U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4883759A (en) * | 1972-02-01 | 1973-11-08 | ||
| JPS5047544A (en) * | 1974-05-13 | 1975-04-28 |
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