JPS61127284A - Video reproducing system - Google Patents

Abstract

PURPOSE:To eliminate flicker of a reproduced picture to obtain the picture of high quality by generating a transfer clock synchronized with a synchronizing signal separated from a video signal and equalizing the level of an additional signal, which is given to a memory or is added to the fly-back section of the video signal and has a certain level, and the level of the additional signal of the video signal led out from the memory. CONSTITUTION:The video signal is transferred from an analog field memory 11 to a synthesizing circuit 14 by the transfer clock to generate the video signal of the first field which is delayed by one field, and this video signal is not only given to a video circuit 30 but also stored in the memory 11 again through an amplifying circuit 15; and meanwhile, the video signal is inputted to a comparing circuit 33, and the gain of an amplifying circuit 22 is controlled in accordance with the level difference between this video signal and a staircase wave signal from a staircase wave signal generating circuit 21. The video signal delayed by two fields is transferred from the memory 11 to the synthesizing circuit 14 by the transfer clock and is not only given to the video circuit but also stored again the memory 11 through the amplifying circuit 15. The video signal delayed by three fields is generated by the similar method, and thus, continuous still reproduced pictures are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a video playback system that removes the 7-bit filter on the screen when playing back a still image of a video signal recorded on a video disc or the like.

BACKGROUND ART For example, in a video disc recording and reproducing apparatus, in order to reproduce a normal moving image recorded on a video disc as a still image, a video signal delayed by one field or several fields is created by an analog field memory.

In other words, when playing a still image from a video disc recorded in 4 fields per revolution, the video signal delayed by 1 field by the analog field memory, and even 2.3 fields.
This can be achieved by creating a field-delayed video signal and outputting the same video signal within a period of four fields.

Problem to be Solved by the Invention, α The above-mentioned prior art has a problem in that when the level of the video signal derived from the analog field memory is not constant, it appears as a 7-click on the reproduced screen.

The causes of this level difference are a shift in the level of the re-input video signal and a change in the temperature characteristics of the analog field memory and its peripheral circuits, but in both cases the level of the video signal re-input to the analog field memory is not constant. This is due to this.

An object of the present invention is to provide a video playback method that automatically controls the level of re-input to the memory to be constant, thereby eliminating 7 hits on the playback screen and making it possible to obtain high-quality images. It is to provide.

Means for Solving the Problems The present invention provides a video reproduction method for reproducing a video signal including a synchronization signal, a luminance signal included between the synchronization signals, and a carrier color signal, in which the synchronization signal is separated from the video signal. A synchronization separation circuit that derives the signal, a transfer clock generation circuit that generates a transfer clock that is synchronized with the synchronization signal from the synchronization separation circuit, and a transfer clock generation circuit that sequentially stores the video signal, responds to the transfer clock, and generates the transfer clock in synchronization with the transfer clock. A memory for deriving a stored video signal, a means for adding a signal of a certain level to the retrace section of the video signal input to the memory, a level of the additional signal in the adding means, and a signal of a constant level for the video signal derived from the memory. means for comparing the level of the additional signal to equalize the level of the subsequent video signal input to the memory; and a circuit for synthesizing the synchronization signal from the synchronization separation circuit and the video signal from the memory. This is a video playback method characterized by:

According to the present invention, video signals are sequentially stored in a memory, and in response to a transfer clock, the stored video signal is derived in synchronization with the transfer clock, and a synchronization signal separated from the video signal is derived. A transfer clock synchronized with is generated, a signal of a certain level is added to the retrace section of the image signal given to the memory, and the level of this additional signal is compared with the level of the additional signal of the video signal derived from the memory. By setting the input video signal and the re-input video signal to the same level, it is possible to eliminate 7 hits on the screen caused by the level difference between the input video signal and the re-input video signal, and to obtain a high-quality image.

Embodiment FIG. 1 is a block diagram of a video playback system according to the present invention, FIG. 2 is a diagram of the store 1a area 2 on the video disc 1 in a private format, and FIG. 3 is a diagram showing the retrace section of the video signal. FIG. The video playback device 3 is
Basically, reading to read the recorded signal stored on video disc 1! [l? ! 4.Reading device! ! The reading device r114 includes a means 5 for removing 7lickers of the video signal reproduced by the video signal 4, and a cathode #aW7 for displaying the video and signal from the removing means 5. a reading head 8 disposed facing a storage area 2 of the disc 1, the video disc 1 has a plurality of concentric tracks T1 to Tn.
It has a store area 2 consisting of. Signals corresponding to four fields of video are recorded in one track of the store area 2, and the reading head 8 is controlled to move inward in the radial direction of the rotating video disc 1 in accordance with track switching pulses. be done. When reproducing IP still images, the reading head 8 is fixed on the track T to be reproduced and repeatedly reads recording signals for four fields.

The video signal read by the reading plate 8 is sent to the sync separation circuit 9 and the clamp circuit 10 included in the removing device 5 shown in the first diagram. 2 respectively. Reading device! The video signal derived from 4 includes a synchronization signal, a luminance signal and a carrier color signal included in the synchronization signal, and the synchronization signal includes a horizontal synchronization signal H and a vertical synchronization signal ■. Clamp (fix) the video signal level to a constant level, line 13
It is connected to the adder circuit 20 via. The adder circuit 20 is supplied with the pulse shown in the third diagram derived from the staircase wave signal generation circuit 21 in synchronization with the horizontal synchronization signal H from the synchronization separation circuit 9 and the upstream vertical synchronization signal V. In the adder circuit 20, the pulse is added to the retrace section of the video signal, and this video signal is added to the line J! 4 to the amplifier circuit 22.

The video signal amplified by the amplifier circuit 22 is applied to the individual contact S of the changeover switch S1.

This changeover switch S1 is connected to the individual contact S and the common contact S1□ while the control circuit 23 inputs the video signal of the first field from the amplifier circuit 22, so that the re-input video delayed by one field or several fields is connected. While the signal is input, individual contact S1□ and common contact S
13 so that it is conductive wA! III controlled. The video signal from the common contact 5lff of the changeover switch S is transmitted to a CCD (Ciano coupled device) or BBD.
(packet pre-date device) or the like. The analog field memory 11 has a capacity capable of sequentially storing one field's worth of video signals, and responds to and synchronizes with the transfer clock from the transfer clock generation circuit 12. The stored contents are sequentially derived from the line 16, and the video signal for the subsequent one field is stored by the derived amount. 6, the transfer clock is removed in the a-bus filter 13, and the video signal derived from the line! 7 to the synthesis circuit 14, and Fin! 8 to the amplifier circuit 15, and the re-input signal from the amplifier circuit is the line! 9 to the individual contacts 312 of the changeover switch SI.

On the other hand, the video signal from the reading device r114 is line!
1 to the synchronization separation circuit 9. The vertical synchronization signal ■ separated in the synchronization separation circuit 9 is connected to the line J! 1
0, and the horizontal synchronization signal H is Fin! 11. The vertical synchronization signal ■ and the horizontal synchronization signal H are connected to the branch line J! 121,713 to the transfer clock generation circuit 12, respectively. Transmission signal generation circuit 121'
is vertical.

Horizontal and vertical transfer clocks are generated in response to the period signal ■ and the horizontal synchronization signal H, and the line! 14 to the analog field memory 11.

Using the transfer clock from the transfer clock generation circuit 12, the contents stored in the analog field memory 11, that is, the video signal for one field, are periodically delayed by one field and sequentially transferred to the synthesis circuit 14.

The vertical synchronization signal (1) and the horizontal synchronization signal (H) from the synchronization separation circuit 9 are connected to the line 710. , gll to the synchronization signal generation circuit 18. The synchronization signal generation circuit 18 responds to the vertical synchronization signal (2) and the horizontal synchronization signal (H) to generate various synchronization signals such as clamp, horizontal, vertical, and blanking date pulses on the line J! 15 to the synthesis circuit 14. In the synthesis circuit 14, the clamp, horizontal and vertical JvI signals from the synchronizing signal generation port 18 are added to the video signal derived from the analog field memory 11 via the low-pass filter 13, and one field is combined. Line as a minute video signal! 16 to the video circuit 30. A video signal from the video circuit 30 is sent to the cathode ray tube 7 by a drive circuit 31.

Is displayed.

On the other hand, the video signal for one field from the low-pass filter 13 is line! As well as being derived from 8, the branch line! 17 to one input terminal of the comparator circuit 33. The output from the staircase signal generation circuit 21 is applied to the other input terminal of the comparison circuit 33. This comparison circuit 33 compares the levels of the staircase wave signal added to the retrace section of the video signal derived from the analog field memory and the staircase wave signal generated from the staircase signal generation circuit 33, and Line output corresponding to level difference! 1
8 to the amplifier circuit 22 to control the gain of the amplifier circuit 22. By keeping the gain of the amplifier circuit 22 constant, the subsequent video signal will be input to the analog field memory 11 at a constant level, thereby reducing the number of reproduced images.

During still image playback, the video signal of the first field from the readout device is added with a staircase wave signal in the adder circuit 20, is input to the amplifier circuit 22, and is stored in the analog field memory 11 via the changeover switch S. Ru. The change-over switch S, connects the amplifier circuit 22 to tj
While the video signal of 41 fields is applied, the individual contact S
11 and the common contact srs, and while the re-input video signal of the first field is applied from the amplifier circuit 15, the individual contacts S, 2 and the common contact, αS3. The video signal is transferred from the analog field memory 11 to the synthesis circuit 14 by the primary transfer clock, which is driven and controlled so that the
A field-delayed first field video signal is created and given to the video circuit 30, and is stored again in the analog field memory 11 via the amplifier circuit 15.Meanwhile, the video signal is input to the comparison circuit 33 and is converted into a staircase wave signal. First, the video signal delayed by two fields by the transfer clock is transferred from the analog field memory 11 to the synthesis circuit 14. The signal is supplied to the video circuit and stored again in the analog field memory 11 via the amplifier circuit 15. A video signal delayed by three fields is also created in the same manner as described above, thus providing a continuous still playback image. When inputting a video signal in this way, a staircase wave signal of a certain level is added to the baseline section, and the added signal of the video signal is re-outputted from the analog field memory 11 to the analog field memory 11 via the amplifier circuit 15. By automatically controlling the gain of the amplifying circuit 22 according to the level difference between the two, a constant video signal can be supplied to the analog field memory 11. With this, it is possible to eliminate the 7-point filter when reproducing still images, and to obtain high-quality images.

The video playback method according to the present invention is a video disc recording/playback VTR! 1, but can be implemented in a wide range of technical fields such as magnetic tape recording and reproducing devices.

Effects As described above, according to the present invention, video signals are sequentially stored in a memory, responsive to a transfer clock, the stored video signals are derived in synchronization with the transfer clock, and the stored video signals are derived from the video signals. A transfer clock synchronized with the separated synchronization signal is generated, a signal of a certain level is added to the retrace section of the video signal input to the memory, and the level of this additional signal and the additional signal of the video signal derived from the memory are By comparing the level of the input video signal and setting the level of the subsequent video signal input to the memory to be the same level, it is possible to eliminate the 7 hits on the screen caused by the level difference between the input video signal and the re-input video signal. It is possible to obtain an image of voice quality without any problems.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment according to the present invention, FIG. 2 is a schematic diagram of a storage area 2 for a video disc 1,
Figure 3 shows the pulses added to the baseline section of video No. 13. 3... Video playback device, 9... Synchronization separation circuit, 11.
... Analog field memory, 14... Synthesis circuit,
12... Transfer clock generation circuit, 21... Staircase wave signal generation circuit, 33... Comparison circuit

Claims (1)

[Claims] In a video reproduction method that reproduces a video signal including a synchronization signal, a luminance signal included between the synchronization signals, and a carrier color signal, there is provided a synchronization separation circuit that separates and derives the synchronization signal from the video signal. , a transfer clock generation circuit that generates a transfer clock that is synchronized with the synchronization signal from the synchronization separation circuit, and a video signal that sequentially stores video signals, responds to the transfer clock, and stores the video signals in synchronization with the transfer clock. a memory for deriving a signal of a certain level, a means for adding a signal of a constant level to a retrace interval of a video signal input to the memory, a level of the additional signal in the adding means, and a level of the additional signal of the video signal derived from the memory. and a circuit for synthesizing the synchronization signal from the synchronization separation circuit and the video signal from the memory. Playback method.