JPS6111624B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a score display device for displaying scores and winning/losing judgments in games with similar rules having a net in the center of the court, particularly for displaying winning/losing judgments for games.

In general, ball games that have a net in the center of the court, such as table tennis, tennis, balloon ball, and badminton, have similar rules. That is, (1) A predetermined odd numbered game (set) is set, and the winner is the one who wins the majority of games (set) first.

(2) There are cases in which a player can score regardless of the right to serve, and cases in which the player with the right to serve can score.

(3) The game (set) ends when one of the players reaches a predetermined score.

(4) In the case of Juusu, the game (set) ends with a difference of 2 points.

Here, "game (set)" and "competition" are synonymous, and "the completion of a match after a predetermined number of games (set)" and "end of competition" are synonymous. .

Therefore, by creating a common score display for this range of competitions and making settings appropriate to the competition, it is possible to not only reduce the labor of referees and score display, but also to reduce the burden on private competitions where these are not present. It is also possible to display scores through operations between competitors.

The present applicant has proposed in a separate application a score display based on the above rules, excluding the case of Juusu. This score display displays the score count of the competition, searches for a prescribed score, determines the winner or loser based on the search results, and displays the result.

SUMMARY OF THE INVENTION An object of the present invention is to provide a score display which further has the function of determining and displaying the victory or defeat of the Juice.

In order to achieve the above object, the score display device of the present invention includes a score counting means for counting the score of the competition by input operation of a switch, a score display means for displaying the contents of the score counting means, and the score counting means. win/loss determining means for determining the winner or loser of the competition by searching for prescribed scores from the contents of the game; win/loss determining display means for displaying the result of the winning/losing determination by the winning/losing determining means; and point counting means for counting the points based on the winning/losing determining means. Resetting means 6, 7,
9 and 10, the score display includes a judgment means for searching the contents of the score counting means to judge the judgment; a judgment storage means for temporarily storing the judgment result of the judgment means; sending-out prevention means for preventing the win-loss judgment result by the win-lose judgment means from being sent to the win-lose judgment display means by the output of the judgment storage means; Count the competition scores after each match to determine the 2-point difference, and
The present invention is characterized by comprising two-point difference determining means for respectively sending point difference determination results to the win/loss determining display means.

The present invention will now be described in detail with reference to examples.

FIG. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is an operational waveform diagram of each part thereof.

In FIG. 1, 1 ₁ to 1 ₄ are decimal counters (CT), 2 ₁ to 2 ₄ are 7 segment decode drivers (SD), 3 ₁ to 3 ₄ are 7 segment displays (SG), 4 ₁ , 4 ₂ is AND circuit, 5 ₁ , 5 ₂ is 3
Bit shift register (SR), 6 and 7 are OR circuits, 8 is NAND circuit, 9 is clock generator, 10
is an 8-bit shift register (SR), 11 ₁ to 11
₃ is a normally open switch (SW), 12 ₁ to 12 ₆
is a light emitting diode.

Now, turn on switch ₁₁₃ , and turn _{on SR51} ,
₅₂ and _CT11 to ₁₄ are reset, _SG31 to ₃₄ display "0", and the light emitting diodes ₁₂₁ to ₁₂₆ return to their initial states. When the switches ₁₁₁ and ₁₁₂ score, the decimal counters _CT11 to ₁₄ count, and the 7-segment decoders _SD21 to ₂₄ display the 7-segment display SG3.
AND4 which decodes and displays the signals necessary for displaying ₁ to 3 and ₄ and which constitutes the first search circuit.
₁ , 4 ₂ gives game (set) points, for example, 21 points in table tennis and 15 points in 6-a-side volleyball.
Search for points. In other words, in advance CT1 ₁ , 1 ₂
Set the Q ₁ to _{Q 4} outputs or the Q ₁ to Q ₄ outputs of CT _{1 3} and 1 ₄ as game (set) points and use them as the inputs of AND circuits 4 ₁ and 4 ₂ , respectively, and use these as game (set) points. When this is reached, the respective outputs are put into shift registers _SR51 and _SR52 , shifted 1 bit to the right, and the game (set) is started.
Display count. The other shift register SR1
0 causes SG3 ₁ to 3 ₄ on the score display to blink,
The player is notified of the end of the game (set) or match, and the decimal counters _CT11 to _CT14 are reset. The above-mentioned score display device is shown in the structure within the dotted line in FIG. 1, and has been proposed by the present applicant in a separate application, so its details will be omitted.

The present invention utilizes the above-proposed score display device to provide a second search circuit for searching whether or not a player is a player, in order to have a function of determining the winner or losing of a player and displaying the result.
An AND circuit 17, a flip-flop (FF) 16 that stores the search result, and an AND circuit 18 that blocks the first search result using the output of the FF 16.
₁ , 18, ₂ , and an up-down counter (CT) 15 that determines a two-point difference, to determine the winner or loser, which is unique to the above-mentioned competition.

Hereinafter, the case where it is used for table tennis will be explained according to FIG. 1, with reference to FIGS. 2 a to t in parentheses. Here, the table tennis rules that are relevant to the present invention are as follows: (a) When one player scores 21 points and the other player scores less than 20 points, the one who scores 21 points wins; (b) When both contestants score 20 points, it becomes a game, and from then on, the winner is determined by a difference of two points. (c)5
The game is played in a match and the first person to win 5 games wins.

Now, by switch 11 ₁ and switch 11 ₂
Scores are added to decimal counters CT1 ₁ to _{1 4} ,
When both of them reach 20 points at time _t1 [Figure 2 a, b], the _Q2 outputs of the decimal counters _CT12 and _CT14 both become "H", and the AND of the second search circuit
The output of the circuit 17 becomes "H", which indicates that the state has become dangerous (FIGS. 2c to 2e). The output of the AND circuit 17 triggers the set terminal S of the flip-flop (FF) 16 to change the output of the FF 16 from "H" to "L" (FIG. 2f). This output is
A first search circuit that is connected to the input terminals of AND circuits 18 ₁ and 18 ₂ and searches for game points.
Prevents the output of AND4 ₁ and 4 ₂ . At the same time, the reset of the up-down counter (CT) 15 is canceled on the other hand. Next, at time _t2 , switch 11
When ₁ is turned on, decimal counter CT1 ₁ , 1 ₂
The 7-segment displays _SG31 and _SG32 count and display 21 points, and the AND circuit ₄₁ retrieves and outputs the 21 game points. However, this search output is blocked by the AND circuit ₁₈₁ . On the other hand, the signal from switch ₁₁₁ triggers the set terminal S of flip-flop (FF) 13,
Set the Q output to “H”. In this case, FF13's Q
If the output is "H" in advance, the state will not change. This Q output "H" maintains the count mode applied to the up/down (U/D) switching terminal of the up/down counter (CT) 15 at up.
Furthermore, the signal from the switch ₁₁₁ passes through the OR circuit 14 and triggers the CL terminal of the up-down counter (CT) 15 to increment the count by one digit.
Figure g]. In other words, this state is a one-point difference state. Next, when the switch ₁₁₂ is turned on at time t3 [Fig. _2b ], the reset terminal R of the flip-flop (FF) 13 is triggered, contrary to the above, and the Q output changes from "H" to "L". 2j], the up-down counter (CT) 15 is switched to down counting mode, and at the same time, the clock terminal CL is triggered and the count is down by one. In other words, this state is a state where the point difference is 0. In this manner, when the switch ₁₁₁ is pressed, the up-down counter (CT) 15 counts up, and when the switch ₁₁₂ is pressed, the up-down counter (CT) 15 counts down.

Now, when the up-down counter (CT) 15 counts 0, that is, when one of the players scores two points in a row from a point difference of 0, the winner is determined according to the rules. Here, for convenience, the operating state when the switch ₁₁₁ is pressed twice in succession will be explained.

When the count is 0, the output terminals _Q1 to _Q3 of the up-down counter (CT) 15 are all at "L" as shown at time _t4 (FIG. 2 g to i). Here, when switch 11 ₁ is pressed once at time t ₅ ,
The _Q1 terminal of CT15 changes from “L” to “Q”,
The states of the AND circuits 20 ₁ and 20 ₂ do not change [Fig. 2 l, m]. Furthermore, when switch ₁₁₁ is pressed again at time _t6 , the _Q1 terminal of CT15 goes “H”→
“L”, the _Q2 terminal changes from “L” to “H” [Figure 2 g, h], and both inputs of AND circuit ₂₀₁ go to “H”.
Then, the clock terminal CL of the shift register (SR) ₅₁ is triggered through the OR circuit ₂₁₁ , and the clock terminal CL of the shift register (SR) 51 is shifted to the right by 1 bit, and the light emitting diode ₁₂₁ is turned on (FIG. 2o). Furthermore, the output of the AND circuit ₂₀₁ passes through the OR circuit 6 to operate the 8-bit shift register (SR) 10 [n+q in Figure 2], and the _Q1 output passes through the NAND circuit 8 to blink the score display SG, thereby controlling the game. Announce the end [Fig. 2 q-t].
At the same time, all the circuits except shift registers (SR) 5 ₁ and 5 ₂ are reset by the Q ₃ output of SR 10 via OR circuit 7. In this way, one game ends.

Also, if the switch ₁₁₂ is pressed twice in a row from a state where the point difference is 0, the up-down counter (CT) 15 counts down by a binary number, and Q ₁ =
“L”, Q ₂ = “L”, Q ₃ = “H”, AND circuit 2
The output of ₀₂ changes from “L” to “H”, and OR circuit 2
₁₂ , the shift register (SR) ₅₂ is shifted one bit to the right, and the light emitting diode ₁₂₄ is turned on. Other operations are the same as those described above.

As described above, when a two-point difference is determined, the shift register for displaying the game count is selected depending on which of the two-point differences is larger, and the set count is displayed by lighting the light emitting diode.

FIG. 3 is an explanatory diagram showing the configuration of another embodiment of the present invention. In the same figure, shift register (SR)
22 is a 5-bit shift register, when "H" is applied to the preset terminal P, the JAM input is output to each Q, and when "H" is applied to the shift mode input terminals L/R, "L" is output for leftward shift. ” will result in a shift to the right. Now, when both scores are less than 20 points, the output of the flip-flop (FF) 16 is "H" and the shift register (SR) 22 continues to be preset. When both of them reach 20 points and become dangerous, the output of the flip-flop (FF) 16 becomes "L" and the information given to the JAMIN terminal, that is, Q ₁ = "L", Q ₂ = "L", Q ₃ = “H”, Q ₄ =
The shift register 22 becomes active with "L" and Q ₅ ="L" appearing at the Q terminal. When the switch ₁₁₁ is pressed twice from this state, the flip-flop (FF) 13 and the OR circuit 14 operate in the same manner as described above, and the shift register (SR) 22 shifts the information of the _Q3 output by 2 bits to the left or right. , Q ₁ = “H”
becomes. Further, when the switch ₁₁₂ is pressed twice, the shift register (SR) 22 shifts the information of the _Q3 output 2 bits to the right, and _Q5 becomes "H". The subsequent operations correspond to the outputs of the AND circuits 20 ₁ and 20 ₂ in FIG. 1 and are as described above.

As explained above, according to the present invention, a score display device counts and displays the scores of a competition, searches for a prescribed score using a first search circuit, determines victory or defeat based on the search results, and displays the result. In the second search circuit, a second search circuit searches for "Jius", the search results are stored, and the output of the first search circuit is controlled to determine the difference between two points. As a result, it is possible to automatically process the game, determine the winner and display the results, and not only reduce the labor of referees and score displayers, but also reduce the burden on competitors in the case of private competitions in which they are not present. Players can interact with each other and display scores, allowing the competition to be conducted in the same way as in a normal competition.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention,
FIG. 2 is an operational waveform diagram of the embodiment of FIG. 1, and FIG. 3 is an explanatory diagram showing the configuration of another embodiment of the present invention.
In the figure, ₁₁ to ₁₄ are decimal counters, ₂₁ to ₂₄ are 7 segment decode drivers, and ₃₁ to ₃₄ are 7
Segment display, 4 ₁ , 4 ₂ are AND circuits, 5
₁ , 5 ₂ is a 3-bit shift register, 6, 7, 1
4 is an OR circuit, 8 is a NAND circuit, 9 is a clock generator, 10 is an 8-bit shift register, 11 ₁ ~
₁₁₃ is a normally open switch, ₁₂₁ to ₁₂₆ are light emitting diodes, 13 and 16 are flip-flops,
15 is an up-down counter, and 22 is a 5-bit shift register.

Claims (1)

[Scope of Claims] 1. A score counting means for counting the scores of a competition by inputting a switch, a score display means for displaying the contents of the score counting means, and a prescribed score from the contents of the score counting means. A win/loss determining means for searching and determining the winner or loser of a competition, a winning/losing determining display means for displaying the result of the winning/losing determination by the winning/losing determining means, and a reset means 6 for resetting the score counting means based on the winning/losing determining means. . 16, and sending prevention means 18 for preventing the win/lose judgment result by the win/lose judgment means from being sent to the win/lose judgment display means by the output of the case storage means.
₁ , 18, and ₂ , and the competition scores after the judgment are counted by the output of the judgment storage means and the input operation of the switch to determine a two-point difference, and the two-point difference judgment results are displayed on the win/loss judgment display means, respectively. Two-point difference determining means 13, 14, 15, 19, 20
₁ , 20 ₂ , 21 ₁ , 21 ₂ .