JPS61107790A - Manufacturing method of multilayer ceramic circuit board - Google Patents
Manufacturing method of multilayer ceramic circuit boardInfo
- Publication number
- JPS61107790A JPS61107790A JP22797384A JP22797384A JPS61107790A JP S61107790 A JPS61107790 A JP S61107790A JP 22797384 A JP22797384 A JP 22797384A JP 22797384 A JP22797384 A JP 22797384A JP S61107790 A JPS61107790 A JP S61107790A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- multilayer ceramic
- manufacturing
- ceramic circuit
- green sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
利用分野
本発明は半忠体素子などを実装する多層セラミック回路
基板、特に入出力用接続ピンを高密度に形成できる回路
基板の製法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Application The present invention relates to a multilayer ceramic circuit board on which half-fidelity elements are mounted, and particularly to a method for manufacturing a circuit board in which input/output connection pins can be formed at high density.
従来技術
従来、多層セラミック回路基板の入出力用接続ピンの形
成方法は、焼成後の回路基板にビン立てをしていた。す
なわち、基板のパッド部に接着する部分を有するピンを
パッド部にろう付け、またははんだ付けする方法と、基
板に孔を明けて、この孔にピンを挿入してはんだ付けな
どにより固定する方法とが行なわれた。前者はピンの接
着強度を上げるために広い面積のパッド部を必要とする
ので高密度にビン立てすることができず、また後者は焼
成セラミック基板を加工することが困難であり、ピン立
てを正確にできない欠点がある。Prior Art Conventionally, the method for forming input/output connection pins of a multilayer ceramic circuit board was to place a bottle stand on the circuit board after firing. In other words, there are two methods: brazing or soldering a pin that has a part that adheres to the pad of the board to the pad, and another method of drilling a hole in the board, inserting the pin into the hole, and fixing it by soldering or the like. was carried out. The former requires a pad with a wide area to increase the adhesive strength of the pins, so it is not possible to place the pins in high density, and the latter makes it difficult to process fired ceramic substrates, making it difficult to place the pins accurately. There is a drawback that it cannot be used.
問題点
本発明の目的は、正確かつ高密度に入出力用接続ピンを
立てることができる多層回路基板の製法を提供すること
である。Problems An object of the present invention is to provide a method for manufacturing a multilayer circuit board in which input/output connection pins can be set up accurately and with high density.
解決手段
上記問題点は、配線用グリーンシートとピン立て用グリ
ーンシートとを積層する工程を含む多層セラミック回路
基板の製法において、（１１ビン立て用グリーンシート
に、入出力用接続ビンを挿入する位置に貫通孔を明け、
かつ、（２）このグリーンシ−トの貫通孔に対応する位
置に予め突起を設けたプレス用金型を使用してグリーン
シートを積層することを特徴とする多層セラミック回路
基板の製法によって解決することができる。Solution: The above-mentioned problem is solved in the manufacturing method of a multilayer ceramic circuit board, which includes the step of laminating a green sheet for wiring and a green sheet for pin stand. Drill a through hole in the
and (2) the problem is solved by a method for manufacturing a multilayer ceramic circuit board characterized by laminating green sheets using a press mold in which projections are provided in advance at positions corresponding to the through holes of the green sheets. be able to.
実施例
（１１アルミナ粉末４５重量％、はうけい酸ガラス４５
重■％、アクリル系樹脂１０重量％を生成分とす劣スラ
リー組成物から、ドクターブレード法により厚さ０．３
Ｂ、縦横１５０ ｗｍのグリーンシートを形成し、
（２） グリーンシートに、ピンを立てる位置に直径
０．６ ｔｍの貫通孔を打抜きプレスにより打抜いて、
ピン立て用グリーンシートとし、
（３） このグリ、−ンシートの貫通孔に対応する位
置に予め高さ０．７龍、直径０．６＋ｉｍの突起を設け
たプレス用金型に、ビン立て用グリーンシートを３枚重
ね、この上に、銅配線パターンおよびバイアホールを常
法によって形成した配線用グリーンシートを１０枚重ね
、押圧して積層し、
（４）積層したグリーンシートを湿潤窒素雰囲気中で焼
成して多層セラミック回路基板を得た。このとき貫通孔
の寸法は収縮して深さ０．６ｍｍ、直径０．５璽ｌとな
った。Example (11 Alumina powder 45% by weight, silicate glass 45%
From a poor slurry composition containing 10% by weight of acrylic resin and 10% by weight of acrylic resin, a thickness of 0.3% was obtained by the doctor blade method.
B. Form a green sheet with a length and width of 150 wm, (2) Punch through holes with a diameter of 0.6 tm in the green sheet at positions where pins will be erected using a punching press,
(3) A green sheet for bottle stands is placed in a press mold in which protrusions of 0.7 mm in height and 0.6 + mm in diameter are provided in advance at positions corresponding to the through holes of the green sheet. Stack 3 sheets, and on top of this, 10 green sheets for wiring with copper wiring patterns and via holes formed by conventional methods, press and laminate them, (4) Stack the stacked green sheets in a humid nitrogen atmosphere. A multilayer ceramic circuit board was obtained by firing. At this time, the dimensions of the through hole shrunk to a depth of 0.6 mm and a diameter of 0.5 mm.
（５）基板の孔にはんだペーストを埋込んだ後、長さ４
ｍｍ、直径０．５１ｍの金めっきしたりん青銅製のピ
ンを孔に立て、２５０℃で焼成してピンを固定するとと
もに、基板の内部配線とピンとを電気的に接続した。(5) After filling the holes in the board with solder paste, the length is 4
A gold-plated phosphor bronze pin with a diameter of 0.51 m was placed in the hole, and the pin was fixed by firing at 250° C., and the internal wiring of the board and the pin were electrically connected.
発明の効果
本発明によれば、形状が正確で、かつ寸法が微小な多数
の孔を明けた多層セラミック回路基板を容易に製造する
ことができ、この孔に立てる入出力用接続ピンの密度お
よび信頬性を向上することができる。Effects of the Invention According to the present invention, it is possible to easily manufacture a multilayer ceramic circuit board having a large number of holes with an accurate shape and minute dimensions, and to reduce the density and density of input/output connection pins placed in the holes. It is possible to improve trustworthiness.
Claims (1)
とを積層する工程を含む多層セラミック回路基板の製法
において、 （１）ピン立て用グリーンシートに入出力用接続ピンを
挿入する位置に貫通孔を明け、かつ、 （２）このグリーンシートの貫通孔に対応する位置に予
め突起を設けたプレス用金型を使用してグリーンシート
を積層することを特徴とする多層セラミック回路基板の
製法。[Claims] 1. A method for manufacturing a multilayer ceramic circuit board including the step of laminating a green sheet for wiring and a green sheet for pin stand, including: (1) inserting input/output connection pins into the green sheet for pin stand; A multilayer ceramic circuit board characterized in that a green sheet is laminated using a press mold having a through hole at a position, and (2) a press mold having a projection in advance at a position corresponding to the through hole of the green sheet. manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22797384A JPS61107790A (en) | 1984-10-31 | 1984-10-31 | Manufacturing method of multilayer ceramic circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22797384A JPS61107790A (en) | 1984-10-31 | 1984-10-31 | Manufacturing method of multilayer ceramic circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61107790A true JPS61107790A (en) | 1986-05-26 |
Family
ID=16869156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22797384A Pending JPS61107790A (en) | 1984-10-31 | 1984-10-31 | Manufacturing method of multilayer ceramic circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61107790A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63312662A (en) * | 1987-06-16 | 1988-12-21 | Fujitsu Ltd | Forming method for connecting pin of multilayered ceramic circuit substrate |
-
1984
- 1984-10-31 JP JP22797384A patent/JPS61107790A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63312662A (en) * | 1987-06-16 | 1988-12-21 | Fujitsu Ltd | Forming method for connecting pin of multilayered ceramic circuit substrate |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61107790A (en) | Manufacturing method of multilayer ceramic circuit board | |
| WO1997003829A1 (en) | Method for producing input/output connections in a ceramic device | |
| JP3064751B2 (en) | Method for manufacturing multilayer jumper chip | |
| CN115073148B (en) | Ceramic packaging base and preparation method thereof | |
| JPH0365676B2 (en) | ||
| JPH025027B2 (en) | ||
| JPS61240697A (en) | Manufacture of multilayer ceramic circuit board | |
| JPH02166793A (en) | Method for manufacturing multilayer ceramic circuit board | |
| JPH0540582Y2 (en) | ||
| JP2889293B2 (en) | Sintered plate, manufacturing method and manufacturing apparatus | |
| JP2005032787A (en) | Ceramic wiring board and its manufacturing method | |
| JPH0250494A (en) | Manufacturing method of laminated ceramic substrate | |
| JPH0696990A (en) | Production of multilayer ceramic chip component | |
| JP2806303B2 (en) | Manufacturing method of ceramic package | |
| JPS62296496A (en) | Manufacturing method of multilayer ceramic circuit board | |
| JPS61239943A (en) | Manufacturing method for green sheet lamination mold | |
| JPH01202405A (en) | Via hole formation method | |
| JPH10294561A (en) | Highly debinderable multilayer wiring board and its manufacturing method | |
| JPS60102798A (en) | Method of producing printed circuit board | |
| JPS62155593A (en) | Ceramic multilayer circuit board | |
| JPS63188A (en) | Manufacture of circuit board | |
| JP2002232094A (en) | Multilayer wiring board | |
| JPS63194A (en) | Manufacture of ceramic board | |
| JPS617698A (en) | Method of producing multilayer circuit board | |
| JPS6216598A (en) | Method for forming connection pins on multilayer ceramic circuit boards |