JPS6092675A - constant voltage diode - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a constant voltage diode made by silicon epitaxial planar technology, and to improving breakdown voltage characteristics.

Generally, when attempting to create a constant voltage diode in a semiconductor integrated circuit, the reverse breakdown voltage (breakdown voltage) of the base and emitter junction of a transistor is used. However, the basic structure of transistors in semiconductor integrated circuits is a planar structure, but when a transistor is made with a planar structure, the end of the PN junction exists on the substrate surface directly under the surface protective film, and diffusion occurs from the surface. Therefore, the closer to the substrate surface the higher the impurity concentration gradient.
It is known that breakdown occurs on the surface of a PN junction. However, due to crystal irregularities and dirt on the surface, breakdown of the PN junction becomes difficult to occur uniformly. A conventional technique for solving this problem is described in Japanese Patent Publication No. 54-9473. This prior art has the configuration shown in FIG.

In FIG. 1, numeral 1 is a P-type silicon substrate, 2 is an N
+ type buried diffusion region, 3 is N type epitaxial island region, 5.6 is high concentration P medium diffusion region, 7 is P type base diffusion region, 8 is N type emitter diffusion region, g is N+ type for ohmic contact Diffusion area, 1().

11.12 are electrodes. In this prior art, the maximum impurity concentration is set at the bottom portion 15 of the base-emitter junction to suppress breakdown at the surface. However, in this conventional technology, a base and an emitter are included, and a leakage occurs between the emitter and the highly concentrated base, which not only complicates the structure but also requires setting and controlling the breakdown voltage. There were some difficulties.

Moreover, the number of manufacturing steps is increased, and the manufacturing cost is also high.

The present invention enables a uniform breakdown to occur without the breakdown voltage changing over time, and controls the breakdown voltage by increasing the number of "2" in the manufacturing process by only one. The purpose is to be able to do it accurately.

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings. FIG. 2 is a structural sectional view of this embodiment. In FIG. 2, reference numeral 20 denotes a P-type silicon substrate, 21 an N-epitaxial island region epitaxially grown on the silicon substrate 20 and separated into islands by P+ type isolation diffusion regions 22 and 23, and 24 a 1]1 type. Base diffusion region, 2
5 is an N+ type emitter diffusion region, 26 is a silicon oxide film,
27 is a 7-node electrode, and 27' is a cathode electrode.

Reference numeral 28 denotes an ion implantation layer between the two diffusion regions 24 and 25 at a predetermined depth position, and this ion implantation layer 28 is formed by implanting impurities by ion implantation technique. The impurity concentration gradient is maximized at the side surface 29 of the emitter diffusion region 25. 30 is an N+ type buried diffusion region. In ion implantation, impurities are emitted from an ion source, accelerated with a high voltage, and applied to a silicon target placed in the path of the ion beam to implant the ions into a silicon lattice. This implantation depth is determined by the silicon crystal orientation and acceleration energy.

For the implantation position, use the 7 oto mask technique as necessary. Therefore, in the constant voltage diode of the example, the maximum impurity concentration gradient of the PN junction portion occurs inside the silicon at a predetermined depth from the surface due to the ion implantation layer 29, and breakdown occurs at the surface. can be avoided.

As described in 2 below, according to the present invention, a base diffusion region and an emitter diffusion region are provided in an epitaxial island region that is epitaxially grown on a silicon substrate and separated into island shapes by isolation diffusion regions, and both of the diffusion regions are An ion implantation layer is provided at a predetermined depth between the two, and the impurity concentration gradient of this ion implantation layer is maximized on the side of the emitter diffusion region, so breakdown does not occur on the surface. Therefore, the degree of change in breakdown voltage over time is reduced, and a constant voltage guide with excellent breakdown voltage characteristics can be obtained.
Furthermore, since ion implantation is used, the number of steps in the manufacturing process is increased by only one step, making manufacturing easier.

[Brief explanation of drawings]

! Figure R1 is a structural cross-sectional view of a conventional example, and Figure 2 is a structural cross-sectional view of an embodiment of the present invention. 20 is a P-type silicon substrate, 21 is an N-epitaxial island region, 24 is a P-type base diffusion region, and 25 is an N-type emitter]6. 26 is a silicon oxide film, 27.27' is an electrode, 29 is an ion implantation layer Application population - M Co., Ltd. Representative Patent attorney Oka 1) Hide Kazu

Claims (1)

[Claims] (1) A base diffusion region and an emitter diffusion i region are provided in an epitaxial island region epitaxially grown on a silicon substrate and separated into islands by isolation diffusion regions, and a predetermined region is provided between the two diffusion regions. An ion implantation layer is provided at a deep position, and the impurity concentration gradient of this ion implantation layer is used for emitter diffusion? A constant voltage diode that reaches its maximum on the side of the n region.