JPS6077252A - Input/output control device - Google Patents

Abstract

PURPOSE:To obtain an I/O control device enabled to shorten a failure recovery time by providing a spare area in the area storing a control program, checking stored contents periodically, and at the time of a failure, switching the current area to the spare area to be used. CONSTITUTION:The I/O control device 1 controls I/O operation between an I/O device 4 and a channel device 2. The I/O conrol device 1 reads out a control program from an auxiliary storage device 3 and stores the program in an operation area 23-1 of a storage circuit 22 in a control storage part 20 and an output control part 10 executes normal operation on the basis of the control program. A monitoring part 30 supplies an interruption signal to a monitor control circuit 31 every fixed time and compares the contents stored in the operation area 23-1 with the contents of the control program to detect abnormality. If abnormality is detected, the control storage part 20 switches the using memory area to the spare area 23-1, reads out the control program from the auxiliary storage device 3 and writes the control program. Thus, the I/O control part 10 can restart the control of I/O operation on the basis of the newly stored normal control program, and the failure is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an input/output control device, and more particularly to an input/output control device that monitors the state of a control memory and has a remedy for failures in the control memory.

[Prior art]

In a conventional input/output control device based on microprogram control, if the processor of the input/output control section attempts to reread the location where an abnormality has occurred in the control storage section that stores the microprogram, etc., but is unsuccessful. , the system was brought down and the relevant input/output control device was replaced to recover from the failure.

In addition, conventional input/output control devices do not constantly monitor the contents stored in the control storage unit to detect and deal with failures in advance, so even if a failure potentially occurs, it is discovered that the control program is not running. The drawback is that the system cannot be used properly, leading to unexpected accidents and requiring the system to be shut down and restored.

[Purpose of the invention]

The purpose of the present invention is to eliminate the above-mentioned drawbacks, and to provide an input/output control device that can recover without system down even if a failure occurs in the storage contents of the control storage unit, significantly shortens failure recovery time, and allows business to continue. It is about providing.

[Structure of the invention]

The apparatus of the present invention includes a storage means for storing a control program supplied from an auxiliary storage device, comprising a first storage area and a second storage area used when the first storage area fails, and the control program stored in the first storage area in response to at least one of the interrupt signals supplied at each time or the interrupt signals supplied in a predetermined case; If the comparison results of the control program monitoring means and the control program monitoring means that compare the control program stored in the auxiliary storage device are not the same, the first storage area is made unusable and the second storage area is and storage area switching means for making the storage area usable.

[Explanation of Examples]

Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. The input/output control device 1 shown in FIG. 1 is composed of an input/output control section 10, a control storage section 20, and a monitoring section 30.

The input/output control section 10 has a function of temporarily controlling the waiting time, and controls input/output operations between the channel device 2 and the input/output device 4 based on the control gram stored in the control storage section 20. The program counter is set to the initial value in the input/output control unit 10, and then the operation is restarted from the initial state.

The control storage unit 20 includes a storage circuit 22, a storage control circuit 21 that controls this write/read operation, and an inverter 24. The storage circuit 22 is divided into a working storage area (hereinafter referred to as the working area) 23-1 and a spare storage area (hereinafter referred to as the spare area) 23-2, and the storage control circuit 21 controls both areas at the same time. The operating area 23-1 is used when there is no abnormality in the memory contents of the operational IJ layer 23-1, and only when there is an abnormality in the memory contents of the operational area 23-1, the area is switched to and used as the spare area 23-2. be done. The area switching signal 46 is supplied from the monitoring unit 30, and when there is no abnormality in the memory contents of the operational area 23-1, the area switching signal is logic ``0'', and when there is an abnormality, the area switching signal is logic 1.
By this area switching signal and the operation of the inverter 24, the area to which logic ``1'' is supplied becomes usable, and the area to which logic ``0'' is supplied becomes unusable.

The monitoring unit 30 includes a monitoring control circuit 31 that controls monitoring operations;
an interval timer 35 that supplies an interrupt signal to the monitoring control circuit 31 at regular intervals to perform a monitoring operation; and a wait signal 44. Initialize signal 45. Area switching signal 4
6, respectively.

Next, the operation of this embodiment will be explained.

The input/output control device 1 is connected to the channel device 2 via the channel bus 41 and controls input/output operations between the channel device 2 and a plurality of input/output devices (for example, the input/output device 4).

In the initial state of the input/output control device 1, the flip-flop 32
．． 33 and 34 are reset and their outputs are logic "0". First, the input/output control device 1 reads out a control program from the auxiliary storage device 3 and transfers it to the control storage section 2.
It is stored in the memory circuit 22 of o. In this case, since the area switching signal 46 is logic "0", the operating area 23-1 is supplied with logic "1" from the inverter 24 and is in a usable state.
On the other hand, since the reserve area 23-2 is supplied with logic "0" and is in an unusable state, the control program is transferred to the operational area 23-2.
3-1. In this way, the input/output control section 10 performs normal input/output control operations based on the control program stored in the operation area 23-1.

Even when the input/output operations as described above are being performed normally, the interval timer 35 in the monitoring section 30 supplies an interrupt signal to the monitoring control circuit 31 at fixed time intervals to urge periodic checks to detect abnormalities. In response to the supply of the interrupt signal, the supervisory control circuit 31 sets the flip-flop 32 and supplies a wait signal 44 of logic N1'' to the input/output control unit 10 to put it in a waiting state and further to operate the operation area 23-1.
The stored contents (control program) are read out via the storage control circuit 21 and compared with the contents of the control program stored in the auxiliary storage device w3 to detect an abnormality. If the comparison results are the same, the flip-flop controller 132 is reset, the input/output control unit 10 is released from the waiting state, and all input/output operations are allowed to continue.

Next, a case will be described in which an abnormality occurs in the storage contents of the control program stored in the operation area 23-1.

This abnormality may be discovered by the above-mentioned regular check by the monitoring unit 30 or by other means. This occurs in the middle of a periodic check when an abnormality occurs one after another, and the part where the abnormality occurred is located in the input/output control unit 10.
This is a case where an abnormality is discovered by the parity check required for the 0 control operation.

In such a case, an interrupt signal is supplied from the control storage section 20 to the monitoring control circuit 31 of the monitoring section 30 in response to an abnormality discovered by the parity check, and from then on, the monitoring control circuit 31 sectors the flip-flop 32 as in the regular check. A wait signal of logic "1" is supplied to the input/output control section 10 to put it in a waiting state, and the memory contents of the operation area 23-1 are read out and compared with the contents of the control program stored in the auxiliary storage device 3. and performs abnormality detection operations.

If the comparison results are the same, the parity error that has occurred is considered to be an intermittent failure, and the flip controller 132 is reset, the input/output control section 10 is released from the waiting state, and the input/output operation is retried.

The following describes a case where an abnormality occurs and the contents of the control program stored in the auxiliary storage device 3 and the contents of the operation area 23-1 read by the supervisory control circuit 31 are not the same but different.

In this case, since an error has occurred in the storage contents of the operational area 23-1, the operational area 23-1 is at fault and cannot continue to be used. Therefore, the supervisory control circuit 31 sets the flip-flop 33 to logic "1".
The initialization signal 45 of "" is supplied to the input/output control section 10, and the flip-flop 34 is set to set the logic "1".
” is supplied to the control storage unit 20.

The input/output control unit 10 receives a logic "1" initialization signal 4.
5 to reset its program counter to its initial value. The control storage unit 20 switches the used memory area from the operational area 23-1 to the spare area 23-2 in response to the supply of the area switching signal 46 of logic 01''. The spare area 23-2 becomes unusable when a logic "O" signal is supplied through the terminal 47, and the spare area 23-2 becomes usable when a logic "1" switching signal is supplied.

Next, the supervisory control circuit 31 reads out the control program from the auxiliary storage device 3 and supplies it to the control storage section 20 .

As mentioned above, since the spare area 23-2 is available for use, the control program is written there.

Thereafter, the supervisory control circuit 31 resets the flip-flops 32 and 33 and sets the logic values of the wait signal 44 and the initialize signal 45 to '0'.

By doing this, the input/output control section 10 is placed in the spare area 23.
Control of input/output operations can be restarted based on the normal control program newly stored in -2. At this time, the logical value of the area switching signal 46 is maintained at 1''.

In this manner, in this embodiment, even if a failure occurs in the storage contents of the operational area 23-1, the failure can be avoided and business operations can be continued without system down.

〔Effect of the invention〕

In the present invention, the storage contents of the general spare area in the area for storing the control program of the input/output control device are periodically checked, and in the event of a failure, the failure can be avoided without system down by switching to the spare area and using the spare area. This has the effect of significantly shortening the time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. 1... Input/output control device, 2... Channel device, 3... Auxiliary storage device, 4...
・I/O device, 10...I/O control unit, 20・
... Control storage section, 21 ... Memory control circuit, 22 ... Memory circuit, 23-1 ... Operation area, 23-2 ...・Spare area, 24...
... Inverter, 30 ... Monitoring section, 31.
...Monitoring control circuit, 32-34...Flip frog, 35...Interval timer, 4
1...Channel bus, 42.43, 47.4
8...Connection line, 44...Wait signal, 45...Initialize signal, 46...
...Area switching signal.

Claims (1)

[Scope of Claims] Storage means comprising a first storage area and a second storage area used when the first storage area fails, and stores a control program supplied from an auxiliary storage device, and for a certain period of time. the control program stored in the first storage area in response to at least one of the interrupt signals supplied at each time or the interrupt signals supplied in a predetermined case; control program monitoring means for comparing the control program stored in an auxiliary storage device; and when the comparison results of the control program monitoring means are not the same, the first storage area is made unusable and the second storage area is 1. An input/output control device comprising: storage area switching means for making available storage areas;