JPS6053348A - Data retransmission system in data transfer device - Google Patents

Abstract

PURPOSE:To improve the processing capability of a high-order control section by providing a confirming response detecting circuit, buffer control circuit, timer circuit and a direct memory access circuit to a data transfer device to process automatically the retransmission processing having been conducted by the high- order control section. CONSTITUTION:The buffer control circuit 40 managing a memory circuit 20 storing a transfer data, direct memory access circuit 30 started by the buffer circuit, timer circuit 50 and a confirming response detecting circuit detecting the conforming response of the data transmitted already from a received data are provided. When the high-order control section 70 writes a transfer data to the memory circuit 20 and requests transfer to the buffer control circuit 40, the buffer control circuit 40 starts the timer circuit 50 and the direct memory access circuit 30 and performs transfer. When a confirming response detection circuit 60 detects a negative response and can not detect the confirming response for a prescribed time, the direct memory access circuit 30 retransmits automatically the data already transmitted.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a data transfer device IC connected to a data line.
This relates to a data retransmission method.

Conventionally, this type of data transfer device performed retransmission processing under the control of a higher-level control unit, so the retransmission data management M
! In addition, the faster the transfer speed of the data line, the greater the load due to processing by sending out retransmitted data.
There was a drawback of insufficient processing capacity.

The present invention solves the above drawbacks by automatically performing retransmission processing using a buffer control circuit, a timer circuit, a direct memory access circuit, and an acknowledgment circuit, thereby reducing the processing burden on the upper control unit. The present invention also provides a data retransmission method in a data transfer device that can be reduced in size.

In order to achieve the above object, the present invention includes a transmitting/receiving circuit connected to a data line, a memory circuit storing transferred data,
A data transfer device comprising a first level control unit connected to the memory circuit includes: a buffer control circuit for managing the memory circuit; a direct memory access circuit activated by the buffer circuit; The buffer control circuit includes a timer circuit and an acknowledgment detection circuit that detects an acknowledgment of sent data from received data. When a transfer is requested to the control circuit, the timer circuit and direct memory access circuit are activated to perform the transfer, and the acknowledgment detection circuit detects a negative response, and when no acknowledgment is detected for a certain period of time. In the case, ”=
The direct memory access circuit automatically causes the already sent data to be retransmitted. It is characterized by being composed of

Embodiments of the present invention will be described and explained below with reference to the drawings.

FIG. 1 is a block diagram showing a data transfer device equipped with an embodiment of the data retransmission method of the present invention.
0, a memory circuit 20 connected to the upper control unit 70, a buffer control circuit 40, and a direct memory access circuit 3.
0, a timer circuit 50, and an acknowledgment detection circuit 60.

The transmitting/receiving circuit 10 is directly connected to a memory access circuit 30 connected to the buffer control circuit 40 via a memory access control signal line d and a signal bus 3, and further connected to the buffer control circuit 40 via an acknowledgment detection signal line e. The acknowledgment detection circuit 60 connected to the signal bus line is also connected to the signal bus line. The upper control unit 70 connects the memory circuit 20 to the direct memory access circuit 30 via the signal bus C.
and a signal bus g, and are further connected to the buffer control circuit 40, which is connected to the timer circuit 50 via a timer control signal line f, by a data transmission/reception request signal line.

Next, the operation of the above embodiment will be explained with reference to the drawings.

First, on the transmitting side, when a data transfer request is received from the higher-level control unit 70, the higher-level control unit 70 transmits the data to the buffer control circuit 4.
The sofa control circuit 40 starts the direct memory access circuit 30 and the timer circuit 50, and writes data to the area in the memory circuit 20 managed by the transmitter/receiver circuit 1.
0 through the data line jVC data.

On the other hand, on the receiving side, the direct memory access circuit 30 transfers the data received through the data circuit 10 from the transmitting/receiving circuit 10 to an area in the memory circuit 20 managed by the buffer control circuit 40. Meanwhile, the acknowledgment detection circuit 60
Then, the confirmation response of the already sent gator is detected from the received data, and the emotion K is transmitted to the sofa control circuit 40.
(When the sofa control circuit 40 detects the acknowledgment, it discards the retransmitted data in the memory ton 20 and stops the timer circuit 50.

When the acknowledgment detection circuit 60 detects a negative response, or when the timer circuit 50 times out, the following message is sent: l fllll )+
J~40, the corresponding transfer data is immediately retransmitted via the eleventh concubine memory access circuit 30.

According to this embodiment, the second-level control unit 70 performs retransmission request processing f
, the tube 11 of the control circuit 40 without being conscious.
Data transfer is possible by threatening the ability to read the data in the memory area.

As explained above, the present invention provides a data transfer device with an acknowledgment detection circuit, a buffer control circuit, a timer circuit, and a direct memory access circuit, thereby automatically performing retransmission processing that has conventionally been performed by a higher-level control section. This has the effect of significantly increasing the processing capacity of the upper control unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a data transfer device equipped with a data retransmission system according to the present invention. 10... Transmission/reception circuit 20... Memory circuit 30...
・Direct memory access circuit 40...Buffer control circuit 50...Timer circuit 6
0... Acknowledgment detection circuit 70... Upper control unit 10
0... Data transfer device a l b, C, g... Signal bus line (1... Direct memory access circuit control signal line e... Acknowledgment detection circuit line f... Timer control signal line h. ...Data transmission/reception request signal line j...Data line applicant NEC Corporation

Claims (1)

[Scope of Claims] A data transfer device comprising a transmitting/receiving circuit connected to a data line, a memory circuit storing transferred data, and an upper control unit connected to the memory circuit, The buffer control circuit comprises a buffer control circuit for managing, a direct memory access circuit and a timer circuit activated by the buffer circuit, and an acknowledgment detection circuit for detecting an acknowledgment of received data and already sent data. When the upper control unit writes transfer data to the memory circuit and requests transfer to the buffer control circuit, it activates the timer circuit and direct memory access circuit to initiate the transfer, and The device is characterized in that the direct memory access circuit is configured to automatically retransmit the already sent data when the acknowledgment detection circuit detects a negative response or when no acknowledgment is detected for a certain period of time. data transfer device 1
ci-data retransmission method.