JPS6048097B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for making the thickness of glass adhered to a wafer uniform in the step of attaching glass to a wafer by electrophoresis.

When attaching glass to a wafer by the conventional electrophoresis method, as shown in FIG.
A silicon oxide film 3 is attached to the surface of a wafer having a PNP structure in which a mold region 2 is provided, a part of the silicon oxide film 3 is selectively removed by an optical method, and an etching solution is used to remove the silicon oxide film. Selective etching is performed using a mask to form mesa grooves 4, and glass 6 is adhered to the mesa grooves.

At this time, since etching is performed using the silicon oxide film as a mask, the side surfaces of the wafer's outer periphery are also etched at the same time. A Pf or N1 layer is formed on this side surface at the same time when the main junction is made, but this layer is also etched away as shown in number 5, so the relatively high resistance substrate is placed near the side surface. It will appear in Therefore, when glass is next attached by electrophoresis, contact between the electrode clips that sandwich the wafer and the wafer is made with the exposed part of the substrate, so ohmic contact does not occur and the contact resistance becomes large. However, when attaching glass to a plurality of wafers at the same time, the contact resistance of each wafer is different and the thickness of the attached glass is not uniform. An object of the present invention is to provide an effective method for manufacturing a semiconductor device that eliminates the drawbacks of the prior art.

A feature of the present invention is that the wafer has a ring-like shape or a part thereof at least 21 mm thick at the wafer's periphery so that ohmic contact can be obtained at the part where the wafer contacts the electrode clip.
The reason is that a P' or N' diffusion layer, a low-resistance epitaxial layer, or a low-resistance polysilicon layer is provided at a depth from the side surface on the three views.

This reduces ohmic resistance and improves the uniformity of glass adhesion. Next, embodiments of the present invention will be described using the drawings.

I As shown in Figure 2, N type 20~30Ω, C77
A silicon ingot 1' of No. 1 is prepared, and P2O5 is diffused in a high concentration over the entire surface of the ingot at a high temperature of, for example, 1300° C. for about 10 hours to form an N1 layer 7' on the entire surface. Next, this ingot is sliced along a cutting line 8 to a required thickness to obtain a wafer substrate 1 used in FIG.
At this time, the thickness of the Nf layer 7' is formed to be 213 or more of the slice thickness 1. As a result, the regions 7' and 7 are diffused more deeply in a later step, so that the relationship of 213 or more is sufficiently obtained just before mesa formation. Using this wafer, a P-type diffusion layer 2 is provided by performing a diffusion process in the same manner as in the conventional process. This surface is heated and oxidized to form a silicon oxide film 3.
will be established. Next, the silicon oxide film is selectively removed using an optical method, and a mesa groove 4 is formed by etching using a hydrofluoric acid-based etchant. The outer periphery of the wafer created in this process is etched to a depth of 60 microns as shown by number 5, as the N+ region 7 formed at the beginning is further progressed in the diffusion process to a depth of about 200 microns from the outermost periphery of a given wafer. Even after the high concentration region 7 remains, the ohmic properties are improved when sandwiched between the electrode clips, which makes it possible to achieve very good uniformity in the thickness of the glass when depositing the glass by electrophoresis. can.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a part of the manufacturing process according to the prior art. 2 and 3 are cross-sectional views showing the manufacturing process of one embodiment of the present invention, and FIG. 3 is an enlarged view of the portion surrounded by the dotted line in FIG. 2. In addition, in the figure, 1...
・Silicon substrate, 2...P-type diffusion layer, 3...
Silicon oxide film, 4... Mesa groove, 5...
・Portion eliminated by mesa etching, 6...Glass, 7...Peripheral diffusion layer of the present invention, 1'' N-type silicon ingot, 7''...N+ layer on the surface of the silicon ingot .

Claims (1)

[Claims] 1. A semiconductor device comprising the step of forming a mesa groove from one or both main surfaces of a semiconductor wafer in which an impurity region with a higher concentration than a semiconductor substrate is provided in the periphery, and attaching glass to the mesa groove by electrophoresis. A method of manufacturing a semiconductor device, wherein a depth of the high concentration impurity region from a side surface of the semiconductor wafer is 2/3 or more of the thickness of the semiconductor wafer.