JPS6042960A - Loop transmission method - Google Patents

Abstract

PURPOSE:To take a basic procedure terminal device which is different from each kind of terminal devices part in a network easily by allowing the network to relay all signals corresponded among terminals connected to this system in the unit of frames having a short fixed length when the terminals make communication mutually. CONSTITUTION:A frame processing section 3 sections all signals from a subscriber (SUB: terminal device or host computer concretely) into a fixed length, adds a header to each and trasmits each to an opposite station ST as a frame. Further, the header part is eliminated from the frame transmitted from the opposite station and outputs the result to the subscriber SUB without intermission. The frame processing section of each station, after the internal initialization is finished, starts a DMA for the frame reception from each subscriber and the loop. When the signal having a designated length is received, the DMA end interruption is generated. The nixt reception buffer address and data length are set in the program started by the DMA interruption and the DMA is restarted.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a loop transmission system, particularly when an asynchronous terminal called a basic procedure terminal or a SYN synchronous terminal communicates with a host computer via this system. This invention relates to a suitable loop transmission method.

[Background of the invention]

When a terminal and a host computer communicate via a conventional frame multiplexing network,
Of the signals that enter the network, only the data portion is relayed as frames. When this method was applied to a basic hand terminal, there were the following drawbacks.

(1) Special characters (called delimiters) indicating the start and end of the data section (F), k, lO, glaze type, etc. It is also necessary to consider their combinations. Therefore, since the process of extracting the data part from the signal is complicated, the network has no choice but to perform this process using a program. for that purpose,
It is necessary to interrupt the program for each character, which increases the CPU (central processing unit) overhead in the network.

(2) It may be necessary to change the network program for each type of terminal. For example, the usage of delimiters may be slightly different even for terminals that are 10 meters apart.

Also, depending on the terminal, it is necessary to send a signal other than data (break signal: a signal requesting the host computer to interrupt transmission) to the host computer.

(3) After the delimiter at the end of the data is detected within the network, that is, after one frame has been stored, the data is sent to the other station. Therefore, an intra-network delay occurs in the time it takes to transfer at least one frame over the subscriber line. Therefore, the actual data transfer rate between the terminal and the host computer is 172 or less.

[Purpose of the invention]

An object of the present invention is to provide an implementation method for a basic procedure terminal to communicate with a host computer via a frame multiplex loop transmission system.

[Summary of the invention]

In a time division multiplexed loop transmission system, signals exchanged between communicating terminals are passed through the network as they are. Depending on this, it is possible to make it appear as if the terminal is connected to the network via a line, and to join the network regardless of the terminal's procedure.

The present invention applies this concept to a frame multiplex loop transmission system. In the time division multiplexing system, operations within the network can be realized by hardware. On the other hand, in the frame multiplexing method, processing within the network is complicated, so software processing is unavoidable. Therefore, in order to realize the present invention, the following consideration is newly required.

The first is that fluctuations occur in the intra-network delay of the υ frame (the time from when the beginning of the frame enters the network until it begins to appear) due to CPU characteristics, so a means to absorb this is required.

Second, since the entire signal is divided into frames, the number of frames increases compared to a method in which only the data portion is divided into frames. Therefore, the throughput of stations within the network must be high.

The third is to make the frames entering the network or leaving the network continuous. If the frames are not consecutive, the signal will not be transmitted correctly to the other party's terminal.

[Embodiments of the invention]

FIG. 1 is a block diagram of a station in a loop network showing an embodiment of the present invention.

The l station ST connected to the loop transmission line 4 consists of three parts: a repeater 1, a loop transmitter/receiver 2, and a frame processor 3. The repeater 1 has a function of repeating data between the loop transmission path 4 and the next-stage loop transmitting/receiving section 2. In addition, the loop transmitter/receiver 2 is connected to the loop transmission line 4
The loop transmitter/receiver 2 has a function of controlling frame transmission and reception via the station. That is, the loop transmitter/receiver 2 writes the received frame addressed to its own station into the auxiliary memory 5.

Frame transfer from the auxiliary memory 5 to the main memory of the frame processing unit 3 is performed using DMA (DireCt Memory
Access).

The frame processing unit 3 divides all signals from a subscriber (SUB: specifically, a terminal or a host computer) into fixed lengths, attaches a tag to each signal, and transmits them as frames to the partner station ST. moreover.

To remove a header part from a frame transmitted from a partner station and output it to a subscriber SUB without interruption.

FIG. 2 is a diagram showing the structure of a frame used in the present invention.

The frame indicates the beginning and end of the frame.
F) - Own station address (SA) - Other station address (DA), own subscriber address (SUBS)
, the other party's address (3UBD), data (DT), and frame check sequence (Fe2).

The area from Naori A to 8UBD is called a frame header.

Next, specific operations at each station will be explained.

As shown in FIG. 3, the transmitting/receiving buffer provided in the main memory within the station is configured as follows.

- Allocate a fixed number of fixed length buffers for each transmission/reception corresponding to subscribers (SUB). Let Bs and Ba be the transmitting buffer and receiving buffer corresponding to the subscriber, respectively.

・Common buffer (CB:
Fixed length and fixed number) Note that the number of buffers and buffer length for each buffer differ depending on the target system. As the number of transmission buffers, the minimum value is selected from among the numbers sufficient to compensate for intra-network fluctuations.

In addition, the number of receiving buffers is such that the probability that the buffer becomes busy when receiving signals from subscribers is very small (
For example, it takes a value of 10-8). Furthermore, the number of common buffers takes a value that makes the probability that the buffer becomes busy when receiving 7 frames of loose data very small.

The buffer length is determined by the allowed intra-network delay and the station's C.
It is determined by the processing capacity of the PU. That is, if the 7-frame length is shortened, the delay within the network will be small, but the number of frames will increase and the load on the CPU will increase.

After the frame processing unit of each station completes its internal initialization (program loading, table, buffer initial value setting, etc.), it starts up to DMA' to receive frames from each subscriber and the loop.

The address of the buffer designated by this DMA activation is the first buffer address of BR in the case of a glaze, and the first buffer address of CB in the latter case. Furthermore, D
The data length specified when starting the MA is the length of dividing the signal and is constant. As a result, signal reception from the subscriber is started.

Upon reception of a signal of the specified length, a DMA completion interrupt is generated. The program activated by the DMA interrupt sets the primary receive buffer address (BR's two buffer addresses) and data length, and restarts the DMA. If the line speed is fast and the next D
If there is a possibility that the MA may not be able to start up, the system is such that the DMA'e of the hole is automatically started up using hardware.

This is because if even one bit fails in reception, there is a risk that the data will not be transmitted correctly to the other subscriber.

Now, the frame processing unit 3 sets a header in the frame received from the subscriber by DMA, and transfers the frame to the auxiliary memory of the loop transmitting/receiving unit by DMA.

FIG. 4 shows a method of creating frames from signals. The loop transmitting/receiving unit transmits when its own ST obtains the right to transmit (for example,
A special signal called a token is passed around, and the ST that catches the token gets the transmission right) and sends the frame in the auxiliary memory to the loop transmission line.

The ring core frame is taken into the ST specified by DA and received by the auxiliary memory 5 of the loop transmitter/receiver 2 of the partner ST.

Furthermore, this frame is DMA-transferred to the common buffer CB of the main memory 6 of the frame processing section 3. The frame processing unit 3 checks which subscriber the received frame is addressed to by checking the 5UBD of the frame header.

Transfer to subscriber-compatible buffer. This is due to fluctuations in delay within the network, and the data portion excluding the header portion is sent to the subscriber from the buffer. This fluctuation is caused by the cPU load of the ST in the network, the way frames arrive at the ST, and the transmission waiting time due to the load on the loop transmission path. Therefore, when inputting the network,
Even if frames occur at regular intervals, they arrive at the network exit with fluctuations. Therefore, in order to be able to continuously output frame K to the subscriber even when the maximum fluctuation occurs, the first frame that comes at the time of system start-up is transmitted within the network for more than the maximum fluctuation time at the destination ST. After making the subscriber wait, output to the subscriber is started.

FIG. 5 shows the flow of data from a signal sent from a subscriber until it reaches the other subscriber.

FIG. 6 shows an example of the JL configuration of the station according to the present invention, and is an example in which the loop transmission path is constructed of optical fibers.

This station basically consists of an optical modulator/demodulator 1, a loop transmitter/receiver 2. It consists of a frame processing section 3.

The optical modulator/demodulator 1 has optical/electrical conversion and repeat functions. The loop transmission/reception section 2 includes: a changeover switch section 2 a droop transmission control section 22; Loop reception control section 23/buffer control section 24. Buffer 25, bus 26 and common bus control unit 2
Consists of 7.

The loop transmission control unit 22 performs the following processing.

The data sent from the frame processing section 3 is taken into the buffer 25. Note that the buffer 25 corresponds to the auxiliary memory 5 in FIG. The data stored in the buffer 25 is sequentially output in units of one frame (data + transmission control information) as shown in FIG.

Convert this to bit serial data at loop transmission speed.
The signal is sent to the optical loop 4 via the changeover switch section 21.

Also, during the transmission operation, CRO calculation is performed on a frame-by-frame basis, and frame check FC8 addition, LA addition, 0 insertion, etc. are performed.

Further, the loop reception control unit 23 performs the following processing.

The bit-serial data sent at the loop transmission rate (> bus transfer rate) is converted into bit-parallel data by the shift register. It is determined whether the data has been sent to its own station, and if so, the frame is input. The received data is put into a temporary buffer and the speed is adjusted. Also, during the reception operation, the CRC of the data
Performs checking, “0” deletion, abort detection, etc.

The buffer control unit 24 controls VO to the buffer 25. The common bus control unit 27 provides l10f via the common bus,
Control.

On the other hand, the frame processing section 3 includes a common bus control section 31, a microprocessor 32, a main memory 33, and a main memory control section 3.
41 line control section 35, bus 36 and DMA control section 37
It becomes more. Microprocessor 32 executes programs located in main memory 33. The main memory 33 stores data as well as programs. The line control unit 35 controls Ilo with the subscriber.

The microprocessor 32 processes frames received from loops or subscribers and controls DMA (direct memory access).

The DMA control section 37 performs DMA transfer between the main memory subscriber lines and between the main memory buffers.The loop transmitting/receiving section 2 and the frame processing section 3 are connected via a common bus 41.This common bus 41 is controlled by the bus arbiter 42. [Effects of the Invention] According to the present invention, in a loop transmission network, the network program can control the terminals to join without being aware of the procedures and types of the terminals. This has the effect that basic procedure terminals, whose procedures differ slightly depending on the type of terminal, can easily join the network.

In addition, in a system in which the network relays only the data part of the basic procedure terminal, it is necessary for the ST of the network to receive and process interrupts in byte units, but according to the present invention, the interrupts to the ST are processed every few tens of bytes. This has the effect of easing constraints on performance bottlenecks.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a station in a loop network showing an embodiment of the present invention, FIG. 2 is a block diagram of a frame used in the present invention, and FIG. 3 is a block diagram of the main memory 6 of the frame processing section 3 of the embodiment. Buffer configuration diagram, FIG. 4 is a diagram showing frame creation operation in an embodiment of the present invention, FIG. 5 is a diagram showing how data flows in an embodiment of the present invention, and FIG. 6 is a diagram showing an embodiment of the present invention. It is a concrete block diagram of the station shown. DESCRIPTION OF SYMBOLS 1... Repeater (optical curvature demodulation section), 2... Loop transmitting/receiving section, 3... Frame processing section, 4... Loop transmission line, 5゛... Auxiliary memory, 6.33- 1. ．． 33-2・
・・Main memory ・21 ・Selector switch, 22 ・Loop transmission control unit ・23 ・Loop reception control unit, '25
-1.25-2...Buffer, 32-4.32-2.
...Microprocessor, 34-1.34-2...Main memory control section ・35-1.35-2...Line control section,
36-1゜36-2...Internal bus, 37-1.37-
2...PMδuB Figure 4 Figure 5

Claims (1)

[Claims] 1. Multiple stations are connected to a loop transmission line,
When terminals connected to one system communicate with each other in a so-called variable-length frame multiplexing loop transmission network that transfers variable-length frames between these stations,
All signals exchanged between these terminals are relayed by the network in units of short, fixed-length frames, so the network does not intervene in the data link control of the terminals, and the signal type and signal are transmitted to the other terminal. A loop transmission method characterized by being able to transmit the time interval of the signal to the other party's terminal.