JPS6038831A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To further upgrade a higher integration of the IC by a method wherein an isolation region in a grooved isolation structure, wherein no bird's beak is generated, is formed at a part, where high integration is needed, and a thick oxide film is formed at a wide region other than the isolation region in such a way as to interposed between the grooved isolation structures. CONSTITUTION:A silicon dioxide film 2 is formed on the surface of a P type silicon semiconductor substrate 1, and after a silicon nitriding film 3 was formed thereon, grooves 4 are formed and the surface is partitioned into numerous regions. In addition to an element forming region 5, a region 6, where no element is formed, is also included. After an embedding material 9 consisting of such an insulator as a silicon dioxide, etc., was deposited on the whole surface of the substrate 1, the surface of the substrate 1 is flattened. After an oxidation-resistant silicon nitriding film 10 was deposited on the whole surface, a part corresponding to the region 6, where no element is formed, is selectively removed and a thick oxide film 11 is formed on the surface. The silicon nitriding film 10 and the silicon dioxide film 2 are removed, the silicon surface of the surface 1 is made to expose and an etching is performed on a part of the embedding material 9, where is appearing upwards from the substrate 1. As a result, the substrate 1 is completely flattened.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to an element isolation technology for electrically isolating element formation regions, particularly to high JJ, 5-product semiconductor integrated circuit devices (hereinafter referred to as ICs). J3 relates to a technique that is effective when applied to the case where an isolation region is formed by digging a trench on one surface of a semiconductor substrate and filling the trench (1ζ) with an insulator (hereinafter referred to as a "pre-grooving structure").

[Background technology] Conventionally, as an element isolation technology, LOGO3 (Loca
The 1 oxidation of 5 silicon) method is common.

However, this LOCO8 method has the occurrence of so-called bird's beak, which is an undeniable problem in achieving high integration.

On that point, the grooved separation structure described above has almost no bird's beak and the dimensional conversion difference from the resist dimension is almost 0.
Therefore, it is extremely effective for high integration. This is largely due to the advantages of dry etching, especially reactive ion etching with almost no side etching.
(See March 29, 1998, p.90-101).

By the way, when trying to fill a trench with an insulator, it is relatively easy to fill a narrow trench, for example, about 1.0 to 2.5 μm, but it is relatively easy to fill a trench with a wide trench, especially when compared to the depth. It was found that large depressions inevitably appeared on the surface where the width was wide. In ICs, it is necessary to provide a wide isolation area for forming wiring sections on the layerer 1 to above of each element such as a transistor, especially in a selected part of the chip such as the periphery of the chip. How to configure the separation area is a major bottleneck in manufacturing.

[Purpose of the Invention] An object of the present invention is to provide a technology for a grooved isolation structure that solves the difficulties of the grooved isolation structure and allows formation of a wide isolation region.

The above-mentioned and other novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

In other words, the grooved 1'l11 structure, which does not cause bird's beak, is used for isolation between elements in areas that require high integration.
Further, the other wide region portions are constructed by a combination of a trench isolation structure and a thick selective oxide film formed by the LOCO8 method. Moreover, in this case, a narrow trench isolation structure portion is formed first, and then a thick selective oxide film is formed so that the trench isolation structure is located at both ends. Therefore, when forming a thick selective oxide film, the narrow isolation region can accommodate the bird's beak of the selective oxide film, forming a thick selective oxide film with an almost uniform thickness over the entire wide region. can do.

[Embodiment 2] The embodiment shown in the drawings shows a case in which it is applied to the manufacture of MOS IC, and FIGS. 1 to 6 are cross-sectional views during processing shown in the order of processing steps.

(Refer to Figure 1) First, P-type silicon semiconductor substrate with plane orientation (100)]
The surface of the silicon dioxide film (SiO2 film) is thermally oxidized to form a silicon dioxide film (SiO2 film).
A silicon 1-ride film (S i 3 N4 film) 3 is formed thereon by, for example, the CVI method. The upper silicon nitride film 3 serves as a mask for groove formation, and also serves as a stopper during etching back of the buried material, which will be described later. The lower silicon dioxide film 2 is used to reduce stress caused by direct contact between the silicon of the substrate 1- and the silicon dioxide films 1-3.

Next, a window is opened in the film 3, 2 at a portion where a separation region is to be formed, and a groove 4 is formed on the surface of the substrate 1 by reactive ion etching using the window-opened film 3, 2 as a mask.

The width of the trench 4 is set to be approximately constant, for example, approximately .mu.rn, in order to facilitate the subsequent embedding. Although the surface of the substrate 1 is imaged in many areas by such grooves 4,
In addition to the element forming region 5, this includes a region 6 in which no element is formed. Incidentally, since the etching rate of Si3N4 in reactive ion etching can be made approximately 1/1O of that of Si, the depth of the groove 4 can be made sufficient for electrical isolation. When the etching of the deep groove 4 is completed, the Si3N film 3 is left as a mask and serves as a stopper when etching back the buried material.

(Refer to FIG. 2) Next, by lightly oxidizing the inner surface of the groove 4, a M silicon dioxide film 7 having a thickness of, for example, several tens of nanometers is formed, and then the entire upper surface of the semiconductor substrate 1 is covered with boron, etc. A P+ type channel stopper 8 is formed at the bottom of the trench 4 by ion-implanting P type impurities. Then, a filling material 9 made of an insulator such as silicon dioxide (SiO2) is deposited over the entire surface of the substrate 1 including the groove 4 by high temperature and low pressure CVD or plasma CVD. This amount of deposition needs to be at least 172 times the width of the groove 4 or more.

(See FIG. 3) After depositing the embedding material 9, the deposited embedding material 9 is etched back by reactive ion etching or the like to planarize the surface of the substrate 1. At this time, since the Si3N4 film 3 acts as a stopper, good flatness can be obtained. Further, in this case, since the width of the groove 4 is made constant over the entire surface of the substrate 1, the surface of the deposited embedding material 9 is substantially flat after the deposition, and the surface flattening process on the deposited material 9 is relatively easy.

In some cases, it is preferable to apply a resist or SOG (spin-on glass) on the deposited buried material 9 and then flatten the surface by the isotropic etching. In this way, the surface can be more effectively flattened. In addition, since Si3N4, which has a higher hardness than SiO,z, remains on the surface of the substrate 1, the Si
Surface flattening can also be achieved by mechanical polishing by using 3N4 as a stopper.

(Refer to FIG. 4) Next, on the surface of the substrate 1 which has undergone surface flattening treatment,
After depositing the oxidation-resistant silicon nitride films 1 to 1o, the portions of the silicon nitride film 1o corresponding to regions 6 where no elements are to be formed are selectively removed by photolithography. In this case, it is important that the etched end face 100 of the film 10 be positioned near the trench 4 so that the bird's beak caused by the subsequent selective oxidation can be received by the filling material 9 in the trench 4.

(Referring to FIG. 5) Next, the silicon nitride film 1o or the film 1
A thick oxide film 11 is formed on the surface of the region 6 where no element is to be formed by selective oxidation technique using 0 and 3 as masks. By this selective oxidation treatment, the etched end surface 100
A so-called bird's beak inevitably occurs in the vicinity of , but since the isolation region 12 of the grooved isolation structure is previously formed in that region, the bird's beak continues to the part of the buried material 9 in the isolation region 12 . Therefore, the thick oxide film 11,
The thickness is also considerable in the vicinity of the isolation region 12. Although not shown in FIG. 1, prior to selective oxidation, a thick oxide film 11 is formed by implanting boron, which is a P-type impurity, into the surface of the region 6.
A P+ type channel stopper can also be formed at the bottom of the channel.

(Refer to Figure 6) After selective oxidation treatment, silicon tee 1~ used as a mask
The ride films 10 and 3 are removed by etching, and the silicon dioxide film 2 is further removed to expose the silicon surface of the substrate 1-. Next, the portion of the buried material 9 that is exposed above the substrate 1 is etched to completely planarize the substrate 1.

Separation between the elements is completed by kneading. After this, a semiconductor element such as a MOS FET can be formed in the electrically isolated element forming region 5 by a known method as shown in FIG.

[Effects] (1) An isolation region with a grooved isolation structure that does not cause bird's beak is formed in areas that require high integration, such as forming memory cells, and a grooved isolation structure is formed in other wide areas. Since a thick oxide film is formed using the LOCoS method between the grooves, it eliminates the difficulty of trench isolation structures, such as the difficulty of filling in wide trenches.
By taking advantage of the R&D isolation structure, it is possible to further improve the high integration of ICs.

(2) Since a narrow trench isolation region is formed first, and then a thick oxide film is formed using the LOCO8 method, the bird's beak of the thick oxide film can be accommodated in the trench isolation region. A thick oxide film can be formed to have a substantially uniform thickness over a wide area. Therefore, at the stage of forming an IC, the stray capacitance between the wiring running on the thick oxide film and the substrate can be reduced to a negligible value.

Hereinafter, this invention has been specifically explained based on examples, but it goes without saying that this invention is not limited to the above-mentioned examples and can be modified in various ways without departing from the gist thereof. . For example, when forming a new oxidation-resistant silicon nitride film 10, the silicon nitride film 3 remaining on the substrate 1 can be completely removed before being deposited. By doing so, it is possible to more reliably prevent the occurrence of crystal defects that may arise from stress in the silicon nitride film. In addition, in FIG. 1, 5i02
The 5i02 film, the Si3N4 film 3.5i
The groove 4 may be formed by etching the 02 film 2 to open a window and using this three-layer film as a mask. In this way, Si3N
4. Decrease in the film thickness of the film 3 can be prevented.

[Field of Application] This invention applies not only to MOS ICs but also to bipolar ICs.
Furthermore, it can be widely applied as a method for separating elements in ICs, such as when both MOS and bipolar elements are formed on the same substrate.

This is a diagram.

1... Semiconductor substrate, 2... Silicon dioxide film, 3.
...Silicon nitride film, 4...Groove, 5...Element formation region, 6...Region where no element is formed, 7...
Silicon dioxide film, 8... Channel stopper, 9...
・Embedded material, 10... Silicon nitride film, 1
1...Thick oxide film, 12...Isolation region, 13...
Source/drain layer-14...gate electrode, 15...
・Gate oxide film, 16... Oxide film, 17... First passivation film, 18... Aluminum wiring, 19
...Final passivation film.

Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] ]-1 One surface of the semiconductor substrate has a groove whose width is approximately constant;
The trench is divided into a large number of regions by the isolation region made of the embedded material filled in the trench, and among the many partitioned regions, the surface portion of the region where the semiconductor element is not present has a gentle slope at the end. 1. A semiconductor device characterized in that a thick oxide film is present. 2. The semiconductor device according to claim 1, wherein an end of the thick oxide film formed by selective oxidation is continuous with a portion of the buried material in the isolation region. 3. A step of forming a trench with a substantially constant width on one surface of the semiconductor substrate, a step of embedding a filling material in the trench, and a step of selectively oxidizing a region where a semiconductor element is not to be formed in an isolation region separated by the trench. A method for manufacturing a semiconductor device, including a step of forming a thick oxide film. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the embedding material is made of polysilicon, and after embedding the embedding material, the polysilicon is oxidized to form a silicon oxide layer. 5. The method of manufacturing a semiconductor device according to claim 3, wherein the end portion of the thick oxide film formed by selective oxidation is formed to be continuous with a portion of the buried material in the isolation region.