JPS6031671U - power measurement device - Google Patents
power measurement deviceInfo
- Publication number
- JPS6031671U JPS6031671U JP12338483U JP12338483U JPS6031671U JP S6031671 U JPS6031671 U JP S6031671U JP 12338483 U JP12338483 U JP 12338483U JP 12338483 U JP12338483 U JP 12338483U JP S6031671 U JPS6031671 U JP S6031671U
- Authority
- JP
- Japan
- Prior art keywords
- multiplier
- output
- square root
- rectifier
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図はこの考案による電力測定装置の一実施例を示すブロ
ック図で、１は電圧信号Ｖの入力端子、２は第１の乗算
器、３は第１の整流器、４は第１のルータ、５は電流信
号ｉの入力端子、６は第２の乗算器、７は第２の整流器
、８は第２のルータ、９は第３の乗算器、１０は第３の
整流器、１１は実効電力Ｗの出力端子、１２は第４の乗
算器、１３は皮相電力Ｐの出力端子である。The figure is a block diagram showing an embodiment of the power measuring device according to this invention, in which 1 is an input terminal for a voltage signal V, 2 is a first multiplier, 3 is a first rectifier, 4 is a first router, and 5 is a first multiplier. is the input terminal of the current signal i, 6 is the second multiplier, 7 is the second rectifier, 8 is the second router, 9 is the third multiplier, 10 is the third rectifier, 11 is the effective power W 12 is the fourth multiplier, and 13 is the output terminal of the apparent power P.
Claims (1)
圧信号を平方する第１の乗算器と、上記第１の乗算器の
出力を整流する第１の整流器と、上記第１の整流器の出
力の平方根を出力する第１の平方根関数器と、上記交流
電流信号を平方する第２の乗算器と、上記第２の乗算器
の出力を整流する第２の整流器と、上記第２の整流器の
出力の平方根を出力する第２の平方根関数器と、前記交
流電圧信号と交流電流信号の積を出力する第３の乗算器
と、上記第３の乗算器の出力を整流する第３の整流器と
、前器第１の平方根関数器の出力と第２の平方根関数器
の出力の積を出力する第４の乗算器から構成され、交流
の実効電力と皮相電力を直流電圧とし、て出力するよう
にしたことを特徴とする電力測定装置。a first multiplier that receives an AC voltage signal and an AC current signal and squares the AC voltage signal; a first rectifier that rectifies the output of the first multiplier; and an output of the first rectifier. a first square root function generator that outputs the square root of , a second multiplier that squares the alternating current signal, a second rectifier that rectifies the output of the second multiplier, and a second rectifier that rectifies the output of the second multiplier; a second square root function generator that outputs the square root of an output; a third multiplier that outputs the product of the AC voltage signal and the AC current signal; and a third rectifier that rectifies the output of the third multiplier. , a fourth multiplier that outputs the product of the output of the first square root function unit and the output of the second square root function unit, and outputs the AC effective power and apparent power as DC voltage. A power measuring device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12338483U JPS6031671U (en) | 1983-08-09 | 1983-08-09 | power measurement device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12338483U JPS6031671U (en) | 1983-08-09 | 1983-08-09 | power measurement device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6031671U true JPS6031671U (en) | 1985-03-04 |
Family
ID=30281670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12338483U Pending JPS6031671U (en) | 1983-08-09 | 1983-08-09 | power measurement device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6031671U (en) |
-
1983
- 1983-08-09 JP JP12338483U patent/JPS6031671U/en active Pending
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