JPS6027989B2 - keyboard performance practice device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a keyboard performance training device that compares the state of note length corresponding to a key depression operation on a keyboard section with a model performance to determine a practice key depression state.

When practicing playing a keyboard instrument, students operate the keys in accordance with the musical score, and repeat this process in order to faithfully reproduce the content expressed in the musical score.The teacher is responsible for determining the content of the performance. This is done by listening to the performance.

That is, the teacher listens to the student's performance, corrects the student's mistakes, and gives guidance based on musical sense, along with accurate key pressing. However, although this type of teaching method is very effective when the teacher and student are 1:1, in the case of group training where one teacher has multiple students, it is difficult for the teacher to see. The information does not reach each student individually, making it difficult to provide sufficient training. In addition, in this type of training, the student's judgment of note length, for example, is based on the subjective judgment of the teacher's ears, and it is difficult to make the student clearly understand the situation in which the error occurs. Therefore, especially when students are practicing keyboard performance by themselves, it is difficult for students to recognize whether their performance is accurate or not in accordance with the musical score.

This invention was made in view of the above points, and allows students to fully understand their own key operation status, especially whether note length expression, which is important in musical expression, is being performed accurately or not. The purpose is to provide a keyboard performance practice bag that allows the user to recognize the current situation and judge the effectiveness of practice while working with a teacher or studying alone.

That is, the keyboard performance practice bag according to the present invention generates the first key-on and key-off signals in response to the note information of the model performance information, and also generates the second key-on and key-off signals in response to key operations on the practice keyboard. generates key-on and key-off signals, and
A key-on timing number signal is generated when the second key-on signal matches, and the bistable circuit, which is set to the first state by the first or second key-off signal, is switched to the second state by the key-on timing matching signal. In the second state of this bistable circuit, the matching state of the first and second keying signals is detected to obtain a correct code length signal.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows its configuration, in which a master keyboard 11 operated by a teacher generates model performance information corresponding to the teacher's keyboard performance operations. In other words, this keyboard 11
With the key operation, pitch information corresponding to the pitch of the operated key is generated.This pitch information is generated at each key operation timing, and the first note length information also includes note length information. It is said to be music score information. Information from this keyboard 11 is supplied to a musical tone forming circuit 12 on the base unit side, which generates a musical tone signal corresponding to the operated key, and this musical tone signal is supplied to a speaker 14 via an amplifier 13, It comes to be pronounced as a model performance sound on the side. In this case, the musical tone generating circuit 12 has an automatic rhythm generating device built-in as appropriate, and an automatic rhythm signal from this rhythm generating device is also generated from the speaker 14 as a rhythm performance sound, and the teacher can play along with the rhythm sound. It becomes like this.

The model performance sound information from the master keyboard 11 is distributed and supplied to the child unit 15 used by the student, together with a tempo clock signal corresponding to the rhythm tempo obtained by the musical tone forming circuit 12.

A plurality of slave units are subordinated to one master unit, and in the figure, only one of them is shown. The handset 15 is equipped with a practice keyboard 16 used by the student, and as the keys are pressed, pitch information corresponding to the pitch of the operated key is transmitted from the keyboard 11 in accordance with the state of the key operation. is generated. The pitch information from the keyboard 11 is used as second musical score information, and is supplied to the musical tone forming circuit 17, which forms a musical tone signal corresponding to the operated key, and also supplies it to the speaker 9 via the amplifier 18. You can now hear it as the sound of the child unit playing. The first musical score information from the master unit and the second musical score information from the keyboard 16 are distributed and supplied to timing, pitch, and note length judgment circuits 20, 21, and 22, respectively.

The timing judgment circuit 20 judges whether the key press timing on the keyboard 16 is good or bad based on the combined first and second musical score information and the key-on timings of both of them. The results are appropriately scored and displayed on the display 23. The pitch judgment circuit 21 also compares the pitches and displays the correct scoring results on the display 24.
Further, the note length judgment circuit 22 compares the note lengths and displays the scoring results on the display 25. Further, the judgment result information from the pitch and note length judgment circuits 21 and 22 is fed to the pitch and note length judgment circuit 26, and the overall scoring result of the pitch and note length is displayed on the display 27. It becomes.

In this embodiment, the performance information from the master keyboard played by the teacher is used as the model performance information source, but in the case of self-study practice, the model performance information can be stored as appropriate. must be configured to read and use the .

FIG. 2 also shows a case where the above-mentioned stored performance information is used as a model performance information source, and the storage device 28 for storing the model performance information is constituted by, for example, a RAM.

The storage device 28 stores, for example, notes on a musical score for the upper keyboard of an electronic musical instrument, with addresses set in the order in which they occur, and each piece of musical score information includes pitch (UK) information and notes. The format of the stored information is as shown in FIG. 3, for example. That is, the pitch information "UK[11"] of the first note information is stored at the first address of the storage device 28, and the note length information "LENG" of the above note is stored at the address following this.
Write and set TH[11]. Then, in note order, "UK[2'", "LENGTH■", "UK'3}"
. . . various pieces of information are written and set, and an end code "FIHISH" is written and set at the final address position where the note information of all songs ends. Here, each pitch and note length information is composed of, for example, 8 bits, and the first two bits form a UK mark indicating pitch information, a note length mark indicating note length information,
The remaining 6 bits constitute a pitch key code and a numerical code representing note length.

In particular, the rest mark is composed of pitch information having a UK mark, and the key code part is composed of all "0"s. The model performance information written to this storage device 28 is recorded, for example, in a magnetic recording section set in a musical score, and although it is omitted in the figure, the magnetically recorded information is read out by an appropriate reading means, and The address is set and written to the storage device 28.

The model performance information written in the storage device 28 is sequentially read out in correspondence with the count address information from the address counter 29, and the judgment circuits 20 to 22 are constructed in the same manner as shown in FIG. The performance information from the practice keyboard 16 is then compared with the performance information.

The read information is further supplied to the latch circuit 30 and the end code detection circuit 31.
For 0, a latch storage command is given by a detection signal from a note length mark detection circuit 32 that detects a note length mark from the read information of the storage device 28. That is, storage device 2
When the note length information is read from 8, a latch command is given from the note length mark detection circuit 32 to the latch circuit 30, and the latch circuit 30 latches and stores the note length numerical information following the note length mark of the note length information. It is something that you will learn to do. The code length value information latched and stored in the latch circuit 30 is supplied to a comparison circuit 33, which compares the count value of the note length counter 34,
The comparison circuit 33 outputs an equal signal EQ when the count value of the counter 34 matches the latch code length value information.
occurs.

The note length counter 34 is reset by the detection signal from the note length mark detection circuit 32 and counts the tempo clock signal from the tempo oscillator 35.
8, the elapsed time since the note length information was read out is counted. Here, since the tempo oscillator 35 generates a reference clock for the rhythm tempo, the oscillation clock signal is supplied to the automatic rhythm generator 36, which generates a rhythm sound source signal of the selected and specified rhythm type as appropriate.
The rhythm sound source signal is supplied to an amplifier 18, which is supplied with a musical tone signal corresponding to the operation.

Then, an automatic rhythm performance sound is generated from the speaker 9, and the student operates the keyboard 16 for practice performance in accordance with the rhythm performance sound. The equal signal EQ obtained from the comparison circuit 33 is differentiated by a differentiating circuit 37 and a set command is given to a flip-flop circuit 39 via an OR circuit 38.

This flip flop. The top circuit 39 is reset by the detection signal from the note length mark detection circuit 32, and when it is set, it gives a gate signal to the AND circuit 40, takes out the system clock J, and counts the steps in the address counter 29. Now gives advance command. The start of this device is controlled by operating a start switch 41. This switch 41 is configured, for example, as a self-resetting type, and when operated, generates a signal of "1", and the rising edge of this signal is detected by a differentiating circuit 42. It is designed to be detected.

The output signal from the differentiating circuit 42 is used as a signal STRT for initial setting command, and is supplied to the judgment circuits 20 to 22 and 26, for example. Further, the output signal of the differentiating circuit 42 provides a start time set command to the flip-flop circuit 39 via the OR circuit 28, and also provides a reset command to the address counter 29 via the flip-flop circuit 43 and the OR circuit 44, respectively. When set, the flip-flop circuit 43 gives a signal to the OR circuit 44 to reset and hold the address counter 29, and in the reset state, gives a start signal to the automatic rhythm generator 36 to set it in the driving state. Automatic rhythm performance will start when the button is operated. That is, when the start switch 41 is operated, a differential pulse signal is generated from the differential circuit 42 in response to the immersion, and the OR circuit 4
4, the address counter 29 is reset and confirmed, and the flip-flop circuit 39 is reset via the OR circuit 38.
is set, and a gate signal is given to the AND circuit 40.

Therefore, the clock signal ◇ is supplied to the address counter 29, and the storage information "UKm" at the first address is read out from the storage device 28 in accordance with the increment of the count.
~22. When the note length information "LENGTHm" is read out from this UK information, an output signal is obtained from the note length mark detection circuit 32, and the latch circuit 30' latches and stores the note length information. Flipf. The CPU resets the top circuit, closes the gate of the AND circuit 40, stops the address counter 29 from incrementing, and stops reading from the storage device 28. Also, at the same time,
The detection signal from the note length mark detection circuit 32 resets the note length counter 34, and the counter 34 starts counting tempo clock pulses from its initial state. Therefore, when the time corresponding to the note length information has elapsed since the reading of the note length information, the count value of the counter 34 comes to match the note length information stored in the latch circuit 3, and The equal signal EQ is generated and the differentiating circuit 3
Once the flip-flop circuit 39 was set to the 7 output,
The address counter 29 starts incrementing and the memory device 28
The information "UK■" of the next address is read from the address. That is, pitch (UK) information corresponding to a note is sequentially read out from the storage device 28 at time intervals corresponding to the note length, and is read out as model performance information by the judgment circuits 20 to 28.
It came to be inherited in 22. On the other hand, the output signal of the differentiating circuit 42 accompanying the operation of the start switch 41 is
The flip-flop circuit 43 is reset, the reset command to the address counter 29 is released, and a start signal is given to the automatic rhythm generator 36 to start automatic rhythm performance. Then, the student practices keyboard performance by operating the keyboard 16 in response to the automatic rhythm performance sound. The performance practice on the keyboard 16 is performed based on the musical score representing the model performance information stored in the storage device 28, and the key operations on the keyboard 16 are faithful to the contents written on the musical score. For example, the performance note information obtained from the keyboard 16 and the information read from the storage device 28 match in terms of timing, pitch, and note length, and each judgment circuit 20 to 22 determines the correct score. is displayed on the displays 23-25.

Further, the determining circuit 26 determines that both the pitch and the note length are accurate, and the display 27 displays this. FIG. 4 specifically shows means for comparing and determining the first note information from the storage device 28 and the second note information from the keyboard 16, which are read out from the memory calendar 28. The first note information is supplied to the latch circuit 45.

This latch circuit 45 is given a latch command by a detection signal from a UK mark detection circuit 46 that detects a UK mark from the first musical note information, selects UK information from the read information from the storage device 28, and latches it. Start remembering. The storage device of this latch circuit 45 is the first
It comes to be used as the first pitch information corresponding to the note information of. The detection signal from the UK mark detection circuit 46 includes a rest mark, is generated every time UK information is read from the storage device 28, and is used as a signal for the final position of the mark period. It comes to be used as a key-off signal corresponding to each note of performance information.

That is, a detection signal from the UK mark detection circuit 46 is converted into a pulse signal by a one-shot circuit 47, and taken out via a delay circuit 48 consisting of a delayed flip-flop driven by a tempo clock TCL, and is output as the first key-off signal A△. Use as 1. Also, the OR circuit 49 detects a state in which the input note information is not all "0" (rest marks),
If the output signal from the OR circuit 49 is supplied to the AND circuit 50 together with the output signal from the UK mark detection circuit 46, an output signal will be obtained from the AND circuit 50 every time UK information corresponding to a note is read. , it comes to be used as a key-on signal.

That is, the output signal from the AND circuit 50 is converted into a pulse signal by the one-shot circuit 51 and taken out via the delay circuit 52 as the first key-on signal AΔ2. Then, this signal A△2 is counted by the first parameter counter 53 as a signal corresponding to the key press, and the parameter information for scoring is “80SU
It will be extracted as "M". Further, the first key-off signal AAI also has a second key-off signal as the number of UK information including a rest mark.
The parameter information “BOSU [2] is counted by the parameter counter 54 of
}”. The parameter counters 53 and 54 are reset and initialized by the start signal STRT. The second note information corresponding to the operation of the keyboard 16 is
It is supplied to the comparator circuit 55 as comparison information A as pitch information, and also supplied to the delay circuit 56.
The output information is supplied to the comparison circuit 55 as comparison information B.

This comparator circuit 55 generates an output signal when input information A and B do not match (A±B).
An output signal is generated when a key is operated in or when a key that has been pressed is released, and this output signal is a second key-off signal M△ corresponding to the key-off signal A△1. It will be used as 1. Then, the bit signal of the second note information is detected by the OR circuit 57 to determine the note information associated with the key depression, and the output signal from the OR circuit 57 is sent to the AND circuit 58 together with the output signal from the comparison circuit 55.
A second key-on signal MΔ2 corresponding to the start of key depression is obtained from the AND circuit 58. That is, the storage device 2 is in the state shown by the musical notes and rest marks in FIG.
If the first note information is read out from the tempo clock TCu, first key-off and key-on signals AΔ1 and AΔ2 are generated as shown in the figure in response to the tempo clock TCu. In this case, if a key is pressed accurately on the keyboard 16 in response to the read note, the signals A△1, AA2
Second key-off and key-on signals MΔ1 and MΔ2 are generated in synchronization with the second key-off and key-on signals MΔ1 and MΔ2. The first and second key-on signals A△1, M△1 are clocked by the clock TCL.
The signals at the input and output terminals of the delay circuits 59 and 60 are detected by OR circuits 61 and 62, respectively.

That is, from the OR circuits 61 and 62, the signals A
From the rise of Δ2 and MΔ2, a signal with a widened pulse width corresponding to the delay time of the delay circuits 59 and 60 is obtained, and the output signals from the OR circuits 61 and 62 are sent to the AND circuit 63. supply Therefore, this AND circuit 6
3, a timing coincidence signal of the signals AA2 and MΔ2 is obtained which allows a time difference corresponding to the pulse width of the signals obtained from the OR circuits 61 and 62. The output signal from the AND circuit 63 counts the counter 64 which is initialized by the start signal STRT, and the count value information is sent to the arithmetic circuit 64.
In step 5, scoring is calculated based on the first parameter information. That is, this part constitutes the timing judgment circuit 20, and the calculation result from the calculation circuit 65 is displayed as a score as a timing correct rate on the display 23. The first pitch information from the latch circuit 45 and the second pitch information corresponding to the second note information from the keyboard 16 are compared in pitch by a comparison circuit 66.

This comparison circuit 66 generates an equal signal EQ when a correct key is selected on the keyboard 16, and this equal signal sets a flip-flop circuit 68 via a delay circuit 67. This flip-flop circuit 68, prior to output generation from the delay circuit 67,
It is reset and set by the signal A△2, and is inverted and set when the correct key is operated, and a pitch correct signal is generated. This flip-flop circuit 6
The set inversion state of 8 is detected by the differentiating circuit 69, counted by the counter 70 initialized by the start signal STRT, and calculated and scored by the calculation circuit 71 based on the second parameter information including the rest mark. That is, this part constitutes the pitch judgment circuit 21, and the calculation result of the calculation circuit 71 is displayed on the display 24 as a pitch correct answer rate. The output signal of the flip-flop circuit 68 when set is further supplied to a latch circuit 73 via a delay circuit 72. The set state is memorized in a latch manner. The first key-on signal AΔ2 and the first key-off signal AΔ1 are supplied to shift registers 74 and 75, respectively, which are driven by the clock TCL.

The shift register 74 is composed of 4 bits,
The flip-flop circuit 76 is set by the output signal from the first bit, and the output signal obtained from the output end of the fourth bit is taken out via the OR circuit 77, and the flip-flop circuit 76 is reset. A start signal STRT is supplied to the OR circuit 77. That is, the flip-flop circuit 76 receives the clock TC from the rising edge of the signal A△2.
It is set with a delay of one wavelength of L, and from this the clock TC
It is reset after three wavelengths of L have elapsed, and the output signal when set is as shown by FI in FIG. This signal FI is the first signal corresponding to the note of the model performance information.
The signal has a time width of the first key-on signal corresponding to the rise of the pitch information. Also, shift register 7
5 consists of 3 bits, and the signal at its input terminal sets the flip-flop circuit T8.

Then, the signal from the output terminal of the third bit of the shift register 75 is supplied together with the start signal STRT to the OR circuit 79, and the flip-flop circuit 78 is reset by the output signal of the OR circuit 79. That is, the flip-flop circuit 78 receives the clock TC from the rising edge of the signal A△1.
A set output signal shown as F2 in FIG. 5 having a width of three frequencies of L is generated, and this signal FI has a time width of the first key-off signal. The second key-on signal MΔ2 corresponding to the operation of the keyboard 16 is
Detected by a differentiating circuit 80 driven by a clock 4TCL with a frequency four times that of the clock TCL, and also detected by a clock 4TCL.
It is taken out via a 10-bit shift register 81 driven by L. Further, the second key-on signal MΔ1 is also differentiated by a differentiating circuit 82 and taken out via an 8-bit shift register 83 driven by a clock 4TCL. That is, the shift registers 81 and 83 generate the second key-off signal MΔ2 and the signals KON and KOFF as shown in FIG. 5, which are obtained by delay-shifting the second key-off signal MΔ1. Output signal KO from 81
N is the output signal FI from the flip-flop circuit 76
It is also supplied to the AND circuit 84. That is, the signal FI
The signal KON corresponding to the second key-on signal M△2 is within the key-on tolerance range based on the first note information indicated by
When this is generated, a key-on timing signal is generated from the AND circuit 84, and this signal is in the state shown by AND in FIG. And this AND circuit 84
The output signal from the flip-flop circuit 85 is set. This flip-flop circuit 85 receives a clock 4TCL supplied with the signal KOFF from the shift register 83.
This is the output signal from the delay circuit 86 driven by the AND circuit 84, and is in the reset state before the output from the AND circuit 84 is generated. The first state is inverted and set to the second state, which is the set state. The set output signal of the flip-flop circuit 85 is in the state shown by F3 in FIG. 5, and is supplied to the fund circuit 87.
The AND circuit 87 is supplied with a set output signal F2 corresponding to the first key-off signal AΔ1 of the flip-flop circuit 78 and a signal KOFF corresponding to the second key-off signal MΔ1 from the shift register 83. When the second key-off signal matches the first key-off signal within the allowable time range set by the shift register 75 under the condition that the key-on timing match signal is generated, The AND circuit 87 generates a code length coincidence detection signal indicated by IR in FIG.

The code length match signal from the AND circuit 87 is counted by a counter 88 which is initialized by the start signal STRT, and is scored by an arithmetic circuit 89 in accordance with the first parameter information "BOSUm". The score is displayed based on the note length match. The output signal from the AND circuit 87 is further supplied to the AND circuit 9 together with the key press pitch correct signal from the latch circuit 73 .

Therefore, an output signal is obtained from this AND circuit 90 when the correct key is operated with the correct note length on the keyboard 16, and this pitch and feature coincidence signal is sent to the counter 9 which is initialized by the start signal STRT. 1, and the arithmetic circuit 92 calculates the first parameter information “80SU{1}”
Calculate the score based on the calculation. Then, on the display 27, the score of correct pitches and note lengths is displayed. That is, according to the device configured as described above, if the student accurately selects and operates the keys on the keyboard 16 in a state corresponding to the first musical score information read out from the storage device 28, a correct pitch signal is obtained. A score is displayed on the display 24 to indicate that the correct key selection operation has been performed.

At the same time, not only the pitch but also the note length is important for the performance expression of music, but the time interval from the key pressed on the keyboard 16 to which key is used is determined by the generation state of the first musical score information. Correspondingly, note length correct scoring can also be completed by comparing with a suitable allowable time difference. In other words, the state of the student's musical expression through the operation of the keyboard 16 can be judged numerically and objectively, and the evaluation of the student's self-study can be obtained to the student's full satisfaction. This is highly effective in improving the effectiveness of practice. In the case of FIG. 4, model performance sound information is generated based on the information stored in the storage device 28 corresponding to the embodiment of FIG. 2, but as shown in FIG. A similar configuration can be used when the model performance information is retrieved from the master keyboard 11 operated by the teacher.

That is, by the same means as in FIG. 4 where the clearance signals MΔ1 and MΔ2 are also formed from the information from the keyboard 16, the base unit keyboard 1 is
It is only necessary to form the signals A△1 and A△2 based on the information from 1. As described above, according to this invention,
As soon as the model performance information is used, the first musical score information and the second musical score information corresponding to the key operations on the practice keyboard are compared in terms of pitch and note length, so that accurate key operations can be performed. In particular, when comparing notes, timings are compared by setting a predetermined allowable timing range, and effective practice performances are evaluated objectively according to the actual situation. Its effectiveness as a training device is remarkable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram explaining a practice device according to an embodiment of the present invention, FIG. 2 is a block diagram explaining another embodiment of the present invention, and FIG. 3 is a diagram showing the format of stored information in this embodiment. Similarly, FIG. 4 is a diagram showing the configuration of the determining section of this embodiment, and FIG. 5 is a signal waveform diagram illustrating the operation in the determining section. 11...Main unit keyboard, 15...Slave unit, 1
6...Practice keyboard, 20-22, 26...
... Judgment circuit, 23-25, 27... Display device,
28... Memory device, 35... Tempo oscillator, 53, 54... Population counter, 66...
...Comparison circuit (pitch), 74, 75, 83, 81...shift register, 85...flip-flop circuit (bistable circuit). Figure 3 Figure 1 Figure N Ship diagram size Figure 5

Claims (1)

[Scope of Claims] 1. A model performance information source that generates musical score information consisting of a series of musical score information at corresponding note length intervals, and a first model performance information source that corresponds to the beginning and end of the musical score information obtained from this information source. means for generating key-on and key-off signals; means for generating second key-on and key-off signals corresponding to performance information generated as a result of key operations on the practice keyboard; and the first and second key-on signals. key-on timing coincidence detection means for detecting that the key-on timing coincidence detection signal has occurred within a permissible time range; A bistable circuit that is inverted to
A keyboard performance training device comprising note length coincidence detection means for detecting a state in which the first and second key-off signals occur within a permissible time range in the second state of the stabilizing circuit. 2. The apparatus according to claim 1, wherein the model performance information source is constituted by a keyboard section played by the teacher, and musical score information corresponding to key press operations on the keyboard section is generated. 3. The above-mentioned model performance information source is composed of a storage device in which note information including pitch and note length information is sequentially set and stored in addresses, and each note information is sequentially read out at time intervals corresponding to the note length. The device according to claim 1. 4. The apparatus according to claim 1, further comprising an evaluation circuit for counting the detection signals from the note length coincidence detection means and displaying the scores. 5. The pitch included in the score information from the model performance information source,
2. The device according to claim 1, wherein the device compares pitches included in performance information from a keyboard and detects a state of agreement. 6. The apparatus according to claim 5, wherein a key depression correct signal is obtained by outputting an AND of the pitch coincidence detection signal and the note length coincidence detection signal.