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JPS6027092B2 - magnetic head phase detector - Google Patents

magnetic head phase detector

Info

Publication number
JPS6027092B2
JPS6027092B2 JP13988675A JP13988675A JPS6027092B2 JP S6027092 B2 JPS6027092 B2 JP S6027092B2 JP 13988675 A JP13988675 A JP 13988675A JP 13988675 A JP13988675 A JP 13988675A JP S6027092 B2 JPS6027092 B2 JP S6027092B2
Authority
JP
Japan
Prior art keywords
magnetic head
phase
pulse
channel
phase detector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13988675A
Other languages
Japanese (ja)
Other versions
JPS5263302A (en
Inventor
文夫 小安
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13988675A priority Critical patent/JPS6027092B2/en
Publication of JPS5263302A publication Critical patent/JPS5263302A/en
Publication of JPS6027092B2 publication Critical patent/JPS6027092B2/en
Expired legal-status Critical Current

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  • Magnetic Heads (AREA)

Description

【発明の詳細な説明】 本発明は複数のチャンネルを有する磁気ヘッドの位相検
出器に関するものでチャンネル間の位相が容易に検出で
きるようにしたものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase detector for a magnetic head having a plurality of channels, in which the phase between channels can be easily detected.

この種のものとしては2現象のオッシロスコープを用い
、その波形が同一であるか否かによりチャンネル間の位
相を検出する方法がある。今オッシロスコープの一入力
部に磁気ヘッドの2チャンネルを接続し、他の入力部に
1チャンネルを接続して位相を観測し、次に1チャンネ
ルあるいは2チャンネルの代りに3チャンネルを接続し
、再び位相観測することになる。したがってオッシロス
コープの入力部をその都度接続しなおさなければならな
い。
This type of method uses a two-phenomenon oscilloscope and detects the phase between channels based on whether the waveforms are the same. Now connect 2 channels of the magnetic head to one input of the oscilloscope, connect 1 channel to the other input to observe the phase, then connect 3 channels instead of 1 or 2 and re-phase. It will be observed. Therefore, the input section of the oscilloscope must be reconnected each time.

またオツシロスコープの波形から位相状態の検出をおこ
なわなければならず手数がかかるという欠点をもつ。本
発明は位相検出を簡単におこなえるようにしたもので、
以下図面を用いその一実施例を説明する。第1図は4チ
ャンネルのヘッドの例を示したもので、図面左側より1
,2,3,4チャンネルCH,,CH2,CH3,CH
4とする。
Another drawback is that the phase state must be detected from the waveform of the oscilloscope, which is time-consuming. The present invention allows phase detection to be performed easily.
One embodiment will be described below with reference to the drawings. Figure 1 shows an example of a 4-channel head.
, 2, 3, 4 channels CH, ,CH2,CH3,CH
Set it to 4.

第2図において、T,〜T4はそれぞれCH,〜CH4
が接続自在の端子でCH,〜Cはの端子がコネクタにな
っていればジャックで構成される。
In Figure 2, T and ~T4 are CH and ~CH4, respectively.
is a terminal that can be freely connected, and if the terminals of CH and C are connectors, it is configured as a jack.

OSCはパルス発生器、G,はタイマーTMが動作中パ
ルス発生器PSCの出力を通過させるゲート、AMMは
増中器、G2は接点R2,R4,R8およびR6が図の
状態にあり、CH,〜CH4が断線していない限りリレ
ーRを駆動するりレー駆動回路である。この場合、リレ
ーRは接点R,〜R8を有し、通常はR,,R3,R5
,R7をオブR2,R4,R6,R8をオンし、動作時
にその逆になる。TMは電源スイッチSをオンした際一
定時間オンの状態を持続するタイマーで、TM,はその
保持スイッチである。COMは基準値と接点R&側から
の入力とを比較しその入力が基準値を上まわればその分
だけ出力を出す比較器、SIは波形整形器、CVはカウ
ンタ、COはカウンタCVが一定値を計数した際の出力
により動作し、まず最初の出力ではリレーRAを、次に
RB、最後にRCを動作させるリレー制御回路で、リレ
ーRA〜RC動作時はカウンタCVをリセットする機能
も有している。RB〜RB8,RA,,RC,はそれぞ
れリレーRB,RA,RCの接点、RRは表示部器、S
S,〜SS2は位相切操スイッチである。次に本装置の
動作を説明する。まず端子T,〜Lに磁気ヘッドの各チ
ャンネルCH,〜CH4を接続し、次に電源スイッチS
をオンするとタイマーMは動作しゲートG,を開く。
OSC is a pulse generator, G is a gate through which the output of the pulse generator PSC is passed while the timer TM is operating, AMM is a multiplier, G2 is a contact point R2, R4, R8 and R6 are in the state shown in the figure, CH, This is a relay drive circuit that drives relay R unless ~CH4 is disconnected. In this case, the relay R has contacts R, ~R8, typically R,, R3, R5
, R7 and R2, R4, R6, R8 are turned on, and vice versa during operation. TM is a timer that keeps the power switch S on for a certain period of time when the power switch S is turned on, and TM is a holding switch thereof. COM is a comparator that compares the reference value and the input from the contact R& side, and if the input exceeds the reference value, outputs the corresponding amount. SI is a waveform shaper, CV is a counter, and CO is a counter whose CV is a constant value. It is a relay control circuit that operates based on the output when counting, and the first output operates relay RA, then RB, and finally RC. It also has the function of resetting the counter CV when relays RA to RC operate. ing. RB~RB8, RA,,RC, are the contacts of relays RB, RA, RC, respectively, RR is the display unit, S
S, ~SS2 are phase control switches. Next, the operation of this device will be explained. First, connect each channel CH, ~CH4 of the magnetic head to the terminals T, ~L, and then switch the power switch S.
When turned on, timer M operates and gate G opens.

したがってパルス発生器OSCの出力はゲート○,を通
じてAMMで増中されRB,に加れている。一方、タイ
マ−TMの動作にともないリレーRの接点であるR2,
R4,馬,R8を通じて各チャンネルCH2,CH3,
CH5,C凡には電流が流れる。ところでゲートG2は
各チャンネルCH,〜CH4において一つでも断線があ
った場合リレーRを動作させないように構成しており、
今CH,が断線していたとするとりレーRは動作せず、
一定時間経過したところでタイマーTMの動作は終了す
る。詳細は後述するがこの場合には表示器RRは動作し
ないために不良であることがわかる。ゲートG2よりリ
レーRを動作させるべく出力があればR2,R4,R6
,R8はオンよりオフ、R,,R3,R5,R7はオフ
よりオンになり、AMM,R,を通じて発振器のOSC
の出力がスイッチSS,を経由し、CH2に加わる。
Therefore, the output of the pulse generator OSC is amplified by the AMM through the gate ◯ and is added to RB. On the other hand, as the timer TM operates, R2, which is the contact point of relay R,
Each channel CH2, CH3, through R4, Ma, R8
Current flows through CH5 and C. By the way, gate G2 is configured so that relay R will not operate if there is any disconnection in each channel CH, to CH4.
If CH, is now disconnected, relay R will not operate,
The operation of the timer TM ends after a certain period of time has elapsed. Although the details will be described later, in this case, it can be seen that the display device RR is defective because it does not operate. If there is an output from gate G2 to operate relay R, R2, R4, R6
, R8 turns off from on, R3, R5, and R7 turn on from off, and the oscillator OSC changes through AMM, R.
The output of is applied to CH2 via switch SS.

この時CH3はR3,RB2,RA,,R&を介して比
較器COMに結合している。またCH,,CH4は開放
されている。したがってCH2に加わるパルスによりC
H2に隣接したC馬からはそのパルスが電磁誘導的に取
り出せるためにその出力力にOMに加えられる。
At this time, CH3 is coupled to the comparator COM via R3, RB2, RA, , R&. Further, CH, , CH4 are open. Therefore, the pulse applied to CH2 causes C
Since the pulse can be extracted from the C horse adjacent to H2 by electromagnetic induction, it is added to the output force of OM.

ここでCOMの基準値に対して下まわれば波形整形器S
,の出力はない。(C比とCH3の位相が逆であればS
,への出力は当然ない。)一方比較器COMからの出力
に対しては波形整形器SIで整形されカウン夕CVでカ
ウントされる。カウン夕CVではある数のパルスを計数
した際出力を出すように設定しておけばリレー制御回路
COを通じてカウンタCVはリセットされる一方まずリ
レーRAが動作しCOMへの接続をC瓜に代えてCH,
を接続する。この時も発振器OSCの出力はゲートG,
.AMM,RB,R,,SS,を通じてCH2には引続
いて加わることになりCH3に代ってCH,の出力がC
OMに前記CH3の場合と同様におこなわれる。CH2
とCH,の位相が同相であればカウンタCVが一定値を
カウントした際にリレーRBが動作し接点RB,〜RB
3が功換わる。これにより発振器ぬSCの出力はRB2
を通じてCH3に加えられ、CH4がCOMにえられC
比,CH4間で位相比較がおこなわれる。TMの時間内
でCH,〜CH4が同相でRCが動作すればRC,によ
り表示器RRが動作し、CH,〜CH4は同相であるこ
との確認がおこなえる。ここでSS,,SS2はヘッド
によってはCH,とCH3,CH2とCH4を同相とし
、CH,とCH2を逆相にする場合があるのでそのよう
なヘッドに対しても対応するためである。なおCOMは
1つとしたがCH,とCH2,CH3とCHのシールド
‘こ対しCH2とCH3のシールドを良くしていた場合
にはCH2からCH3への電磁誘導分が少〈なるのでC
H,とCH2,CH3とC山間の位相検出の場合に比べ
比較器にOMの基準レベルを変更する必要がある。以上
実施例により説明したがタイマーTMで定める時間内で
CH,とCH2,C比とCH3,CH3とC比の位相検
出をおこない、良であればその表示を表示器RRでおこ
なわせれば表示器RRの状態を見るだけで位相検出が自
動的に、しかも容易におこなえる。
If it falls below the reference value of COM, the waveform shaper S
, there is no output. (If the C ratio and CH3 phase are opposite, S
, of course there is no output to . ) On the other hand, the output from the comparator COM is shaped by a waveform shaper SI and counted by a counter CV. If the counter CV is set to output when a certain number of pulses are counted, the counter CV will be reset through the relay control circuit CO, while the relay RA will operate first and the connection to COM will be replaced with the C melon. CH,
Connect. At this time as well, the output of the oscillator OSC is gate G,
.. It continues to be applied to CH2 through AMM, RB, R,, SS, and the output of CH is changed to C instead of CH3.
OM is carried out in the same manner as in the case of CH3. CH2
If the phases of and CH, are in the same phase, when counter CV counts a certain value, relay RB operates and contacts RB, ~RB
3 is successful. As a result, the output of the oscillator SC is RB2
CH4 is added to CH3 through C
A phase comparison is performed between the ratio and CH4. If CH and .about.CH4 are in phase and RC operates within the time period TM, indicator RR is activated by RC, and it can be confirmed that CH and .about.CH4 are in phase. Here, depending on the head, SS, , SS2 may have CH, CH3, CH2, and CH4 in the same phase, and CH, and CH2 may have opposite phases, so this is to accommodate such heads. Although there is only one COM, if CH2 and CH3 are well shielded, the electromagnetic induction from CH2 to CH3 will be smaller, so
Compared to the case of phase detection between peaks H, CH2, CH3 and C, it is necessary to change the reference level of OM in the comparator. As explained above in the embodiment, the phases of CH, CH2, C ratio and CH3, and CH3 and C ratio are detected within the time set by the timer TM, and if it is good, the display is displayed on the display RR. Phase detection can be performed automatically and easily just by looking at the state of RR.

またタイマーTMで定める時間内で導通チェックもおこ
なうことができる。
Continuity checks can also be performed within the time set by the timer TM.

したがってヘッドを回転する回転板上にのせ−定角度ご
とに回転させて各種検査をおこなう中でその一検査であ
る位相検出に本発明を適用するようにすればヘッドの検
査工程合理化に寄与できる。
Therefore, if the present invention is applied to phase detection, which is one of the various inspections performed by placing the head on a rotating rotary plate and rotating it at fixed angles, it can contribute to streamlining the head inspection process.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は磁気ヘッドの斜視図、第2図本発明の一実施例
における磁気ヘッド位相検出器を示す構成図である。 OSC・・・・・0パルス発生器、G,,G2・・・・
・・ゲート、TM・・・・・・タイマー、COM・・・
・・・比較器、CV・・・・・・カウンタ、CO……リ
レー制御回路、R,RA,RB,RC・・・・・・リレ
ー。 第1図 第2図
FIG. 1 is a perspective view of a magnetic head, and FIG. 2 is a configuration diagram showing a magnetic head phase detector in an embodiment of the present invention. OSC...0 pulse generator, G,, G2...
...Gate, TM...Timer, COM...
... Comparator, CV ... Counter, CO ... Relay control circuit, R, RA, RB, RC ... Relay. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 1 複数のチヤンネルを有する磁気ヘツドの任意チヤン
ネルに一定時間パルス信号を送出する手段、パルスが加
えられるチヤンネルに隣接するチヤンネルより上記パル
スを誘導的に取り出し所定レベル以上のパルスが一定数
あつた際同相と判断し、誘導パルスが所定レベル以下の
際逆相と判断する手段を設けた磁気ヘツド位相検出器。 2 特許請求の範囲第1項記載の磁気ヘツド位相検出器
において、任意チヤンネルにパルス信号を送出する前に
各チヤンネルに対し導通チエツク信号を送出しそれでも
つて導通チエツクをおこなう手段を設けた磁気ヘツド位
相検出器。
[Claims] 1. A means for sending a pulse signal for a certain period of time to an arbitrary channel of a magnetic head having a plurality of channels, and a means for inductively extracting the pulse from a channel adjacent to the channel to which the pulse is applied, so that the pulse having a predetermined level or higher is A magnetic head phase detector equipped with means for determining in-phase when a certain number of induced pulses are present, and determining as anti-phase when the induced pulse is below a predetermined level. 2. The magnetic head phase detector according to claim 1, which is provided with means for sending a continuity check signal to each channel and performing a continuity check before sending a pulse signal to an arbitrary channel. Detector.
JP13988675A 1975-11-20 1975-11-20 magnetic head phase detector Expired JPS6027092B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13988675A JPS6027092B2 (en) 1975-11-20 1975-11-20 magnetic head phase detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13988675A JPS6027092B2 (en) 1975-11-20 1975-11-20 magnetic head phase detector

Publications (2)

Publication Number Publication Date
JPS5263302A JPS5263302A (en) 1977-05-25
JPS6027092B2 true JPS6027092B2 (en) 1985-06-27

Family

ID=15255869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13988675A Expired JPS6027092B2 (en) 1975-11-20 1975-11-20 magnetic head phase detector

Country Status (1)

Country Link
JP (1) JPS6027092B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62105194U (en) * 1985-12-23 1987-07-04

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62105194U (en) * 1985-12-23 1987-07-04

Also Published As

Publication number Publication date
JPS5263302A (en) 1977-05-25

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