JPS60262326A - relay excitation device - Google Patents
relay excitation deviceInfo
- Publication number
- JPS60262326A JPS60262326A JP60114445A JP11444585A JPS60262326A JP S60262326 A JPS60262326 A JP S60262326A JP 60114445 A JP60114445 A JP 60114445A JP 11444585 A JP11444585 A JP 11444585A JP S60262326 A JPS60262326 A JP S60262326A
- Authority
- JP
- Japan
- Prior art keywords
- switch
- relay
- input side
- operating voltage
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005284 excitation Effects 0.000 title claims description 12
- 238000003491 array Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/22—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for supplying energising current for relay coil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/02—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
- H01H47/04—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay for holding armature in attracted position, e.g. when initial energising circuit is interrupted; for maintaining armature in attracted position, e.g. with reduced energising current
- H01H47/10—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay for holding armature in attracted position, e.g. when initial energising circuit is interrupted; for maintaining armature in attracted position, e.g. with reduced energising current by switching-in or -out impedance external to the relay winding
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Relay Circuits (AREA)
- Interface Circuits In Exchanges (AREA)
- Medicines Containing Material From Animals Or Micro-Organisms (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Organic Low-Molecular-Weight Compounds And Preparation Thereof (AREA)
- Electronic Switches (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、例えばディジタル信号方式または搬送周波数
方式の通信装置の架における信号盤中の、リレー励磁用
装置に関１′る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a device for excitation of a relay, for example in a signal board in the rack of a communication device of the digital signal type or of the carrier frequency type.
従来技術
シダナリングの際、機器の故障の通報としてエラー信号
が発生され、通信接続の障害の通報としてノイズ信号が
発生される（ここでエラー信号、ノイズ信号という名称
は、上記の役割を有する信号に対して便宜的に用いた）
。これらの信号の結果、緊急の警報（Ａアラーム）かま
たは緊急性のない警報（Ｂアラーム）が信号盤において
指示される。受領された信号は警告ランプにより指示さ
れる。信号盤からの通報は一連の架の１υ線Ｖこ送出さ
れる。During prior art Sidana ring, an error signal is generated as a notification of equipment failure, and a noise signal is generated as a notification of a communication connection failure (here, the names "error signal" and "noise signal" refer to the signals that have the above role). (used for convenience)
. As a result of these signals, either an emergency alarm (A alarm) or a non-urgent alarm (B alarm) is indicated at the signal board. A received signal is indicated by a warning lamp. Information from the signal board is transmitted over the 1υ line V of a series of racks.
一］、２■の動作電圧で動作する信号盤と、−２４Ｖの
動作電圧で動作する信号盤とが不知である。I don't know about the signal board that operates with an operating voltage of 1] or 2) and the signal board that operates with an operating voltage of -24V.
発明の目的
本発明の目的は、例えば２つの異なる動作電圧で動作す
る１つの信号盤用のリレー励磁装置を提供することにあ
る。本発明の装置を備えた信号盤を例えば、２つの公知
の信号盤の代わりに用いることができるコニ５にする。OBJECTS OF THE INVENTION It is an object of the invention to provide a relay excitation device for a signal board, which operates, for example, at two different operating voltages. A signal board equipped with the device of the invention is, for example, made into a controller 5 which can be used in place of two known signal boards.
発明の構成
この目的はリレー励磁装置において、本発明によれば次
のようにして達成される。即ち、動、１） 作電圧に接
続された第１直列回路に１つのリレーと、第１抵抗およ
び第１スイツチから成る並列接続と、第２スイツチとを
設け、動作電圧に接続されていて１つの上方の値の動作
電圧が加わると論理０を送出し、１つの下方の値の動作
電圧が加わると論理１を送出するコン・ぞレータを設け
、入力側に励磁信号を加えられる単安定マルチ・ぐイブ
レータを設け、１つの第１ＯＲゲートを設け、該第１Ｏ
Ｒゲートの第１の入力側を前記コン・ξレータの出力側
と接続し、第２の入力側を前記単安定マルチパイブレー
クの出力側に接続し、第１０Ｒゲートの出力側を第１ス
イッチング制御部を介■２て前記第１スイツチの制御入
力側に接続し、１つの第２ＯＲゲートを設け、該第２Ｏ
Ｒゲートの第１の入力側を前記単安定マルチ・ζイブレ
ータの出力側に、また第２の入力側をこの単安定マルチ
バイブレータの入力側に接続し、第２ＯＲゲートの出力
側を第２スイッチング制御部を介して前記第２スイツチ
に接続し、さらに前記第１抵抗の値を、リレーに加わる
電圧がその保持電圧を下回らないような値に定めること
妃より達成される。DESCRIPTION OF THE INVENTION This object is achieved in a relay excitation device according to the invention as follows. 1) A first series circuit connected to an operating voltage is provided with one relay, a parallel connection consisting of a first resistor and a first switch, and a second switch; A monostable multi-channel converter is provided that outputs a logic 0 when two upper value operating voltages are applied, and a logic 1 when one lower value operating voltage is applied, and an excitation signal can be applied to the input side.・A gibrator is provided, one first OR gate is provided, and the first OR gate is provided.
A first input side of the R gate is connected to the output side of the converter ξ, a second input side is connected to the output side of the monostable multi-pie break, and an output side of the 10th R gate is connected to the output side of the 10th R gate. A second OR gate is connected to the control input side of the first switch through a control section, and the second OR gate is connected to the control input side of the first switch through a control section.
The first input side of the R gate is connected to the output side of the monostable multi-ζibrator, the second input side is connected to the input side of this monostable multivibrator, and the output side of the second OR gate is connected to the second switching side. This is achieved by connecting the second switch via a control unit and further setting the value of the first resistor to a value such that the voltage applied to the relay does not fall below its holding voltage.
さらに本発明によれば複数のリレーを個別に励磁するた
めには装置は次のように構成される０即ち、第１スイツ
チとリレーとの間に減結合ダイオ−１が設けられており
、ｎ個の別＜７） ＩＪ Ｌ／−が設けられており、ｎ
個の別の、第１スイツチがなく減結合ダイオ−ＩＳを備
えた第１直列回路が設けられており、減結合ダイオ−１
２のリレーとは反対側の端子が相互に接続されており、
各々１つの入力側を備えたｎ個の別の単安定マルチバイ
ブレータが設けられており、第１０Ｒゲ、−トにｎ個の
別の入力側が設けられており。Furthermore, according to the present invention, in order to individually excite a plurality of relays, the device is constructed as follows: a decoupling diode 1 is provided between the first switch and the relay; Individual <7) IJ L/- is provided, n
A separate first series circuit is provided without a first switch and with a decoupling diode IS.
The terminals on the opposite side of relay 2 are connected to each other,
n further monostable multivibrators each with one input are provided, with n further inputs being provided in the 10R gates.
これら入力側に各々１つの前記側のｎ個の単安定マルチ
バイブレータの出力側が接続されており、ｎ個の別の第
２ＯＲゲートが設けられており、これら第２ＯＲゲート
の各入力側が所属の単安定マルチパイブレークの１つの
入力側および１つの出力側に接続されており、第２ＯＲ
ゲートの各出力側が各々、ｎ個の別の第２スイッチング
制御部の１つを介して所属の別のｎ個の第２スイツチの
制御入力側に接続されている。Connected to these inputs are the outputs of n monostable multivibrators of one side in each case, and n further second OR gates are provided, each input of which is connected to the associated monostable multivibrator. Connected to one input side and one output side of the stable multi-pie break, and the second OR
Each output of the gate is connected via one of the n further second switching controls to the control input of the associated n further second switches.
本発明の装置の有利な実施例においては、第１スイツチ
が、動作電圧の上方の値のときコンパレータの出力側の
論理Ｏによってオフにされ、単安定マルチ・ぐイブレー
タの出力側に論理］−が生じたときのみオンにされるよ
うにし、動作電圧が下方の値のときは第１スイツチがコ
ンパレータ出力側の論理１によってオンにされ、また第
２スイツチは単安定マルチ・２イブレータの入力側また
は出力側に論理］、が生じたときオンにされるようにす
る。In an advantageous embodiment of the device according to the invention, the first switch is switched off by the logic O at the output of the comparator at the upper value of the operating voltage and by the logic O at the output of the monostable multigulator. When the operating voltage is at the lower value, the first switch is turned on by the logic 1 at the output of the comparator, and the second switch is turned on by the logic 1 at the input of the monostable multi-bibrator. or logic on the output side], so that it is turned on when it occurs.
本発明の有利な実施例において、スイッチは１ランジス
タにより構成される。In an advantageous embodiment of the invention, the switch is constituted by one transistor.
本発明の装置の有利な実施例において個々の素子につい
て、コンパレータを、１つのツエーナダイオー＋ｙと第
２抵抗とから成る、動作電圧に接続された第２の直列回
路およびこの第２の直列回路の中間タップに接続された
インバータから構成し、このインバータの出力側をコン
ノミレータ出力側として用いると有利である。In an advantageous embodiment of the device according to the invention, for each individual element, the comparator is connected to a second series circuit connected to the operating voltage, consisting of a Zener diode +y and a second resistor, and a second series circuit connected to the operating voltage. It is advantageous to consist of an inverter connected to the intermediate tap of the inverter, the output of which is used as the connominator output.
本”発明の装置は一１２Ｖおよび一２４Ｖ、ないしは−
２４Ｖおよび一６０Ｖの直流動作電圧領域で用いると有
利である。The device according to the present invention has voltages of -12V and -24V or -
It is advantageous to use it in the DC operating voltage range of 24V and -60V.
実施例 次に本発明の実施例を図面て基づき詳細に説明する。Example Next, embodiments of the present invention will be described in detail with reference to the drawings.
第１図は本発明による装置を示す。この装置はリレーコ
８、抵抗２、スイッチ３および５、コン・？レータ６、
単安定マルチバイブレータ７、入力端子８、ＯＲゲート
９および１１、ならびにスイッチ制御装置１０および１
２を備えている。リレーｌの接点装置は本発明に属さな
いので図示して℃・ない。FIG. 1 shows a device according to the invention. This device consists of relay relay 8, resistor 2, switches 3 and 5, and controller? rater 6,
Monostable multivibrator 7, input terminal 8, OR gates 9 and 11, and switch control devices 10 and 1
2. The contact device of relay I is not shown because it does not belong to the present invention.
リレーでは保持電圧が部分的に応動電圧より著し７く低
い。そのため、リレーには吸引すれるまで最小応動電圧
より高い電圧を印加すればよく、その後は電圧を保持電
圧の値に低下することができる。リレーｌは動作電圧Ｕ
Ｂ の下方の値に相当する定格電圧を有する。In relays, the holding voltage is in some areas significantly lower than the response voltage. Therefore, it is sufficient to apply a voltage higher than the minimum response voltage to the relay until it is attracted, and then the voltage can be reduced to the value of the holding voltage. Relay l has operating voltage U
It has a rated voltage corresponding to the lower value of B.
１１．・ 動作電圧ｕＢｏ下方°値°°き′”°がコン
パレータ６によって、ＯＲゲート９およびスイッチング
制御部ｌｏを介して閉成され、リレー１は動作電圧ＵＢ
を直接印加される。このどきＯＲゲート９の他方の入
力は作用しない。11. - The lower value of the operating voltage uBo is closed by the comparator 6 via the OR gate 9 and the switching control lo, and the relay 1
is applied directly. The other input of OR gate 9 has no effect at this time.
動作電圧ＵＢの上方の値では、スイッチ３は単安定マル
チ・ζイブレータ７の出力信号によって、そのパルス持
続時間の間のみＯＲゲート９とスイッチング制御部１ｏ
とを介して閉成される。このノξルス長は、リレー１が
確実に作動するような大きさにされて℃・る。この時間
の後に、リレーが抵抗２を介して動作電圧ＵＢに接続さ
れる。この抵抗は最小保持電圧を下回らなし・ように値
を定められている。At the upper value of the operating voltage UB, the switch 3 is activated by the output signal of the monostable multi-ζ-ibrator 7 to switch between the OR gate 9 and the switching control 1o only during its pulse duration.
Closed via. This nose length is sized so that the relay 1 operates reliably. After this time, the relay is connected via resistor 2 to the operating voltage UB. This resistance is sized so that it does not fall below the minimum holding voltage.
リレー１の制御はスイッチ５を介して行なわレル。単安
定マルチ・ζイブレータ７の不安定期間の間、スイッチ
５はＯＲゲート１１とスイッチング制御部１２とを介し
て閉成され、これは入力側８の励磁パルスが前記不安定
期間より短いときでもそうである。励磁・ξルスが不安
定期間より長いときは、スイッチ５の閉成は単安定マル
チパイブレーク７に関係なく行なわれる。Relay 1 is controlled via switch 5. During the instability period of the monostable multi-ζibrator 7, the switch 5 is closed via the OR gate 11 and the switching control 12, even if the excitation pulse at the input 8 is shorter than the instability period. That's right. When the excitation/ξ pulse is longer than the unstable period, the closing of the switch 5 takes place independently of the monostable multi-pie break 7.
第２図は３つのリレー１．１．１ 用の本発明の装置の
実施例を示す。使用されて℃・る参照番号は第１図のも
のと相応する。リレー１′に対応する素子にはやはり１
つのダッシュが付けられた番号で示され、リレーＩＫ対
応する素子には２つのダッシュが付けられている。ただ
しＯＲゲート９′は別であり、このＯＲゲート９′ニて
３つの個別のＯＲゲートが１つに統合されたものになっ
ている。さらに第２図の回路には減結合ダイオ−ｙ４．
＋、＋ が付加されて℃・る。FIG. 2 shows an embodiment of the device according to the invention for three relays 1.1.1. The reference numbers used correspond to those in FIG. The element corresponding to relay 1' is also 1.
Relay IK corresponding elements are designated with two dashes. However, the OR gate 9' is separate, and this OR gate 9' is three individual OR gates integrated into one. Additionally, the circuit of FIG. 2 includes a decoupling diode y4.
+, + are added to ℃・ru.
動作電圧ＵＢの上方の値では、スイッチ３は、少なくと
も１つの単安定マルチバイブレータ７．７’、７ の出
力側に論理１が加わる場合のみ閉成され７Ｉ’、 １つ
のスイッチ３しか設けられていないので、１つのリレー
が応動する際にすべてのリレー１．１．１ に動作電圧
ＵＢが印加される。既に応動したリレーも、これにより
再度短時間動作電圧ＵＢが印加される。しかしこれは、
既に応動していたリレーの機′能に何ら影響を与えない
。その他のリレーおよび回路素子は、第１図の場合同様
に動作する。At the upper value of the operating voltage UB, the switch 3 is closed only if a logic 1 is present at the output of at least one monostable multivibrator 7.7', 7I', and only one switch 3 is provided. Therefore, when one relay responds, the operating voltage UB is applied to all relays 1.1.1. The relays which have already reacted are thereby again briefly supplied with the operating voltage UB. But this is
It does not affect the functionality of relays that have already responded. The other relays and circuit elements operate in the same manner as in FIG.
第３図はコンノミレータ６の詳細な構成を示し、この素
子はツエーナダイオ＝Ｐ１３と抵抗１４とＣＭＯＳイン
・ζ−メタ１５から構成されている。FIG. 3 shows a detailed configuration of the connomitor 6, which is composed of a Zener diode P13, a resistor 14, and a CMOS in/ζ-metal 15.
インＡ−夕１５ケｌ ＯＶノ補助動作電圧ＵＢ′で作動
される。典型的な切換閾値は従って５■となる。動作電
圧ＵＢがツエーナダイオ−ｒ１３の電圧とインバータ１
５の応動閾値との相より低い場合、インバータ１５の出
力は論理１になる。動作電圧ＵＢが、ツエーナダイオ−
ｒ１凸の電圧とインバータ１５の応動閾値との和より高
いと、インバータ１５の出力は論理０になる。In-A-15 OV is operated with auxiliary operating voltage UB'. A typical switching threshold would therefore be 5■. Operating voltage UB is the voltage of Zener diode r13 and inverter 1
5, the output of inverter 15 will be a logic one. The operating voltage UB is
If it is higher than the sum of the voltage on the r1 convex and the response threshold of the inverter 15, the output of the inverter 15 becomes logic 0.
第４図は、第２図の装置の詳細図である。この装置には
、第３図のイン・ζ−メタ１５ＮＯＲゲート１５ とそ
の第１の入力側とにより構成されて℃・るコン・ぞレー
タ６が設けられて℃゛る。FIG. 4 is a detailed view of the apparatus of FIG. 2. This device is provided with a .degree. C. converter 6 constituted by the in.zeta.-metal 15 NOR gate 15 of FIG. 3 and its first input.
ＯＲゲート９ はダイオ・−ｙ１６，１７．１８と、接
続線１９で示されるＮＯＲグー１−１５’の第２の入力
側とから成る回路により構成されている。The OR gate 9 is constituted by a circuit consisting of diodes 16, 17, 18 and the second input of the NOR group 1-15', indicated by the connecting line 19.
スイッチ３仁そのスイッチング制御部１０とは、抵抗２
０〜２３とトランジスタ２４および２５から成る。スイ
ッチ５．５’ 、５” とそのスイッチング制御、、”
１ｓ１２．１２’ 、１２ はトランジスタ２９〜３１
と抵抗３２〜３４とにより構成されている。Switch 3 and its switching control section 10 are resistors 2 and 3.
0 to 23 and transistors 24 and 25. Switch 5.5', 5" and its switching control,"
1s12.12', 12 are transistors 29 to 31
and resistors 32 to 34.
動作電圧ＵＢの上方の値は一２０Ｖ〜−２６゜４ｖの範
囲とすることができ、下方の値は−１０，５ｖ〜−１３
，５Ｖの範囲とすることができるツエーナダイオーＰ１
３の電圧は、ＮＯＲゲ−一ト１５’ の相応の入力側が
切換閾値を下回る下方の値の範囲にあるように、１３Ｖ
Ｋ選ばれて℃・る。ＮＯＲゲート１５′の出力側ｊはこ
の範囲において負電位にあり、これがトランジスタＪ
２４および２５をダイオ−ｐ１６を介して導通させろ作
用をする。これによりＮＯＲゲート１５ の第２の入力
側は無効となる。従ってリレー１．１．１ がダイオ−
１’４−１ ４−’ 、 ４“を介して動作電圧Ｕ８に
接続される。The upper value of the operating voltage UB can range from -20V to -26°4V, and the lower value can range from -10,5V to -13V.
, 5V range.Zena diode P1
3 is 13 V such that the corresponding input of the NOR gate 15' is in the lower value range below the switching threshold.
K was chosen ℃・ru. The output j of the NOR gate 15' is at a negative potential in this range, which causes the transistor J
24 and 25 are electrically connected through diode p16. This makes the second input of NOR gate 15 ineffective. Therefore, relay 1.1.1 is diode
1'4-14-', 4'' to the operating voltage U8.
動作電圧ＵＢ が上方の値の場合、ＮＯＲゲート１５′
の一方の入力側は抵抗３５を介して、他方の入力側も負
電位のときに出力側が確実にアース電位になるまで、負
電位にされる。トランジスタ２４および２５は遮断さＪ
する。ＮＯＲゲート１５′はこのどき単安定マルチパイ
ブレーク７．７’、７ の出力側によってのみ制御され
る。If the operating voltage UB is at an upper value, the NOR gate 15'
One input side of is brought to a negative potential through a resistor 35 until the output side is reliably at ground potential when the other input side is also at a negative potential. Transistors 24 and 25 are cut off J
do. The NOR gate 15' is now controlled only by the output of the monostable multi-pie break 7.7',7.
ダイオ−ｒ２６〜２８は消去ダイオ−Ｐである。Diodes r26 to r28 are erase diodes P.
発明の効果
上述のように本発明によれば異なる動作電圧で動作する
信号盤用のリレー励磁装置が得られる。Effects of the Invention As described above, according to the present invention, a relay excitation device for a signal board that operates at different operating voltages can be obtained.
第１図は１つのリレーを備えた本発明の装置のブロック
回路図、第２図は３つのリレーを備えた本発明の装置の
ブロック回路図、第３図は本発明の装置のためのコンノ
ミレータの回路図、第４図は第２図の装置の詳細な回路
図である。゛、７，７．７” ・・・単安定マルチ・ζ
イゾレータ、９，９ ．１１．１１ ．１１“ ・・・
ＯＲゲート、１０．１２・・・スイッチング制御部、４
．４’、４“ ・・・減結合ダイオ−゛Ｐ1 is a block circuit diagram of a device according to the invention with one relay, FIG. 2 is a block circuit diagram of a device according to the invention with three relays, and FIG. 3 is a connominator for a device according to the invention. FIG. 4 is a detailed circuit diagram of the device of FIG.゛, 7, 7.7" ... Monostable multi-ζ
Isolator, 9,9. 11.11. 11"...
OR gate, 10.12... switching control section, 4
．． 4', 4"...decoupling diode P
Claims (1)
のリレー（１）と、第１抵抗（２）および第１スイツチ
（３）から成る並列接続と、第２スイツチ（５）とが設
けられており、動作電圧ＵＢに接続されて℃・て１つの
上方の値の動作電圧ＵＢが加わると理論０を送出し、］
つの下方の値の動作電圧が加わると理論１を送出するコ
ンパレータ（６）が設ケラれており、入力側（８）に励
磁信号を加えられる単安定マルチバイブレータ（７）ガ
設けられており、１つの第１ＯＲゲート（９）が設けら
れており、該第１ＯＲゲート（９）の第１の入力側が前
記コンツクレータ（６）の出力側と接続され、第２の入
力側が前記単安定マルチパイブレーク（７）の出力側に
接続リレ、第１． ＯＲゲート（９）の出力側が第１ス
イッチング制御部（１０）を介して前記第１スイツチ（
３）の制御入力側に接続されており、第２０Ｒゲー）（
１１）が設けられており、該第２０Ｒゲー）（１１）の
第１の入力側が前記単安定マルチ・ζイブレータ（７）
の出力側に、また第２の入力側がこの単安定マルチパイ
ブレーク（７）の入力側（８）に接続されており、第２
０Ｒゲー）（１１＞の出力側が第２スイッチング制御部
（１２）を介して前記第２スイツチ（５）に接続されて
おり、さらに前記第１抵抗（２）の値は、リレー（１）
に加わる電圧がその保持電圧を下回らな℃゛ような値に
されていることを特徴とするリレー励磁装置。 ２、第１スイツチ（３）が、動作電圧ＵＢの」二方の値
のときコンノミレータ（６）の出力側の論理Ｏによって
オフにされ、単安定マルチノ々イブレーク（７）の出力
側に論理１が生じたときのみオンにされるようにし、動
作電圧ＵＢカ下方の値のときは第１スイツチ（３）がコ
ン・ぐレーク（６）の出力側の論理１によってオンにさ
れ、また第２スイツチ（５）は単安定マルチバイブレー
タ（７）の入力側または出力側に論理１が生じたときオ
ンにされる特許請求の範囲第１項記載のリレー励磁装置
。 ３、コンパレータ（６）が、１つのツエーナダイオ−）
こ（１３）と第２抵抗（１４）とから成る、動作電圧Ｕ
８ に接続された第２の直列回路（１３，１４）および
この第２の直列回路ノウ間タップに接続されたインバー
タ（１５）から構成されており、このイン・ζ−タ（］
、５）の出カイ則がコンパレータ出力側として用いら」
Ｌる特許請求の範囲第１項または第２項記載のリレー励
磁装置。 牛 動作電圧ＵＢ に接続された第１直列回路に１つの
リレーと、第１．抵抗および第１スイツチから成る並列
接続と、第２スイツチとが設けられており、動作電圧に
接続されていて１つの−に方の値の動作電圧が加わると
論理Ｏを送出し、］−っの下方の値の動作電圧が加わる
と論理１を送出するコン・ルータが設けられており、入
力側に励磁信号を加えられる単安定マルチ・ζイブレー
タが設けられており、１つの第１ＯＲゲートが設けられ
ており、該第１ＯＲゲートの第１の入力側が前記コンノ
ミレータの出力側と接続さり、第２の入力側が前記単安
定マルチパイブレークの出力側に接続され、第１０Ｒゲ
ートの出力側が第１スイッチング制御部を介して前記第
１スイツチの制御入力側に接続されており、１つの第２
ＯＲゲートが設けられており、該第２ＯＲゲートの第１
の入力側が前記単安定マルチバイブレータの出力側に、
また第２の入力側がこの単安定マルチバイブレータの入
力側に接続されており、第２ＯＲゲートの出力側が第２
スイッチング制御部を介して前記第２スイツチに接続さ
れており、さらに前記第１抵抗の値を、リレーに加わる
電圧がその保持電圧を下回らないような値にされており
、さらに第１スイツチとリレーとの間に減結合ダイオ−
Ｐが設けられており、ｎ個の別のリレーが設けられてお
り、ｎ個の別の、第１スイツチがなく減結合ダイオード
を備えた第１直列回路が設けられてオ６す、減結合ダイ
オ−ｒのリレーとは反対側の端子は相互に接続されてお
り、各ｋ １つの入力側を備えたｎ個の別の単安定マル
チパイブレークが設けられており、第１ＯＲゲーｌ−に
１コ個の別の入力側が設けられており、こ」ｔら入力側
に各々１つの前記別のｎ個の単安定マルチパイブレーク
の出力側が接続されており、ｎ個の別の第２ＯＲゲート
が設けられておりこれら第２ＯＲゲートの各入力側が所
属の単安定マルチ・ζイブレータの１つの入力端および
］一つの出力側に接続されており、第２ＯＲグー トの
各出力側が各々、ｎ個の別の第２スイッチング制御部の
１つを介して所属の別のｎ個の第２スイツチの制御入力
側に接続されて℃・ることを特徴とするリレー励磁装置
。 ５ スイッチ（３，５，５，５）がトランジスタ（２４
，２９，３０，３１）により構成されている特許請求の
範囲第４項記載のリレー励磁装置。 ６ 動作電圧（ＵＢ）の上方の値が約−２４Ｖであり、
下方の値が約−１２Ｖである特許請求の範囲第４項記載
のリレー励磁装置。 ７ 動作電圧（ＵＢ）の上方の値が約−６０Ｖであり、
下方の値が約−２４Ｖである特許請求の範囲第４項記載
のリレー励磁装置。[Claims] 1. A first series circuit connected to an operating voltage UB includes a parallel connection consisting of one relay (1), a first resistor (2) and a first switch (3), and a second A switch (5) is provided, which is connected to the operating voltage UB and sends out a theoretical 0 when the operating voltage UB of one value above °C is applied.
A comparator (6) is provided which sends out the theory 1 when an operating voltage of a lower value than 1 is applied, and a monostable multivibrator (7) to which an excitation signal is applied to the input side (8) is provided. A first OR gate (9) is provided, a first input side of which is connected to the output side of the condenser (6) and a second input side connected to the monostable multi-pie break. (7) Connect the relay to the output side of the first. The output side of the OR gate (9) is connected to the first switch (
3) is connected to the control input side of the 20th R game) (
11) is provided, and the first input side of the 20th R game) (11) is connected to the monostable multi-ζ ibrator (7).
and the second input side is connected to the input side (8) of this monostable multi-pie break (7), and the second input side is connected to the input side (8) of this monostable multipie break (7).
The output side of the 0R game (11) is connected to the second switch (5) via the second switching control section (12), and the value of the first resistor (2) is determined by the relay (1).
A relay excitation device characterized in that the voltage applied to the relay is set to a value such that the voltage applied to the circuit does not fall below its holding voltage. 2. The first switch (3) is turned off by the logic O at the output of the connominator (6) when the operating voltage UB is at either value, and the logic 1 is applied to the output of the monostable multi-noise break (7). When the operating voltage UB is at a lower value, the first switch (3) is turned on by the logic 1 at the output side of the control gate (6), and the second 2. A relay exciting device according to claim 1, wherein the switch (5) is turned on when a logic 1 occurs on the input or output side of the monostable multivibrator (7). 3. Comparator (6) is one Zener diode)
(13) and the second resistor (14), the operating voltage U
It consists of a second series circuit (13, 14) connected to 8 and an inverter (15) connected to the tap between this second series circuit, and this inverter (15).
, 5) is used as the comparator output side.
A relay excitation device according to claim 1 or 2. one relay in the first series circuit connected to the operating voltage UB; A parallel connection consisting of a resistor and a first switch and a second switch are provided, which are connected to the operating voltage and deliver a logic O when the operating voltage of the higher value is applied to one -. A converter router is provided which sends out a logic 1 when an operating voltage with a value lower than a first input side of the first OR gate is connected to the output side of the connominator, a second input side is connected to the output side of the monostable multi-pie break, and an output side of the first OR gate is connected to the output side of the monostable multi-pie break. is connected to the control input side of the first switch via a switching control section, and one second
An OR gate is provided, and a first gate of the second OR gate is provided.
The input side of the monostable multivibrator is connected to the output side of the monostable multivibrator,
Further, the second input side is connected to the input side of this monostable multivibrator, and the output side of the second OR gate is connected to the second input side of the monostable multivibrator.
The first switch is connected to the second switch via a switching control section, and the first resistor is set to a value such that the voltage applied to the relay does not fall below its holding voltage, and the first switch and the relay are connected to each other. Decoupling diode between
P is provided, n further relays are provided, and n further first series circuits are provided without a first switch and with decoupling diodes. The terminals of the diode r opposite to the relay are interconnected, and n further monostable multi-pie breaks with one input side each are provided, and the first OR gate l- One further input side is provided, to which the output side of one further n monostable multi-pie break is connected, and n further second OR gates are connected. are provided, and each input side of these second OR gates is connected to one input terminal and one output side of the associated monostable multi-ζibrator, and each output side of the second OR gate is connected to n gates respectively. A relay excitation device, characterized in that it is connected via one of the further second switching controls to the control input side of the associated n further second switches. 5 Switches (3, 5, 5, 5) are transistors (24
, 29, 30, 31). 6 The upper value of the operating voltage (UB) is approximately -24V,
5. The relay exciter according to claim 4, wherein the lower value is about -12V. 7 The upper value of the operating voltage (UB) is approximately -60V,
5. The relay exciter according to claim 4, wherein the lower value is about -24V.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3420057.6 | 1984-05-29 | ||
| DE3420057 | 1984-05-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60262326A true JPS60262326A (en) | 1985-12-25 |
| JPH0413805B2 JPH0413805B2 (en) | 1992-03-10 |
Family
ID=6237149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60114445A Granted JPS60262326A (en) | 1984-05-29 | 1985-05-29 | relay excitation device |
Country Status (9)
| Country | Link |
|---|---|
| EP (1) | EP0164014B1 (en) |
| JP (1) | JPS60262326A (en) |
| AT (1) | ATE36775T1 (en) |
| AU (1) | AU561464B2 (en) |
| BR (1) | BR8502520A (en) |
| DE (1) | DE3564640D1 (en) |
| GR (1) | GR851295B (en) |
| MX (1) | MX158706A (en) |
| NO (1) | NO164747C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02106659U (en) * | 1989-02-09 | 1990-08-24 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2706071B1 (en) * | 1993-06-01 | 1995-07-07 | Ece | Device for controlling the operation of a contactor. |
| US5752482A (en) * | 1997-03-28 | 1998-05-19 | Cummins Engine Company, Inc. | System for integrally controlling current flow through number of inductive loads |
| CN111029214B (en) * | 2019-12-26 | 2021-11-02 | 中国电子科技集团公司第五十八研究所 | Low-side driving circuit of high-voltage relay |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1513214B2 (en) * | 1965-12-06 | 1970-10-15 | Deutsche ITT Industries GmbH, 78OO Freiburg | Circuit arrangement for the automatic adaptation of a consumer to different DC supply voltages |
| US3660730A (en) * | 1970-12-16 | 1972-05-02 | Design Elements Inc | Solenoid drive circuit |
| FR2147828B3 (en) * | 1971-08-02 | 1974-04-26 | Seita | |
| US3766432A (en) * | 1972-10-20 | 1973-10-16 | Honeywell Inf Systems | Actuator drive circuitry for producing dual level drive current |
| JPS6056948B2 (en) * | 1977-02-08 | 1985-12-12 | 株式会社日本自動車部品総合研究所 | Solenoid valve drive device |
| GB1604402A (en) * | 1977-07-20 | 1981-12-09 | Lucas Industries Ltd | Solenoid drive circuits |
| DE2821624C2 (en) * | 1978-05-18 | 1986-07-10 | Brown, Boveri & Cie Ag, 6800 Mannheim | Relay switching stage |
| US4336564A (en) * | 1979-04-04 | 1982-06-22 | Exploration Logging, Inc. | Solenoid control circuit |
-
1985
- 1985-05-21 AT AT85106226T patent/ATE36775T1/en active
- 1985-05-21 DE DE8585106226T patent/DE3564640D1/en not_active Expired
- 1985-05-21 EP EP85106226A patent/EP0164014B1/en not_active Expired
- 1985-05-24 NO NO852083A patent/NO164747C/en unknown
- 1985-05-27 GR GR851295A patent/GR851295B/el unknown
- 1985-05-28 BR BR8502520A patent/BR8502520A/en not_active IP Right Cessation
- 1985-05-28 AU AU43033/85A patent/AU561464B2/en not_active Ceased
- 1985-05-29 JP JP60114445A patent/JPS60262326A/en active Granted
- 1985-05-29 MX MX205432A patent/MX158706A/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02106659U (en) * | 1989-02-09 | 1990-08-24 |
Also Published As
| Publication number | Publication date |
|---|---|
| NO164747C (en) | 1990-11-07 |
| DE3564640D1 (en) | 1988-09-29 |
| ATE36775T1 (en) | 1988-09-15 |
| BR8502520A (en) | 1986-01-28 |
| JPH0413805B2 (en) | 1992-03-10 |
| MX158706A (en) | 1989-02-28 |
| GR851295B (en) | 1985-11-25 |
| EP0164014B1 (en) | 1988-08-24 |
| NO164747B (en) | 1990-07-30 |
| NO852083L (en) | 1985-12-02 |
| AU4303385A (en) | 1985-12-05 |
| EP0164014A1 (en) | 1985-12-11 |
| AU561464B2 (en) | 1987-05-07 |
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