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JPS60254202A - Program controller - Google Patents

Program controller

Info

Publication number
JPS60254202A
JPS60254202A JP11053484A JP11053484A JPS60254202A JP S60254202 A JPS60254202 A JP S60254202A JP 11053484 A JP11053484 A JP 11053484A JP 11053484 A JP11053484 A JP 11053484A JP S60254202 A JPS60254202 A JP S60254202A
Authority
JP
Japan
Prior art keywords
section
parameter
parameters
program
program controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11053484A
Other languages
Japanese (ja)
Inventor
Koichi Miyahara
宮原 孝一
Toshinori Nagasawa
長沢 利紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chino Corp
Original Assignee
Chino Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chino Works Ltd filed Critical Chino Works Ltd
Priority to JP11053484A priority Critical patent/JPS60254202A/en
Publication of JPS60254202A publication Critical patent/JPS60254202A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/12Programme control other than numerical control, i.e. in sequence controllers or logic controllers using record carriers
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/23Pc programming
    • G05B2219/23344Changeable memory, program
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/23Pc programming
    • G05B2219/23427Selection out of several programs, parameters

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Feedback Control In General (AREA)

Abstract

PURPOSE:To simplify the setting action of a program controller by using a parameter which is under execution unless a special parameter is newly set when parameters are set for each section of a program pattern. CONSTITUTION:An inside device 2 can be freely loaded in and unloaded from a case 1 of a program controller, and display devices 31 and 32, etc. are provided at the front face of the device 2. A central processor performs the control operation according to the program pattern set device, etc. stored in a RAM, etc. and produces an output signal. Thus a set of specific PID constants is set at a certain section and at the same time the number of this set is registered. As a result, a parameter can be set for each section with designation of said set number. Then the operation of the next section is carried out after deciding by a program stored previously in a ROM that the parameter under execution (same as the parameter of the preceding section) is set unless a special parameter is newly set.

Description

【発明の詳細な説明】 (1)発明の分野 この発明は、プログラムパターンを発生できるプログラ
ム調節計に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention This invention relates to a program controller capable of generating program patterns.

(2)従来技術 時間に応じた所望のプログラムパターンを発生するとと
もに調節動作を行うプログラム調節計において、プログ
ラムパターンの各区間毎にPID定数、上下限警報値等
を設定する必要があり、設定区間が多いと設定回数が多
くなり、設定操作が煩雑となる問題点が生じている。
(2) Prior Art In a program controller that generates a desired program pattern according to time and performs adjustment operations, it is necessary to set a PID constant, upper and lower limit alarm values, etc. for each section of the program pattern. If there are many settings, the number of settings will increase, creating a problem that the setting operation will be complicated.

(3)発明の目的 この発明の目的は2以上の点に鑑み、パラメータの設定
の容易化を図ったプログラム調節計を提供することであ
る。
(3) Purpose of the Invention An object of the present invention is to provide a program controller that facilitates parameter setting in view of two or more points.

(4)発明の実施例 第1図は、この発明に係るプログラム調節計の外観構成
図、第2図は、構成説明図である。
(4) Embodiment of the Invention FIG. 1 is an external configuration diagram of a program controller according to the invention, and FIG. 2 is an explanatory diagram of the configuration.

第1図において、ケース1に内器2が着脱自在とされ、
内器2の前面に表示器31 、32 、操作スイッチ4
1.側面に操作スイッチ42が配置されている。
In FIG. 1, an internal device 2 is detachably attached to a case 1,
Indicators 31, 32 and operation switch 4 are provided on the front of the internal unit 2.
1. An operation switch 42 is arranged on the side.

第2図において、3は表示器、4は操作スイッチ、5は
マイクロコンビーータのような中央処理装置、61はR
AMのようなメモリ、62はROMのようなメモリで、
中央処理装置5は、RAM61等に格納されたプログラ
ムパターン設定値と入力信号とを比較し、所定の調節演
算を行い、出力信号を発生するよう構成されている。
In FIG. 2, 3 is a display, 4 is an operation switch, 5 is a central processing unit such as a microconbeater, and 61 is an R
Memory like AM, 62 is memory like ROM,
The central processing unit 5 is configured to compare input signals with program pattern setting values stored in the RAM 61 or the like, perform predetermined adjustment calculations, and generate output signals.

このようなプログラム調節計において、第3図のような
11区間のプログラムパターンの各区間のパラメータを
3グループに分け、■〜■までは共通のパラメータ、■
〜■までは共通の別のパラメータ、■、■は共通の別の
パラメータを設定するものとする。パラメータとして、
PID定数を例として以下説明する。
In such a program controller, the parameters of each section of the 11-section program pattern as shown in Fig. 3 are divided into three groups, and the parameters from ■ to ■ are common parameters;
It is assumed that common parameters are set for ~■, and other common parameters are set for ■ and ■. As a parameter,
This will be explained below using a PID constant as an example.

ある特定のPID定数の組をある区間に設定するに際し
、その特定のPID定数の組の番号を登録しておく。つ
まり9区間■〜■までについての特定のPID定数の組
を「1」区間■〜■までについての特定のPID定数の
組を「2」区間[相]。
When setting a specific set of PID constants in a certain section, the number of the specific set of PID constants is registered. In other words, the specific set of PID constants for the 9 sections ■ to ■ is "1", and the specific set of PID constants for the sections ■ to ■ is "2" section [phase].

■についての特定のPID定数の組を「3」として登録
しておく。この代表組番号を指定するのみで、各区間ご
とのパラメータの設定ができるようになっている。
A specific set of PID constants for (1) is registered as "3". Parameters can be set for each section simply by specifying this representative group number.

また、あらかじめROMに格納されたプログラムにより
、特別にパラメータを指定しない限り現在実行中のパラ
メータ6.つまり前区間と同一のパラメータが設定され
たとして次の区間の動作を行うようにされている。この
設定について「0」という番号で登録されている。
In addition, the program stored in the ROM in advance determines the currently executing parameters 6. In other words, the operation for the next section is performed assuming that the same parameters as those for the previous section are set. This setting is registered with the number "0".

以上のような準備の後、3組のパラメータを設定するに
は次のようにすればよい。
After the above preparations, the three sets of parameters can be set as follows.

あらかじめ、すべての各区間について、第4図(a)で
示すように「0」が登録されている。まず■の区間のパ
ラメータを「1」と設定する。このまま設定をやめてし
まうと、各区間に「0」、つまり現在実行中のパラメー
タを用いる指定なので。
"0" is registered in advance for all sections as shown in FIG. 4(a). First, set the parameter for the section (■) to "1". If you cancel the settings as is, each section will be set to 0, which means the parameters currently being executed will be used.

■から0もすべて、「1」で代表したPID定数となっ
てしまう。
All 0s from ■ become PID constants represented by "1".

そこで、■の区間にr2J、(i)の区間に「3」を第
4図[有])のように設定する。すると9区間■〜■ま
でが「1」のパラメータとなり2区間■〜■J まで「2」のパラメータ、区間[株]、■≠「3」のパ
ラメータが設定されることになる。
Therefore, r2J is set in the section (■) and "3" is set in the section (i) as shown in FIG. Then, the parameters of ``1'' will be set for the 9th interval ■ to ■, and the parameters of ``2'' will be set for the 2nd interval ■ to ■J, and the parameters of the interval [stock] and ■≠``3'' will be set.

このように、特別にパラメータを設定しない限り現在実
行中のパラメータが設定されるよう構成しているので、
きわめて設定が容易である。
In this way, it is configured so that the currently running parameters are set unless special parameters are set.
Extremely easy to set up.

以上の例では、PIf)定数について説明したがそれ以
外のパラメータも同様で、また2代表の組番号を用いず
実際のPID値を設定してもよい。
In the above example, the PIf constant was explained, but the other parameters are the same, and the actual PID value may be set without using the two representative group numbers.

(5)発明の要約 以上述べたように、この発明は、プログラムパターンの
各区間毎のパラメータを設定するに際し。
(5) Summary of the Invention As described above, the present invention provides a method for setting parameters for each section of a program pattern.

特別にパラメータを設定しない限り現在実行中のパラメ
ータが設定されるよう構成したプログラム調節計である
This is a program controller configured so that the parameters currently being executed are set unless special parameters are set.

(6)発明の効果 特別にパラメータを設定しない限り現在実行中のパラメ
ータが設定されるので、同一のパラメータを用いる区間
のはじめの区間のみパラメータ設定をするだけでパラメ
ータ設定は終了し、大幅な設定操作の簡素化、容易化が
図られる。また、複数の要素からなるパラメータの組の
番号で代表させて、登碌、設定すると、いっそうパラメ
ータの設定が容易なものとなる。
(6) Effects of the Invention Unless parameters are specifically set, the parameters currently being executed are set, so the parameter setting can be completed by simply setting the parameters for the first section of the sections that use the same parameters, making it possible to make extensive settings. Operation is simplified and facilitated. Further, if parameters are registered and set by representing a set of parameters consisting of a plurality of elements, the parameter setting becomes easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図、第3図、第4図は、この発明の一実施
例を示す説明図である。 1・・・ケース、2・・・内器、 3,31.32・・
・表示器。 4 、41 、42・・・操作スイッチ、5・・・中央
処理装置。 (5) 61・・・RAM、62・・・ROM (6)
FIG. 1, FIG. 2, FIG. 3, and FIG. 4 are explanatory views showing one embodiment of the present invention. 1...Case, 2...Inner device, 3, 31.32...
·display. 4, 41, 42...operation switch, 5...central processing unit. (5) 61...RAM, 62...ROM (6)

Claims (1)

【特許請求の範囲】[Claims] 1、時間に応じた所望のプログラムパターンを発生する
とともに調節動作を行うプログラム調節計において、プ
ログラムパターンの各区間毎のパラメータを設定するに
際し、特別にパラメータを設定しない限り現在実行中の
パラメータが設定されるよう構成したことを特徴とする
プログラム調節計。
1. In a program controller that generates a desired program pattern according to time and performs adjustment operations, when setting the parameters for each section of the program pattern, the parameters currently being executed are set unless special parameters are set. A program controller characterized in that it is configured to
JP11053484A 1984-05-30 1984-05-30 Program controller Pending JPS60254202A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11053484A JPS60254202A (en) 1984-05-30 1984-05-30 Program controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11053484A JPS60254202A (en) 1984-05-30 1984-05-30 Program controller

Publications (1)

Publication Number Publication Date
JPS60254202A true JPS60254202A (en) 1985-12-14

Family

ID=14538244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11053484A Pending JPS60254202A (en) 1984-05-30 1984-05-30 Program controller

Country Status (1)

Country Link
JP (1) JPS60254202A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266919A (en) * 1986-05-15 1987-11-19 Fuji Electric Co Ltd Setting panel for preset counter
JPS63257002A (en) * 1987-04-14 1988-10-24 Mitsubishi Electric Corp Control circuit device
JPH01128101A (en) * 1987-11-12 1989-05-19 Daikin Ind Ltd Processing machine control device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57169803A (en) * 1981-04-11 1982-10-19 Yamatake Honeywell Co Ltd Data setting and displaying system of arithmetic device
JPS5854705B2 (en) * 1978-08-04 1983-12-06 株式会社日立製作所 Telephone connection test method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5854705B2 (en) * 1978-08-04 1983-12-06 株式会社日立製作所 Telephone connection test method
JPS57169803A (en) * 1981-04-11 1982-10-19 Yamatake Honeywell Co Ltd Data setting and displaying system of arithmetic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266919A (en) * 1986-05-15 1987-11-19 Fuji Electric Co Ltd Setting panel for preset counter
JPS63257002A (en) * 1987-04-14 1988-10-24 Mitsubishi Electric Corp Control circuit device
JPH01128101A (en) * 1987-11-12 1989-05-19 Daikin Ind Ltd Processing machine control device

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