JPS60249445A - Receiver of spectrum spread signal - Google Patents
Receiver of spectrum spread signalInfo
- Publication number
- JPS60249445A JPS60249445A JP59106159A JP10615984A JPS60249445A JP S60249445 A JPS60249445 A JP S60249445A JP 59106159 A JP59106159 A JP 59106159A JP 10615984 A JP10615984 A JP 10615984A JP S60249445 A JPS60249445 A JP S60249445A
- Authority
- JP
- Japan
- Prior art keywords
- output
- amplifier
- synchronization detection
- adder
- gain control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001228 spectrum Methods 0.000 title claims description 17
- 238000001514 detection method Methods 0.000 claims abstract description 38
- 230000001360 synchronised effect Effects 0.000 abstract description 7
- 230000007257 malfunction Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000006185 dispersion Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003892 spreading Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、複数個の同期検出回路を有するスペクトラム
拡散信号用受信装置の自動利得制御回路に関する分野に
利用される。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is utilized in the field of an automatic gain control circuit for a spread spectrum signal receiver having a plurality of synchronization detection circuits.
スペクトラム拡散信号用受信装置では、拡散コートのザ
ーチ時間を短縮する目的でコードスタガ一方式が採用さ
れ、この方式は、複数個の同期同期検出回路をｉｔｉえ
、また、希望波が存在せず混信による雑音が強大な場合
にも同期誤りが発生しないように、同期捕捉前に同期検
出回路に入力される信号レベルが非同期信号検出回路の
出力により制御される利得制御手段で制御されることが
多い。In a spread spectrum signal receiving device, a code stagger method is adopted for the purpose of shortening the search time of the spread coat. In order to prevent synchronization errors even when noise is strong, the signal level input to the synchronization detection circuit before synchronization acquisition is often controlled by gain control means controlled by the output of the asynchronous signal detection circuit.
第２図は従来例スペクトラム拡散信号用受信装置の一部
を示すブロック構成図である。第２図で符号１ば誤差信
号増幅器、番号２は低域濾波器、符号３は利得制御増幅
器、符号４および７は相関器、符号５および８は濾波器
、勾号６および９は検波器、符号１０は同期判定器、符
号１１はシフトレジスタ、符号１２はコード発生器、符
号１３は切換スイッチ、符号１５は同期検出回路であり
、符号Ｖｒは基準電圧である。FIG. 2 is a block diagram showing a part of a conventional spread spectrum signal receiving apparatus. In Fig. 2, 1 is an error signal amplifier, 2 is a low-pass filter, 3 is a gain control amplifier, 4 and 7 are correlators, 5 and 8 are filters, and slope numbers 6 and 9 are detectors. , 10 is a synchronization determiner, 11 is a shift register, 12 is a code generator, 13 is a changeover switch, 15 is a synchronization detection circuit, and Vr is a reference voltage.
ここで、利得制御増幅器３と、相関器４と、浦波器５と
、検波器６と誤差信号増幅器１と、低域濾波器２とで非
同期自動利得制御ループが構成されており、誤差信号増
幅器１の出力電圧が基準電圧Ｖｒに等しくなるように利
得制御増幅器３の利得が制御される。相関器７、濾波器
８、検波器９、同期判定器ＪＯで構成される同期検出回
路１５では受信装置内で発汁したスペクトラｌ、拡散コ
ードのその位相に一致するスペクトラム拡散信号を受信
しているかどうかが検出され、スペクトラム拡散コード
のサーチ時間の短縮を図るために、４つの同期検出回路
１５には拡散コードの全コード長の４分の１ずつ位相が
ずれたコードがコート発生器１２およびシフトレジスタ
１１から供給される。同期判定は検波器９の出力電月−
かあらかしめ設定された闇値を越えたかどうかを同期判
定器ｌＯで判定することによって行われる。したかっ−
（、所定の検出確率で同期の判定が行われるためには、
雑音により検波器≦（に出力される電圧が一定に保たれ
ている必要がある。Here, an asynchronous automatic gain control loop is constituted by a gain control amplifier 3, a correlator 4, a wave detector 5, a wave detector 6, an error signal amplifier 1, and a low-pass filter 2. The gain of the gain control amplifier 3 is controlled so that the output voltage of the amplifier 1 becomes equal to the reference voltage Vr. The synchronization detection circuit 15, which is composed of a correlator 7, a filter 8, a detector 9, and a synchronization determiner JO, receives the spectrum l generated in the receiving device and a spread spectrum signal that matches the phase of the spread code. In order to reduce the search time for the spread spectrum code, the four synchronization detection circuits 15 output codes whose phases are shifted by one-fourth of the total code length of the spread spectrum code to the coat generator 12 and It is supplied from the shift register 11. The synchronization judgment is based on the output voltage of the detector 9.
This is done by using a synchronization determiner IO to determine whether or not the dark value has exceeded a preset darkness value. I wanted to-
(In order to determine synchronization with a predetermined detection probability,
Due to noise, the voltage output to the detector must be kept constant.
しかし、第２図に示しだ従来構成の自動利得制御回路で
は、同期検出系と自動利得制御系とが分かれているので
、温度変動なとによる各基の利得変動のバラツキによっ
て検波器１０の出力電圧が変動し、同期検出回路が誤動
作する欠点があった。However, in the conventional automatic gain control circuit shown in FIG. 2, the synchronization detection system and the automatic gain control system are separated, so the output of the detector 10 is affected by variations in the gain fluctuations of each group due to temperature fluctuations. There was a drawback that the voltage fluctuated and the synchronization detection circuit malfunctioned.
（文 献）
スペクトラム拡散信号用受信装置
（出願番号 特励昭５７−４５９４８）〔発明が解決し
ようとする問題点〕
本発明は、上記欠点を改良するもので、スペクトラム拡
散信号の受信装置の回路素子の特性が温度変動などの要
因により変化し、この変化により同期検出回路が誤動作
することを抑圧する自動利得制御回路を有するスペクト
ラム拡散信号受信装置を提供することを目的とする。(Reference) Receiving device for spread spectrum signals (Application number: JP-A-57-45948) [Problems to be solved by the invention] The present invention improves the above-mentioned drawbacks, and provides a circuit for a receiving device for spread spectrum signals. It is an object of the present invention to provide a spread spectrum signal receiving apparatus having an automatic gain control circuit that suppresses malfunction of a synchronization detection circuit due to changes in element characteristics due to factors such as temperature fluctuations.
本発明は、受信するスペクトラム拡散信号の信号レヘル
を制御する利得制御増幅器と、スペクトラｌ、拡散コー
ドのサーチ時間の短縮を図るために複数個設りられる同
期検出回路とを備えたスペクトラム拡散信号受信装置で
、前述の問題点を解決するための手段として、同期検出
回路に備わる検波器の出力電圧を加算する加算器と、加
算器出力電圧と基準電圧との差を演算する誤差信号増幅
器とを備えたことを特徴とする。The present invention provides a spread spectrum signal receiver equipped with a gain control amplifier that controls the signal level of a received spread spectrum signal, and a plurality of synchronization detection circuits provided in order to shorten the search time for spectrum and spreading codes. In order to solve the above-mentioned problem, the device includes an adder that adds the output voltages of the detector included in the synchronization detection circuit, and an error signal amplifier that calculates the difference between the adder output voltage and the reference voltage. It is characterized by having
誤差信号増幅器の出力により利得制御増幅器が制御され
、検波器の出力電圧の加算値が基準電圧値と等しくなる
。これにより、それぞれの同期検出回路の利得の変化に
よる検波器の出力電圧の分散範囲の平均値が一定になる
。The gain control amplifier is controlled by the output of the error signal amplifier, and the sum of the output voltages of the detector becomes equal to the reference voltage value. As a result, the average value of the dispersion range of the output voltage of the detector due to the change in the gain of each synchronization detection circuit becomes constant.
以下、本発明の実施例を図面に基づいて説明する。 Embodiments of the present invention will be described below based on the drawings.
第１図はこの実施例装置の構成を示すブロック構成図で
ある。まず、この実施例装置の構成を第１図に基づいて
説明する。この実施例装置は、誤差信号増幅器１と、低
域濾波器２と、利得制御増 。FIG. 1 is a block configuration diagram showing the configuration of the apparatus of this embodiment. First, the configuration of this embodiment device will be explained based on FIG. This embodiment device includes an error signal amplifier 1, a low-pass filter 2, and a gain control amplifier.
幅器３と、第一のシフトレジスタＩｌａ と、第二のシ
フトレジスタｌｌｂと、第三のシフトレジスタｌｌｃと
、第四のシフトレジスタｌｉｄと、コード発生器１２と
、加算器１４と、第一の同期検出回路１５ａと、第二の
同期検出回路１５ｂと、第二の同期検出回路１５ｃと、
第四の同期検出回路１５ｄとを備え、ここで、第一の同
期検出回路１５ａは、第一の相関器７ａと、第一の濾波
器８ａと、第一の検波器９ａと、第一の同期判定器１０
ａ とを鉗１え、第二の同期検出回路１５ｂは、第二の
相関器７ｈと、第二の濾波器８ｂと、第二の検波器９１
１と、第二の同期判定器１０ｂとを備え、第三の同】す
１検出回１１１旧５ｃは、第三の相関器７ｃと、第三の
濾波器８ ｃ、と、第三の検波器９ｃと、第三の同期判
定器］Ｏｃ 七を備え、また、第四の同期検出回路１５
ｄは、第四の相関器７ｄと、第四の濾波器８ｄと１、第
四の検波器９ｄと、第四の同期判定器１０ｄとを備える
。誤差信号増幅器１の第一の入力は図示されていない基
準電圧源の出力に接続され、誤差信号増幅器の出力は低
域濾波器２の人力に接続され、低域濾波器２の出力は利
得制御増幅器３の第二の入力に接続される。The width register 3, the first shift register Ila, the second shift register Ilb, the third shift register Ilc, the fourth shift register lid, the code generator 12, the adder 14, and the first a synchronization detection circuit 15a, a second synchronization detection circuit 15b, a second synchronization detection circuit 15c,
The first synchronization detection circuit 15a includes a first correlator 7a, a first filter 8a, a first detector 9a, and a first synchronization detection circuit 15d. Synchronization determiner 10
The second synchronization detection circuit 15b includes a second correlator 7h, a second filter 8b, and a second detector 91.
1 and a second synchronization determiner 10b, and a third one detection circuit 111 old 5c includes a third correlator 7c, a third filter 8c, and a third detection circuit 111. 9c, and a third synchronization determination circuit]Oc7, and a fourth synchronization detection circuit 15.
d includes a fourth correlator 7d, a fourth filter 8d, a fourth detector 9d, and a fourth synchronization determiner 10d. The first input of the error signal amplifier 1 is connected to the output of a reference voltage source (not shown), the output of the error signal amplifier is connected to the input power of the low-pass filter 2, and the output of the low-pass filter 2 is connected to the output of a reference voltage source (not shown), and the output of the low-pass filter 2 is connected to the output of the low-pass filter 2. It is connected to the second input of amplifier 3.
図示されていない受信信号源の出力は利得制御増幅器３
の第一の入力に接続され、利得制御増幅器３の出力は第
一の相関器７ａの第一の入力と、第二の相関器７ｂの第
一の入力と、第二の相関器７０の第一の入力と、第四の
相関器７ｄの第一の人力とに接続され、第一の相関器７
ａの出力は第一の濾波器８ａの入力に接続され、第二の
相関器７ｂの出力は第二の濾波器８ｂの入力に接続され
、第三の相関器７ｃの出力は第三の濾波器８ｃの入力に
接続され、第四の相関器７ｄの出力は第四の濾波器８ｄ
の入力に接続され、第一の浦波器８ａの出力は第一の検
波器９ａの入力に接続され、第二の濾波器８ｂの出力は
第二の検波器９ｂの入力に接続され、第三の濾波器８ｃ
の出力は第三の検波器９ｃの人力に接続され、第四の濾
波器８ｄの出力は第四の検波器９ｄの人力すこ接続され
、第一の検波器９ａの出力は加算器１４の第一・の入力
と、第一の同期判定器１０ａの人力とに接υｔされ、第
二の検波器９ｂの出力は加算器１４の第１の入力と、第
二の同期判定器１０ｂの人力とに接続され、第三の検波
器９ｃの出力ば加算器１４の第二の入力と、第三の同期
判定器１０（、の人力とに接続され、第四の検波器９ｄ
の出力は加算器１４の第四の入力と、第四の同期判定器
ｔｏ（ｌの人力とに接続され、加算器１４の出力は誤差
信号増幅器１の第二の入力に接続される。The output of the receiving signal source (not shown) is connected to the gain control amplifier 3.
The output of the gain control amplifier 3 is connected to the first input of the first correlator 7a, the first input of the second correlator 7b, and the first input of the second correlator 70. one input and the first human power of the fourth correlator 7d, and the first correlator 7
The output of a is connected to the input of the first filter 8a, the output of the second correlator 7b is connected to the input of the second filter 8b, and the output of the third correlator 7c is connected to the input of the third filter 8a. The output of the fourth correlator 7d is connected to the input of the filter 8c, and the output of the fourth correlator 7d is connected to the input of the fourth correlator 8c.
The output of the first wave filter 8a is connected to the input of the first wave detector 9a, the output of the second wave filter 8b is connected to the input of the second wave detector 9b, and the output of the first wave filter 8a is connected to the input of the second wave detector 9b. Third filter 8c
The output of the first wave detector 9a is connected to the power of the third wave detector 9c, the output of the fourth filter 8d is connected to the power of the fourth wave detector 9d, and the output of the first wave filter 9a is connected to the power of the fourth wave detector 9d. The output of the second detector 9b is connected to the first input of the adder 14 and the human power of the second synchronization determiner 10b. The output of the third detector 9c is connected to the second input of the adder 14 and the third synchronization determiner 10 (manpower), and the output of the third detector 9c is connected to
The output of the adder 14 is connected to the fourth input of the adder 14 and the fourth synchronization determiner to(l), and the output of the adder 14 is connected to the second input of the error signal amplifier 1.
図示されていないクロンク発生源の出力はコート発生器
１２の人力に接続され、コート′発生器１２の出力は第
四の相関器７ｄの第二の人力と、第三のシフトレジスタ
ｌｌｃの人力とに接続され、第三のシフトレジスタｌｌ
ｃの出力は第一の相関器７ａの第二の入力と、第二のシ
フトレジスタｌｌｂの入力とに接続され、第二のソフト
レジスタｌｌｂの出力は第二の相関器７ｂの第二の人力
と、第一のシフトレジスターｌａの入力とに接続され、
第一のシフトレジスターｌａの出力は′第三の相関器７
ｃの第二の入力に接続される。The output of the Cronk generator (not shown) is connected to the power of the coat generator 12, and the output of the coat' generator 12 is connected to the power of the second correlator 7d and the power of the third shift register llc. connected to the third shift register ll
The output of c is connected to the second input of the first correlator 7a and the input of the second shift register llb, and the output of the second soft register llb is connected to the second input of the second correlator 7b. and an input of the first shift register la,
The output of the first shift register la is 'third correlator 7
connected to the second input of c.
次のこの実施例装置の動作を第１図に基づいて説明する
。Next, the operation of this embodiment will be explained based on FIG.
検波器９ａ〜９ｄの出力電圧Ｖａ＝Ｖｄは加算器１４で
加算される。誤差信号増幅器２で検波器検波器９ａ〜９
ｄの出力電圧の和Ｖａ ＋Ｖｂ−１■ｃ。The output voltages Va=Vd of the detectors 9a to 9d are added by an adder 14. Detector detectors 9a to 9 with error signal amplifier 2
The sum of the output voltages of d is Va +Vb-1■c.
＋Ｖｃｌと基準電圧Ｖｒとが比較されて、その差に比例
した制御電圧が利得制御増幅器３に出力され、その利得
が制御されてＶａ ＋Ｖｂ ＋Ｖｃ ＋Ｖｄ −Ｖｒに
なる。四つの同期検出回路１５ａ〜１５ｄのそれぞれの
利得が等しい値に初期設定される。すなわぢ、検波器９
８〜９ｄの出力電圧Ｖａ〜ＶｄばＶｒ
Ｖａ ＝Ｖｂ ＝Ｖｃ ＝Ｖｄ ＝ −一−−である。+Vcl and reference voltage Vr are compared, and a control voltage proportional to the difference is output to the gain control amplifier 3, whose gain is controlled to become Va +Vb +Vc +Vd -Vr. The gains of the four synchronization detection circuits 15a to 15d are initially set to the same value. Well, detector 9
The output voltages Va to Vd of 8 to 9d are Vr Va = Vb = Vc = Vd = -1.
ここで、温度変化により４つの同期検出回路の利ｉｐ、
がそれぞれ（，１イＢ、１．２倍、１．２倍、１．３倍
に変化すると
Ｖａ −υ、ａＺＸ −
Ｖｈ＝Ｖｃ＝−−−
Ｖｒ
Ｖｄ ＝１．０８Ｘ −□−
となり、同期検出器間の偏差は変化しないが分散範囲の
平均値が一定になるように自動利得制御回路が動作する
ので、利得変動の分散による影響は第２図に示した構成
の装置と比較して２分の１に軽減される。また、〜・つ
の同期検出回路で拡散コードの同期がとれた場合でも、
その検波器出力電圧の最大値は基堆電圧Ｖｒ以下になる
ように自動利得制御回路が動作する。Here, depending on the temperature change, the benefits of the four synchronization detection circuits, ip,
When changes to (, 1 B, 1.2 times, 1.2 times, 1.3 times, Va −υ, aZX − Vh=Vc=−−− Vr Vd =1.08X −□−, and the synchronization Since the automatic gain control circuit operates so that the average value of the dispersion range remains constant although the deviation between the detectors does not change, the influence of the dispersion of gain fluctuation is reduced by 2 compared to the device with the configuration shown in Figure 2. In addition, even if the spreading codes are synchronized with the synchronization detection circuits,
The automatic gain control circuit operates so that the maximum value of the detector output voltage is equal to or lower than the base voltage Vr.
本発明は、以上説明したように、それぞれの同期検出回
路の検波器出力電圧の総和が一定となるように、自動利
得制御が行われるので、同期検出系と自動利得制御系の
利得変動の分散の影響はなくなり、それぞれの同期検出
系間の利得変動のバラツキの影響もバラツキ範囲の２分
の１に軽減されるので、同期検出の誤動作を低減させる
効果がある。As explained above, in the present invention, automatic gain control is performed so that the sum of the detector output voltages of each synchronization detection circuit is constant. The influence of the variation in gain fluctuation between the respective synchronization detection systems is reduced to one half of the variation range, which has the effect of reducing malfunctions in synchronization detection.
また、同期検出系で拡散コードの同期がとれた場合にそ
の検波器出力電圧の最大は基準電圧Ｖｒ以下に制限され
るので、同期型の自動利得制御回路への切換が容易に行
える効果がある。Additionally, when the spreading code is synchronized in the synchronization detection system, the maximum output voltage of the detector is limited to below the reference voltage Vr, which has the effect of making it easy to switch to a synchronized automatic gain control circuit. .
第１図は本発明実施例装置の構成を示すブロック構成図
。
第２図は従来例装置の構成を示すブロック構成図。
１・・・誤差信号増幅器、２・・・低域濾波器、３・・
・利得制御増幅器、４．７・・・相関器、５．８・・・
濾波器、６．９・・・検波器、１０・・・同期判定器、
１１・・・シフトレジスタ、１２・・・コード発生器、
１３・・・切換スイッチ、１４・・・加算器、１５・・
・同期検出回路、Ｖｒ・・・基準電圧、Ｖａ 、Ｖｂ
、Ｖｃ 、Ｖｄ・・・検波器９の出力電圧。
特許出願人 日木電気株式会社
代理人 弁理士 井 出 直 孝FIG. 1 is a block configuration diagram showing the configuration of an apparatus according to an embodiment of the present invention. FIG. 2 is a block configuration diagram showing the configuration of a conventional device. 1...Error signal amplifier, 2...Low pass filter, 3...
・Gain control amplifier, 4.7...correlator, 5.8...
Filter, 6.9... Detector, 10... Synchronization determiner,
11... Shift register, 12... Code generator,
13... Selector switch, 14... Adder, 15...
・Synchronization detection circuit, Vr...Reference voltage, Va, Vb
, Vc, Vd... Output voltage of the detector 9. Patent applicant Naotaka Ide, agent of Hiki Electric Co., Ltd., patent attorney
Claims (1)
御増幅器と、 この増幅器の出力に送出される信号の検波出力電圧が一
定になるように上記増幅器の利得を制御する自動利得制
御手段と、 上記増幅器の出力に接続され、それぞれ互いに異なる位
相成分について同期検出を行う複数個の同期検出回路と を備えたスペクトラム拡散信号受信装置において、 上記自動利得制御手段は、 上記複数個の同期検出回路の各検波出力電圧を加算する
加算器と、 この加算器の出力電圧が一定になるように上記増幅器の
利得を制御する手段と を備えたことを特徴とするスペクトラム拡散信号受信装
置。(1) a gain control amplifier through which a received spread spectrum signal passes; automatic gain control means for controlling the gain of the amplifier so that the detected output voltage of the signal sent to the output of the amplifier is constant; In a spread spectrum signal receiving apparatus comprising a plurality of synchronization detection circuits each connected to an output of a synchronization detection circuit and performing synchronization detection on mutually different phase components, the automatic gain control means detects each detection signal of the plurality of synchronization detection circuits. A spread spectrum signal receiving device comprising: an adder for adding output voltages; and means for controlling the gain of the amplifier so that the output voltage of the adder is constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59106159A JPS60249445A (en) | 1984-05-24 | 1984-05-24 | Receiver of spectrum spread signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59106159A JPS60249445A (en) | 1984-05-24 | 1984-05-24 | Receiver of spectrum spread signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60249445A true JPS60249445A (en) | 1985-12-10 |
Family
ID=14426511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59106159A Pending JPS60249445A (en) | 1984-05-24 | 1984-05-24 | Receiver of spectrum spread signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60249445A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4903279A (en) * | 1986-09-30 | 1990-02-20 | Aisin Seiki Kabushiki Kaisha | Receiver for spread spectrum communication and receiving method for the same |
| JPH03282278A (en) * | 1990-03-30 | 1991-12-12 | Taiyo Musen Kk | Receiving device |
-
1984
- 1984-05-24 JP JP59106159A patent/JPS60249445A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4903279A (en) * | 1986-09-30 | 1990-02-20 | Aisin Seiki Kabushiki Kaisha | Receiver for spread spectrum communication and receiving method for the same |
| JPH03282278A (en) * | 1990-03-30 | 1991-12-12 | Taiyo Musen Kk | Receiving device |
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