JPS60247950A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To shorten the time from design of a mask to completion of a device by a method wherein the first layer wiring photo mask and throughhole photo mask are fixed and wiring route is decided by only the second wiring photo mask. CONSTITUTION:In a two layered wiring device, wiring route is decided by the next second wiring layer 3 only, by preparing that rectangular fragments of the first wiring layer 1H, 1V are disposed in isolation and also are deposited in isolation at a right angle to each other for those fragments, which are disposed to up-and-down and left-and-right, and that throughhole 2 is provided at the both edges of each fagment. Examples of the disposition of the second layer wiring 3 are shown. The first one is the example in which A-C routes are replaced their order each other and are bent at a right angle, and the second one is the example in which four D-H routes running to lateral direction are collected to longitudinal direction.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a semiconductor manufacturing method that can significantly shorten the time from mask design to device completion.

(Prior art) In recent years, the new master slicing method has become mainstream for forming logic circuits in semiconductor devices, using a substrate on which elements (transistors, resistors, etc.) are arranged in advance, and wiring only the necessary elements to form the desired circuit configuration. ing.

With this method, various logic circuits can be formed on the element array board by changing only the wiring pattern. By preparing the element array board according to the number of elements to be used and designing only the wiring pattern, you can create the desired logic circuit. logic circuits can be manufactured in a short period of time.

However, in order to efficiently use the arrayed elements, the wiring becomes complicated, and two or more layers of wiring are usually used to connect the elements.

Therefore, in order to form a new logic circuit, the first
It is necessary to design a wiring photomask, a first and second wiring connection window forming photomask (through-hole formation mask), and a second wiring photomask for the two-layer wiring type, and three photomasks are designed and manufactured for each type of logic function. There must be.

In addition, in the manufacturing process, the series of three photomasks must be treated as one product, which has the disadvantage of complicating the production line in the case of high-mix, low-volume production.

(Object of the Invention) An object of the present invention is to obtain a method of manufacturing a semiconductor device that can significantly shorten the time from mask design to device completion and at the same time reduce the complexity of the device manufacturing line.

(Summary of the Invention) The main point of this invention is to arrange the rectangular pieces of the first layer wiring in a double-wiring device and to space the pieces apart from each other, and to separate the pieces that are adjacent to each other vertically and horizontally at right angles to each other. By arranging the wires and providing through holes at both ends of each fragment, the wiring route is determined by the next second layer wiring depth.

(Example) Hereinafter, an example of the method for manufacturing a semiconductor device of the present invention will be described based on the drawings. Figure 1 shows the process and Figure 2 is an explanatory diagram of the process of one embodiment. First layer wiring, 1v indicates the first layer wiring in the vertical direction.

Next, an insulating film between the 1st and 2nd layer wiring is formed on the entire surface as shown in Figure 1 (
As shown in b), if through-holes 2 are opened on both ends of each first-layer wiring IH, iv fragment, the wiring route is determined by the subsequent arrangement of the second-layer wiring.

Figure 2 shows an example where the second layer wiring is arranged, and the solid line is the first layer wiring.
The layer wirings IH and IV, and the broken line indicate the second layer wiring 3. FIG. 2(a) is an example in which the routes A to C are reversed in order and curved at right angles. Moreover, FIG. 2(b) is an example in which four routes DH running in the horizontal direction are collected into a vertical route.

In this way, the first layer wiring is formed as shown in FIG.

1 and the through holes 2 can be determined by simply changing the second layer wiring 3 to determine the desired wiring route. Therefore, the photomask that determines the wiring route is the second one.
When designing a new type (wiring route) using the mask slicing method for only layer wiring 3, it is sufficient to design and manufacture one photomask for the second layer wiring.

Moreover, since the second layer wiring is the final photo process in device manufacturing, if you prepare a board with through holes completed, you can significantly reduce the time and expenses from designing the second layer wiring photomask to completing the device. This can be reduced to

(Effects of the Invention) As explained above, in this invention, the first layer wiring photomask and the through-hole photomask are fixed, and the wiring route is determined only by the second layer wiring photomask. There are advantages as listed below.

(1) When manufacturing a new product, it was conventionally necessary to design three photomasks (first-layer wiring photomask, through-hole photomask, and second-layer wiring photomask); Since the invention requires only one second-layer wiring photomask to be designed, the time spent on design and mask production is significantly shortened, and at the same time, overhead costs are reduced.

(2) Since the photomask that determines the product type is a single second-layer wiring photomask, product product management on the production line is simplified.

(3) Introducing a new type of photomask to the production line,
Conventionally, the time to complete a device starts from the first layer wiring photolithography, but in this invention, it starts from the first layer wiring photolithography (IJ photolithography), so the first layer wiring formation, through hole formation, The time corresponding to the deposition of the second layer wiring metal film is shortened.

[Brief explanation of the drawing]

FIG. 1(a) is a plan view showing a completed state of the first layer wiring applied to the method of manufacturing a semiconductor device of the present invention;
Figure (b) is a diagram showing a state in which a through hole is opened on the first layer wiring as described above, and Figure 2 (a) is a diagram showing the order of routes for the second layer wiring applied to the method for manufacturing the same semiconductor device as above. FIG. 2(b) is a diagram showing a state in which the horizontally running paths of the second layer wiring are collected into a vertical path. IH, IV...1st layer wiring, 2, through hole, 3
...Second layer wiring.

Claims (1)

[Claims] A step of forming an insulating film on the entire surface after forming a first layer wiring fragment in isolation on a semiconductor substrate, and forming a first layer wiring and a second layer wiring on both ends of the first layer wiring fragment. A step of opening a through hole in the insulating film for connection of the eye wiring, and a step of forming a second layer wiring on the through hole and determining the wiring route only by the second layer wiring. A method of manufacturing a semiconductor device, comprising: