JPS60247767A - Simultaneous input and output system for reading-out and writing-in operation of shared memory - Google Patents

Abstract

PURPOSE:To input and output simultaneously data to and from a shared memory apparently and reducing data waiting states of respective processors, and improve the ability in decentralized processing by providing the shared memory with an address register and a data register for writing. CONSTITUTION:A processor when reading data out of the shared memory 4 outputs a readout address to a line 15 and reads the data from a line 14. At this time, a processor when writing data outputs a write address to a line 10 and the write data to a line 11. The write address is written in an address register 1 and the write data is written in a data register 2 respectively. Then when memory reading operation is completed, the write address is outputted to a line 5 and the write data is outputted to a line 6, so that the data is written in the memory 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a simultaneous input/output method for read and write operations of a shared memory.

[Prior art]

Conventionally, when using a shared memory Vt in a multiprocessor system, if one processor performs a start-up operation on the shared memory, even if another processor attempts to write data to the shared memory, the shared memory Since t4 is in use, the processor that attempted to input data t4 is in a waiting state and cannot continue processing. Even if processing is distributed using a multiprocessor system, if shared data cannot be transferred efficiently, processing in each processor will become congested and the effectiveness of distributed processing will be diminished.

[Purpose of the invention]

An object of the present invention is to reduce the number of waiting processors when using shared memory in a conventional multiprocessor system, and to improve the overall distributed processing effect. An object of the present invention is to provide a simultaneous input/output method for a start-up write operation of a shared memory, which allows another processor to write data to the shared memory even during a read operation.

[Structure of the invention]

According to the present invention, an address register for writing and a data register for writing are provided in a shared memory, and when one processor is reading memory and another processor is writing memory, the convolution address and data are temporarily stored. A simultaneous input/output method for read and write operations of a shared memory is obtained, which is characterized in that the write address register and the data register are entered and the write data is written to the memory when the memory read is completed.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram T1 of an embodiment of the present invention. Ash,
In the figure, when accessing memory data in the shared memory 4, first select the processor +j from which you want to read the data.
When l is cleared, a read address is output to the read address line 15 of the memory, and the data in the memory is read out through the read data line 14.

At this time, the processor 2 that wants to write data outputs a write address to the shared memory to the write address line IO, and at the same time outputs the write data to the write data line 11. At this time, memory read 1g No. 1 by processor 1
3 has occurred, the memory write address of processor 2 is address register 1 (flip flow rough).
Then, the memory write data is written to the data register 2 (flip flow rough), respectively. When the processor 2 writes to this register, processing with the shared memory ends, and the processor 2 moves on to other processing.

The address and data stored in each register are outputted to the memory address line 5 as the write address and the memory data line 6 when the memory read signal ends.
Furthermore, it outputs the memory write signal 12 to the memory write line 8,
The temporarily stored memory convolution data is transferred to the shared memory.

When data is read and written to the shared memory in this way, the processor 1 that executed the shared memory read process
Processor 2, which has executed all of the shared memory write processing, has simultaneously input and output data to and from the shared memory within one memory cycle. The processor 2 can continue the internal processing of each processor without having to wait for access to the shared memory.

Furthermore, by increasing the number of commit address lines 10, 4 and write data lines 11, it is possible to process duplicate write requests from each processor to the shared memory.

〔Effect of the invention〕

As explained above, the present invention enables apparent simultaneous input/output of shared memory, and allows each processor to enter a data waiting state. It is effective in reducing the amount of data and improving distributed processing capacity.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention. l...Write address register, 2...
・Write data register, 3...Memory control signal latch circuit, 4...Memory, 5...
Memory address line, 6...Memory data line, 7
. . . Emit address line, 8 . . . Memory write signal line, 9 . . . Memory read signal line, 10.
...Write address line, 11...Write data line, 12...Memory write signal, 13...
...Memory read signal, 14...Read data line, 15...Continuous address line.

Claims (1)

[Claims] A write address register and a write data register are provided in the shared memory, and when one processor writes memory while another processor writes to the memory, the write address and data are temporarily written to the write address register and data register. A simultaneous input/output method for read and write operations of a shared memory, which is characterized in that the data is stored in the memory when the memory read is completed.