JPS60245253A - Semiconductor device and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to insulation P& and improvement in semiconductor devices, and in particular to semiconductor devices and devices in which the electric field strength and film quality of a silicon oxide film used as an interlayer insulating film are improved. The present invention relates to a manufacturing method thereof.

[Background technology]

For example, F with a 70-ting gate that stores charge
In a nonvolatile memory device having an AMO8 structure, a silicon oxide film (csto, film) is used as an insulator between a 70-ring gate and a control gate. Also,
In addition, 5iO is also used as an interlayer insulating film in dynamic RAM (D-RAM), charge-coupled devices (CCD), etc.
T-line is often used. And this kind of SiO@
Jl (is a polycrystalline silicon (
Since it is made of polysilicon (Si), it is obtained by thermally oxidizing the surface of this polysilicon.
It is mostly composed of B4.

Incidentally, this type of insulating film is required to be made thinner in order to improve the degree of integration. In particular, in the memory element of the FAMO8 structure mentioned above, there is a growing demand for thinning due to the increase in write efficiency and increase in read current.

On the other hand, in order to improve the reliability of devices, characteristics such as improved uniformity and controllability of film thickness, improved electric field strength for dielectric breakdown, and fewer charge trapping regions in the film and at the interface are required. That will happen.

However, the SiOg film obtained by thermally oxidizing polysilicon as described above has poor film quality compared to a thermally oxidized film of single-crystal silicon, and particularly when the film is made thinner, the electric field strength for disconnection breakdown decreases significantly. This means that, for example, R, M+ A
nr', erson and D, R, Kerr:
J.

A, P, Vol, 48. No, 11, N
ov, 1977 P 4834-4836.

The reason for this is that the polysilicon normally used in semiconductor devices is deposited in an amorphous or polysilicon state with a very low impurity concentration, and then P (phosphorus) is used to reduce the resistance.
However, due to the heat treatment during doping with impurities, irregularities are formed on the surface of polysilicon, and when polysilicon in this state is thermally oxidized, differences in crystal orientation on the polysilicon surface and grain boundaries occur. There is a difference in oxidation rate on the polysilicon surface due to the presence of SIO! The unevenness of the film interface becomes significant.

Therefore, when a voltage is applied, local electric field concentration tends to occur and the electric field strength is reduced.

Furthermore, as shown in FIG. 1, when a polysilicon film 3 is formed on the surface S i Ox film 2 of a semiconductor substrate 1 made of single crystal silicon and the surface is oxidized, the StO, film of single crystal silicon is Since the oxidation rate of polysilicon 5IOJ44 is faster between 2 and 714 formed on the polysilicon surface, the polysilicon S
iO@p4 is StO of substrate 1.

Even the lower part in contact with B2 has a uniform film thickness without floating. Therefore, the second conductive film 5 is formed on s'tots>4.
If this step is formed, it may cause conduction failure at this stepped portion. Furthermore, when the second conductive film 5 is etched using an anisotropic dry etching technique with a relatively small amount of side etching in order to reduce the amount of dimensional conversion to the pattern dimension and improve dimensional accuracy, the second conductive film 5 is etched as shown in the figure. The second conductive film 5a remains on the stepped portion, causing a short circuit between semiconductor devices or interconnects. For this reason, there is also the problem that it becomes difficult to use anisotropic dry etching technology, which is advantageous for high integration.

On the other hand, it is also possible to form a Si0g film by the CVD method, but it is also possible to form a Si0g film by thermally decomposing organic silane such as tetraethoxylane (St (OC*Hs) a ) at 700 to 800°C under low pressure, and to It has been proposed that (SiH4) be formed by heating it to about 400° C. under atmospheric pressure with zero heat. However, this kind of CVD
Since the Si0g film has a lower density than the 5ill film formed by thermal oxidation, the film is likely to shrink due to heat treatment in a post-process. Therefore, this CVD sio is applied to the stepped portion as shown in FIG.

If a film is formed, the quality of 11':> at the stepped portion will be significantly deteriorated, and the electric field strength for dielectric breakdown will also be deteriorated.

[Purpose of the invention]

An object of the present invention is to provide a semiconductor device equipped with SiOxm as an insulating film, which is particularly designed to improve electric field strength for dielectric breakdown, and also to improve film thickness uniformity, controllability, and reliability. There is a particular thing.

Another object of the present invention is to provide an insulating film mainly composed of an insulating film or a semiconductor device having the same, which has a high electric field strength for dielectric breakdown, and has uniform film thickness and good controllability. It's in the middle of the day.

The above and other objects and novel features of the present invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, CVD5i01 using inorganic silane as the insulating film
By configuring at least two layers of a film and a thermally oxidized Si film, the high electric field strength characteristics and film thickness uniformity characteristics of inorganic silane CVD5iO* & and the thermally oxidized Si'O
With good interface characteristics due to yB%, it is possible to improve the electric field strength, make the film thickness uniform, etc. by making the insulating film thinner, and improve its reliability.

In addition, a CV D Sin film using inorganic silane is formed on the surface of a conductive film made of polysilicon, and heat treatment is applied to the edges or before the formation of CV D Sing, t[t'I. Possibly polysilicon and C
A thermally oxidized 5in1 film can be formed at the interface between the CVD 5ift film and the thermally oxidized sio,
An insulating film consisting of a film can be easily formed.

〔Example〕

FIGS. 2-4 to [F] are diagrams illustrating an embodiment in which the present invention is applied to a nonvolatile memory device with a FAMO8 structure, in the order of manufacturing steps.

First, as shown in FIG. 4(4), a first conductivity type (for example, P or K), a re-yield insulating sliding door 11 and a gate insulating film 12 (both thermally oxidized Sin films) are formed.

Then, a polysilicon film 13 is formed on the entire surface to a predetermined thickness by a CVD method, etc., and selective etching methods such as photolithography are used to form a polysilicon film 13 only at the formation position of a memory element (memory cell) as shown in the same drawing. Patterning is performed so that polysilicon film 13 remains. This polysilicon film 13
This polysilicon film 13 is constructed as a floating gate for storing charge, and is doped with impurity atoms such as P (synthetic) to lower the resistance. Note that, following the patterning of the polysilicon film 13, the gate insulating film 12 is formed at the MO8FET formation position for the peripheral circuit.
is removed.

Next, CVD silicon oxidation 1 using inorganic silane, >
After depositing (CVD 51Ot film) on the entire surface, thermal oxidation is performed to form an insulating film 14 as shown in FIG. That is, CvD Sin using inorganic silane, l[
15 companies monosilane (5iHa) or dichlorosilane<
By using an inorganic silane such as stH, clt ), N, and O and heating it to about 900° C. under a pressure of about I Torr, it can be obtained by the reaction of the following formula.

5iHi +2N! 0 → Sing +2Ng +
2H1SiH1C71z +2N@O→Sing +2
NH+2HC1 Here, CO to 9 of N, 0! may be used; in this case, the heating temperature needs to be about 1000°C.

After CvDSio, 1!415 is formed in this manner, the aforementioned thermal oxidation is performed to form CVD SiQ, as shown in a partially enlarged view in FIG.

The interface between the film 15 and the polysilicon group 13, and in this example, the interface between the CVD5iO*)lkl 5 and the silicon substrate 10, more precisely, the interface between the polysilicon film 13 and the silicon substrate 10.
11 films of Sin 16& by thermal oxidation on each main surface.

16b is formed. As a result, the insulating film 14 is formed as a two-layer structure consisting of the C V D 5ift film 15 using inorganic silane and the SiO* film 16a or 16b formed by thermal oxidation.

Next, a polysilicon film 17 is formed on the entire surface of the insulating film 14 by the CVD method as shown in FIG.
As shown in FIG.
Pattern the pattern 17b around the MO8FE T Qa. Thereafter, a thermal oxidation treatment is performed to form a thin SIO arm #18 over the entire surface.

Next, as shown in the same diagram, each of the above games) 13 a +17
Then, impurities of the second conductivity type (N type) such as P (phosphorus) and As (arsenic) are ion-implanted or diffused by the cell 7 alignment method using the cells 17a and 17b to form a source and a source on the substrate 10.
Drain #19.20t-form. And P all over
An interlayer insulating film 21 such as SG is formed, and a contact hole 2 is formed.
2 and M wirings 23 are formed by a conventional method, and a pad page sign $24 is further formed on the entire surface! Ri, FAM
A nonvolatile memory device with an O8 structure can be completed.

Regarding the above-mentioned CVD SiO* deposition of inorganic silane, for example, K, W & Tanabe et, a.
l:J, Ele-ctrochem, Soc
, 5olid , -8tate 5science a
nd Techno-1og7 Vol, 128,
NO,'l 2 Dec, 1981P, 2630-2
It is described in 635.

Therefore, according to the device configured as described above, in particular, the insulating film 14 between the 70-ring gate 13a and the control gate 17a of the FAMO8 structure FET is made of inorganic silane CVD Sin, and the film 15 is made of thermally oxidized SiO. @
Since it is composed of the film 16a, CVD of inorganic silane
Sin, the electrical properties of the film are thermal oxidation of single crystal silicon S
Because it has a dielectric breakdown electric field strength close to that of iO4 film and higher than conventional organic silane CVD lO8 film,
Even if the insulating film 4 is made thinner, sufficient electric field strength can be obtained. That is, C V D SiO using inorganic SiO
*The film 15 is no longer influenced by the underlying crystal orientation and grain boundaries of the polysilicon film 13a, ie, by the crystal orientation and grain boundaries of the polysilicon film 13, so that electric field concentration is less likely to occur and the electric field strength for dielectric breakdown can be improved. At the same time, thermal oxidation of 510w &
The presence of 16a improves the interface properties, and this makes it possible to reduce the contribution of the Si0g film due to thermal oxidation when forming an insulator with the same thickness, making it possible to reduce the unevenness of the thermally oxidized SiO4 film. , can help improve electric field strength by reducing electric field concentration.

Furthermore, since the inorganic silane CVD stow film has extremely small film shrinkage, there is little deterioration in film quality at stepped portions, and no problems occur even during heat treatment in the post-process.

Further, by making the insulating film 14 thinner, higher integration becomes advantageous, and the thermally oxidized SiOg film can be made thinner, so that the step structure shown in FIG. Anisotropic dry etching technology, which is advantageous for high integration with fewer side etching lids, can be used.

〔effect〕

(1) Insulating film, especially insulating sound-absorbing inorganic silane cVD sio film and thermal oxidation S with polysilicon as conductor film
i O, B>, t (!: te configuration site note, CV
The high electric field strength of the D5ins film can improve the electric field strength of the entire layer.

(2) CV D sio of inorganic silane! Since the membrane shrinkage of the membrane is very small, the deterioration of the membrane quality at the stepped portion can be extremely small.

(3) Since the electric field strength and film quality can be improved, the insulating film can be made thinner, which is advantageous for higher integration. At the same time, it is possible to use anisotropic etching technology by eliminating defects in the upper layer film at step portions. This can facilitate high integration.

(4) Since thermally oxidized 5i01B is interposed between the inorganic silane CVD Sin, 1% and the polysilicon film, the interface characteristics between the two can be improved.

(5) Since thermal oxidation SiO*k is formed by heat treatment before or after the formation of inorganic silane CVD5i01&, the processing steps are almost the same compared to the conventional insulating film formation using CVD 8i0*k. The reeds can be formed very easily.

Although the invention made by the present inventor has been specifically explained above based on examples, it is to be understood that the present invention is not limited to the first half examples and can be modified in various ways without departing from the gist thereof. Not even.

For example, in order to reduce surface irregularities caused by doping polysilicon with impurities (due to heat treatment), a polysilicon film is deposited with almost no impurities, and inorganic silane OCV D is deposited on top of it. S'i0*M
'k Formation shift 'C on "t" Ko (7) CV D
Impurity atoms may be ion-implanted into the polysilicon film through the SiOg film to activate the impurity atoms when thermally oxidized Sin is formed. Or inorganic silane CV first
After forming both the D Si0g film and the thermally oxidized SiO4 film, impurity ion implantation and activation by heat treatment may be performed. The same applies when amorphous silicon is used in place of polysilicon.

Furthermore, depending on the process, thermal oxidation SiO@% is first formed on the polysilicon surface, and then CVD SiO
Alternatively, an Os picture may be formed.

[Application field]

In the above explanation, we have mainly explained the platform in which the invention made by the present inventor is applied to a non-volatile storage device with a FAMO8 structure, which is the field of application that formed the background of the invention.
The invention is not limited thereto, and can be applied to all semiconductor devices using polysilicon or amorphous silicon as a conductor, such as D-RAMs and CCDs.

[Brief explanation of drawings]

A partial cross-sectional view of the first opening to explain the problems of the conventional method, Figure 2 (2) to C'') are process cross-sectional views of the manufacturing method of the device of the present invention, and Figure 3 is an enlarged cross-sectional view of the main parts. 10... Semiconductor (silicon) substrate, 11... Field insulating film, 12... Gate insulating film, 13... Polysilicon film, i3a... Floating gate, 14
... Absolute membrane, 15...CVD5i01 membrane, 16a
, 16b...thermal oxidation 5iOtk, 17a...control gate, 17b...gate, 18...5in
Il film, 19.20...source/drain layer, 21.
...PSG, 24...Nokushibasion.

Claims (1)

[Claims] 1. A semiconductor device characterized in that an insulating film for insulating conductors from each other is composed of two layers of a C V D Sin film using inorganic silane and a thermally oxidized 5i01 layer. . 2. The semiconductor device according to claim 1, wherein an inorganic silane cvDsio, it shadow is formed on polysilicon or amorphous silicon, and a thermally oxidized Sing film is formed at the interface between the two. 3. The semiconductor device according to claim 1 or 2, wherein the insulating film between the 70-ring gate and the control gate of the nonvolatile memory element of FAMO3 structure has a two-layer structure. 4. Depositing CVD5iO, & on the surface of a conductor such as silicon using an inorganic 7 run, and
A method for manufacturing a semiconductor device, characterized in that heat treatment is performed before or after the formation of the Stow film to completely form thermally oxidized Sio@ and glands on the surface of the conductor. 5- The lightning conductor is formed by forming at least one of inorganic silane CVD Sin, film, and thermally oxidized SiO2 film, and then implanting impurity ions and activating it to lower the resistance. A method for manufacturing a semiconductor device.