JPS60223114A - Production apparatus for semiconductor film - Google Patents
Production apparatus for semiconductor filmInfo
- Publication number
- JPS60223114A JPS60223114A JP7756284A JP7756284A JPS60223114A JP S60223114 A JPS60223114 A JP S60223114A JP 7756284 A JP7756284 A JP 7756284A JP 7756284 A JP7756284 A JP 7756284A JP S60223114 A JPS60223114 A JP S60223114A
- Authority
- JP
- Japan
- Prior art keywords
- plasma
- electrodes
- semiconductor film
- electrode
- split
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は半導体膜の製造装置に係り、特にCVD (C
hemical Vapor Deposition)
法によ膜
る半導体声造装置における電極構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a semiconductor film manufacturing apparatus, and particularly to a CVD (CVD)
(chemical vapor deposition)
This invention relates to an electrode structure in a semiconductor voice-making device manufactured by a method.
プラズマを利用して、気相から化学反応を媒介として基
板上に結晶や非晶質を被着させる方法(CVD法)によ
り、半導体膜を基板上に形成させる場合において、プラ
ズマのイオン衝撃による基板上の半導体膜表面および膜
内に発生する欠陥を防止するために、従来技術では(1
)カソード電極とアノード電極との間に網目状の電極を
設け、これに直流電圧を印加してイオン衝撃を防止する
方法(Amorphous Sem1conducto
rs P、290. M。When a semiconductor film is formed on a substrate by a method (CVD method) in which crystals or amorphous materials are deposited on a substrate from a gas phase through a chemical reaction using plasma, the substrate is deposited by plasma ion bombardment. In order to prevent defects occurring on the surface and inside of the upper semiconductor film, the conventional technology (1
) A method in which a mesh electrode is provided between the cathode electrode and the anode electrode, and a DC voltage is applied to this to prevent ion bombardment.
rs P, 290. M.
H、B rodsky編集、Spring−VerZa
g 1979)、あるいは(2)クロス電場法による反
応炉(応用物理50 P、346(1981))を用い
る方法が採用されている。しかし、(1)の両電極間に
網目状電極を設け、直流バイアス電圧を印加してイオン
衝撃を防止する方法では、著しく半導体層の堆積速度が
低下して生産性が上がらず、かつバイアス電圧のために
プラズマが乱れて均一で良質な半導体膜が得られないと
いう問題があり、また(2)のクロス電場法による反応
炉の場合には、カソード電極とアノード電極との間隔が
大きいために、プラズマイオン濃度に差が発生(アノー
ド側が高濃度になる)し、そのために基板上l\の堆積
速度にむらが生じ均一な膜厚の半導体層が得にくいとい
う欠点があった。Edited by H. Brodsky, Spring-VerZa
(1979), or (2) a method using a reactor using a cross electric field method (Applied Physics 50 P, 346 (1981)). However, in the method (1) in which a mesh electrode is provided between both electrodes and a DC bias voltage is applied to prevent ion bombardment, the deposition rate of the semiconductor layer is significantly reduced, productivity cannot be improved, and the bias voltage Therefore, there is a problem that the plasma is disturbed and it is not possible to obtain a uniform and high quality semiconductor film.In addition, in the case of a reactor using the cross electric field method (2), the distance between the cathode electrode and the anode electrode is large. However, there is a problem that a difference occurs in the plasma ion concentration (the concentration is higher on the anode side), which causes unevenness in the deposition rate of l\ on the substrate, making it difficult to obtain a semiconductor layer with a uniform thickness.
本発明は、上述した従来技術の欠点を解消し、プラズマ
CVD法において、均一な膜厚で品質の良い半導体膜を
、しかも高速で形成させることができる半導体膜の製造
装置を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor film manufacturing apparatus that eliminates the above-mentioned drawbacks of the prior art and can form a semiconductor film of uniform thickness and high quality at high speed using a plasma CVD method. shall be.
要するに本発明は、プラズマによるCVD法において、
反応ガスを分解させるプラズマ発生用の電極であるカソ
ード電極とアノード電極とを、多岐に分割して同一平面
内に設け、他方半導体膜を形成させる基板面を、上記分
割型プラズマ電極平面に対してほぼ平行になるように配
置して薄膜を形成させる半導体膜の製造装置である。In short, the present invention provides the following advantages in the CVD method using plasma:
A cathode electrode and an anode electrode, which are electrodes for generating plasma to decompose a reactive gas, are divided into various parts and provided in the same plane, and the substrate surface on which a semiconductor film is to be formed is set relative to the plane of the divided plasma electrode. This is a semiconductor film manufacturing apparatus that forms thin films by arranging them so that they are substantially parallel to each other.
本発明は、カソード電極とアノード電極とを多岐に分割
して両電極間の距離を縮め、かつ同一平面内にプラズマ
電極を構成しているので、プラズマ発生のスタートが順
調に進み、安定したプラズマが得られるために、プラズ
マイオン衝撃による基板上の半導体膜表面および膜内に
発生する欠陥を防止することができ、かつカソードとア
ノードとの間隔が小さいので、両電極間にプラズマイオ
ン濃度差の発生がほとんどなく、均一な膜厚の半導体膜
を製造することができる。In the present invention, the cathode electrode and the anode electrode are divided into various parts to shorten the distance between the two electrodes, and the plasma electrodes are arranged in the same plane, so that the plasma generation starts smoothly and the plasma becomes stable. This makes it possible to prevent defects occurring on the surface and inside of the semiconductor film on the substrate due to plasma ion bombardment, and because the distance between the cathode and anode is small, the difference in plasma ion concentration between the two electrodes can be prevented. There is almost no occurrence, and a semiconductor film with a uniform thickness can be manufactured.
また本発明は、直流バイアス電圧を印加してイオン衝撃
を防止する必要がないから、半導体層の堆積速度が大と
なり生産性の向上をはかることができる。Further, in the present invention, since there is no need to apply a DC bias voltage to prevent ion bombardment, the deposition rate of the semiconductor layer is increased and productivity can be improved.
次に本発明の一実施例を図面によって説明する。 Next, one embodiment of the present invention will be described with reference to the drawings.
第1図は、本発明による半導体膜製造装置の概略構造を
示す断面図である。図から明らかなごとく、真空容器1
内には、基板加熱用ヒータ2、基板保持台3およびプラ
ズマを発生させるための多岐分割型のカソード電極5と
アノード電極6があって、該カソード電極5とアノード
電極6は、同一平面内に設置されている。そして、この
プラズマ発生用の電極5.6は、基板4の面とほぼ平行
になるように配置されている。半導体層を堆積させる基
板4は下向きに配置した。真空容器1の下部には反応ガ
スを導入するパイプを設け、かつ上部には真空排気系の
パイプが接続されている。FIG. 1 is a sectional view showing a schematic structure of a semiconductor film manufacturing apparatus according to the present invention. As is clear from the figure, vacuum container 1
Inside, there are a heater 2 for heating the substrate, a substrate holding table 3, and a multi-divided cathode electrode 5 and an anode electrode 6 for generating plasma.The cathode electrode 5 and the anode electrode 6 are arranged in the same plane. is set up. This plasma generation electrode 5.6 is arranged so as to be substantially parallel to the surface of the substrate 4. The substrate 4 on which the semiconductor layer was deposited was placed facing downward. A pipe for introducing a reaction gas is provided at the bottom of the vacuum container 1, and a pipe for a vacuum exhaust system is connected to the top.
(実施例1)
第2図はプラズマを発生せしめるための電極の構造を示
す平面図である。図に示すごとく、多岐分割型のカソー
ド電極7とアノード電極8との間の互いに隣接する多岐
電極の最短距離は一定になるように配置されている。反
応ガスの圧力を数十T orrないし数Torrの範囲
内でグロー放電しプラズマを発生させるためには、カソ
ードおよびアノード電極間の最短距離は10mmないし
200mnが適当である。本実施例においては、上記電
極間の最短距離を50mmとした。プラズマ励起周波数
13.56MHzの電源をカソード電極7およびアノー
ド電極8に接続してプラズマを発生させた。反応ガスと
してモノシラン(SiH,)を真空容器1内へ導入し、
容器内の真空度を0.5Torrに保ち、プラズマを発
生させてS i H4を分解し非晶質シリコンを基板4
の表面に堆積させた。なお基板は、到達した原子の表面
拡散を大きくして膜質を良くシ、かつ基板への付着性を
改善するために、適温に加熱しである。ドーピングガス
としてはジポラン(B、HG)あるし1はホスフィン(
P Ha )を用し1て、PIN形非形質晶質シリコン
光電変換素子成した。(Example 1) FIG. 2 is a plan view showing the structure of an electrode for generating plasma. As shown in the figure, the cathode electrode 7 and the anode electrode 8 of the multi-branched split type are arranged so that the shortest distance between adjacent multi-branch electrodes is constant. In order to generate plasma by glow discharge at a reaction gas pressure within the range of several tens of Torr to several Torr, the shortest distance between the cathode and anode electrodes is suitably 10 mm to 200 mn. In this example, the shortest distance between the electrodes was set to 50 mm. A power source with a plasma excitation frequency of 13.56 MHz was connected to the cathode electrode 7 and the anode electrode 8 to generate plasma. Monosilane (SiH,) is introduced into the vacuum container 1 as a reaction gas,
The degree of vacuum in the container is maintained at 0.5 Torr, and plasma is generated to decompose SiH4 and convert amorphous silicon into substrate 4.
deposited on the surface of Note that the substrate is heated to an appropriate temperature in order to increase surface diffusion of the atoms that have arrived, improve film quality, and improve adhesion to the substrate. Doping gases include diporane (B, HG) and phosphine (1).
A PIN-type amorphous silicon photoelectric conversion device was fabricated using P Ha ).
堆積した非晶質シリコンの膜厚の均一性は、250mm
X 400no基板で±5%となり、従来技術である
クロス電場法による膜厚の均一性が±30%であるのに
比べて著しい改善が見られた。また、非晶質シリコンの
堆積速度も、従来の平行平板型のプラズマ発生電極に比
べて約34%速くなった。この膜厚の均一な光電変換素
子を太陽電池に応用した場合、従来技術のものと比較し
て約11%エネルギー変換効率を改善することができた
。The uniformity of the thickness of the deposited amorphous silicon is 250 mm.
The film thickness uniformity was ±5% for the X 400no substrate, which was a significant improvement compared to the film thickness uniformity of ±30% obtained by the conventional cross electric field method. Furthermore, the deposition rate of amorphous silicon is also about 34% faster than that of the conventional parallel plate type plasma generation electrode. When this photoelectric conversion element with a uniform film thickness was applied to a solar cell, the energy conversion efficiency could be improved by about 11% compared to the conventional technology.
(実施例2)
第3図はプラズマを発生せしめるための本発明の他の実
施例である電極の構造を示す平面図である。図に示すご
とく、多岐分割型のカソード電極9とアノ−1〜電極1
0の互いにliJ接する多岐電極の最短F1厘離が連続
的、周期的に変化するようにそれぞれの電極を配置して
いる。本実施例の場合は、1o記両電極間の最短距離が
20冊から60叫まで連続的に変化するようになってい
る。な才;、プラズマ励起周波数および反応ガスの種類
および非晶質シリコン膜の堆積方法は、実施例1と全く
同じである。(Embodiment 2) FIG. 3 is a plan view showing the structure of an electrode according to another embodiment of the present invention for generating plasma. As shown in the figure, a multi-split cathode electrode 9 and anode 1 to electrode 1
The respective electrodes are arranged so that the shortest F1 distance of the manifold electrodes that are in contact with each other by liJ changes continuously and periodically. In the case of this embodiment, the shortest distance between the two electrodes of 1o continuously changes from 20 books to 60 books. The plasma excitation frequency, the type of reaction gas, and the method of depositing the amorphous silicon film are exactly the same as in Example 1.
本実施例においては、膜厚の均一性は、実施例1と同じ
±5%が得られ、非晶質シリコンの堆積速度は従来の平
行平板型のプラズマ電極のものに比較して約33%速く
なった。本実施例においては、特にプラズマのスタート
が順調に進み、安定したプラズマが得られ、基板面に対
するイオン衝撃が防止されて、良質で均一な半導体膜が
形成されたために、これを太陽電池に応用した場合のエ
ネルギー変換効率は約15%と大幅な改善をはかること
ができた。In this example, the uniformity of the film thickness was ±5%, which is the same as in Example 1, and the deposition rate of amorphous silicon was approximately 33% compared to that of the conventional parallel plate type plasma electrode. It got faster. In this example, the plasma started smoothly, stable plasma was obtained, ion bombardment against the substrate surface was prevented, and a high quality and uniform semiconductor film was formed. In this case, the energy conversion efficiency was significantly improved to about 15%.
以上詳細に説明したごとく1本発明による多岐分割型プ
ラズマ電極を用いて半導体膜を製造する場合には、プラ
ズマイオン衝撃による欠陥の発生が少なく、かつプラズ
マイオン濃度が均一に基板に作用するため、均一で良質
の半導体1模が得られる。したがって、これを太陽電池
に応用した場合にはエネルギー変換効率を大幅に改善す
ることができる。As explained in detail above, when manufacturing a semiconductor film using the multi-split plasma electrode according to the present invention, there are few defects caused by plasma ion bombardment, and the plasma ion concentration acts uniformly on the substrate. A uniform and high-quality semiconductor pattern can be obtained. Therefore, when this is applied to solar cells, energy conversion efficiency can be significantly improved.
また、本発明によると直流バイアス電圧を印加してプラ
ズマイオン衝撃を防止する必要がないから、半導体層の
堆積4度が大となり生産性の向上をはかることができ、
実用上の効果は大きい。Further, according to the present invention, since there is no need to apply a DC bias voltage to prevent plasma ion bombardment, the semiconductor layer can be deposited more than 4 times, thereby improving productivity.
The practical effects are significant.
第1図は本発明による半導体膜製造装置の概略構造を示
す断面図、第2図および第3図は本発明のプラズマを発
生させる電極の構造を示す平面図である。
1・・・真空容器 2・・・基板加熱用ヒータ3・・・
基板保持台 4・・・基板
5.7.9・・・カソード電極
6.8、lO・・・アノード電極
代理人弁理士 中 村 純之助
矛1 図
↑
及Aミガス
才2図FIG. 1 is a cross-sectional view showing a schematic structure of a semiconductor film manufacturing apparatus according to the present invention, and FIGS. 2 and 3 are plan views showing the structure of an electrode for generating plasma according to the present invention. 1... Vacuum container 2... Heater for heating the substrate 3...
Substrate holding stand 4...Substrate 5.7.9...Cathode electrode 6.8, lO...Anode electrode Attorney Junnosuke Nakamura 1 Figure ↑ and A Migasai 2 Figure
Claims (1)
である、カソード電極とアノード電極とが、多岐に分割
され構成されている分割型のプラズマ電極であって、該
分割型プラズマ電極は、反応室内の任意の平面において
、該平面と同一面内に設置され、他方、半導体膜を形成
させる基板面を、上記分割型プラズマ電極平面に対して
ほぼ平行になるように配置して薄膜を形成させることを
特徴とする半導体膜の製造装置。 2、分割型のカソード電極およびアノード電極が、帯状
、線状もしくは棒状の金属、あるいはそれらの組合せに
よって構成されることを特徴とする特許請求の範囲第1
項記載の半導体膜の製造装置。 J0分割型のカソード電極およびアノード電極において
、該両電極の最短電極間距離が10nwnから200I
の範囲内で、一定の距離に保たれて配置していることを
特徴とする特許請求の範囲第2項記載の半導体膜の製造
装置。 4、分割型のカソード電極とアノード電極との互いの最
短電極間距離が10mmから200mの範囲内で、一定
のパターンで連続的に変化するように配置することを特
徴とする特許請求の範囲第2項記載の半導導膜の製造装
置。[Scope of Claims] 1. A split-type plasma electrode in which a cathode electrode and an anode electrode, which are electrodes for generating plasma for decomposing a reactive gas, are divided into various parts, The type plasma electrode is installed in the same plane as an arbitrary plane in the reaction chamber, and the substrate surface on which the semiconductor film is to be formed is arranged so as to be substantially parallel to the plane of the divided type plasma electrode. 1. A semiconductor film manufacturing apparatus, characterized in that a thin film is formed using a semiconductor film. 2. Claim 1, characterized in that the split cathode electrode and anode electrode are constructed of metal strips, wires, or rods, or a combination thereof.
An apparatus for manufacturing a semiconductor film as described in 1. In the J0 split type cathode electrode and anode electrode, the shortest distance between the two electrodes is from 10nwn to 200I.
3. The semiconductor film manufacturing apparatus according to claim 2, wherein the semiconductor film manufacturing apparatus is arranged at a constant distance within a range of . 4. Claim No. 4, characterized in that the split cathode electrode and anode electrode are arranged so that the shortest distance between them varies continuously in a certain pattern within a range of 10 mm to 200 m. 2. The semiconductor film manufacturing apparatus according to item 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7756284A JPS60223114A (en) | 1984-04-19 | 1984-04-19 | Production apparatus for semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7756284A JPS60223114A (en) | 1984-04-19 | 1984-04-19 | Production apparatus for semiconductor film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60223114A true JPS60223114A (en) | 1985-11-07 |
Family
ID=13637452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7756284A Pending JPS60223114A (en) | 1984-04-19 | 1984-04-19 | Production apparatus for semiconductor film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60223114A (en) |
-
1984
- 1984-04-19 JP JP7756284A patent/JPS60223114A/en active Pending
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