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JPS60213032A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS60213032A
JPS60213032A JP59069341A JP6934184A JPS60213032A JP S60213032 A JPS60213032 A JP S60213032A JP 59069341 A JP59069341 A JP 59069341A JP 6934184 A JP6934184 A JP 6934184A JP S60213032 A JPS60213032 A JP S60213032A
Authority
JP
Japan
Prior art keywords
film
semiconductor device
oxide film
region
geh4
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59069341A
Other languages
Japanese (ja)
Inventor
Takeshi Konuma
小沼 毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59069341A priority Critical patent/JPS60213032A/en
Publication of JPS60213032A publication Critical patent/JPS60213032A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To improve the electric characteristics of a Ge semiconductor device by a method wherein an insulating film having excellent interfacial characteristics is formed by providing the film consisting of a specific substance on a Ge substrate. CONSTITUTION:An oxide film 2 consisting of Ge-Si is formed on an N type Ge 1. Said oxide film 2 is formed by performing a CVD (chemical vapor deposition) method using SiH4, GeH4 and NO2. Then, a nitride film 2 consisting of Ge-Si is deposited in plasma using SiH4, GeH4 and NH3. An aperture part is provided on the prescribed region of the film 2, B is ion-implanted, a P type conductive layer is formed by performing a heat treatment, a source region 3 and a drain region 4 are formed, and source and drain electrodes 5 and 6 are provided. A gate electrode 7 is provided on the surface of the film 2, and a Ge MOSFET is completed. This film 2 of MOS structure displays excellent characteristics as an insulating film.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はゲルマニウムを用いた半導体装置及びその製造
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device using germanium and a method for manufacturing the same.

従来例の構成とその問題点 ゲルマニウムGe半導体装置の表面不活性化保護膜とし
ては種々の方法によりGe基板上にS iO2+ S 
i3N 4等の絶縁性無定形薄膜が用いられている。し
かしながらこれらの無定形薄膜とGeの界面は、例えば
S 1−8 i O2で代表されるStを基板として用
いた半導体装置に比して特性が非常に悪いものとなって
いる。5i−Sin2系と同様に熱酸化法によるG e
 02の形成も試みられているが、Ge GeO2の界
面特性が悪く、又水に溶けるもの、水には溶けないがコ
ロイド溶液を作るもの等極めて不安定な酸化膜で、熱酸
化法による酸化膜の形成法は実用化されていないのが現
状である。一方Goは材料的にSiに比して移動度が大
きく超高周波半導体装置等の材料として有望な材料であ
る。
Conventional structure and its problems As a surface passivation protective film of a germanium Ge semiconductor device, SiO2+S is deposited on a Ge substrate by various methods.
An insulating amorphous thin film such as i3N4 is used. However, the interface between these amorphous thin films and Ge has very poor characteristics compared to a semiconductor device using St as a substrate, for example, represented by S 1-8 i O2. G e by thermal oxidation method like the 5i-Sin2 system
Although attempts have been made to form GeO2, the interfacial properties of GeGeO2 are poor, and the oxide film is extremely unstable, such as those that dissolve in water, and those that do not dissolve in water but form colloidal solutions, so it is impossible to form an oxide film by thermal oxidation. At present, the formation method has not been put to practical use. On the other hand, Go has a higher mobility than Si and is a promising material for ultra-high frequency semiconductor devices.

発明の目的 本発明は上述の従来の欠点を除去し、界面特性の優れた
表面不活性化された半導体装置およびその製造方法を提
供することを目的とする、発明の構成 本発明の骨子とするところは、Go半導体基体の表面に
Ge−3tからなる酸化物或は窒化物を表面不活性化保
護膜として用いるものである。
OBJECTS OF THE INVENTION The present invention aims to eliminate the above-mentioned conventional drawbacks and provide a surface-passivated semiconductor device with excellent interfacial properties and a method for manufacturing the same. However, an oxide or nitride made of Ge-3t is used as a surface inactivation protective film on the surface of the Go semiconductor substrate.

実織例の説明 以下本発明を実権例で説明する。Explanation of actual weaving examples The present invention will be explained below using practical examples.

(実権例1) 図はGeMO3FETの例である。n型GeL[Go−
8iからなる酸化膜2を形成する。酸化膜2はSiH4
,GeH4,No2を用いて化学気相成長法(CVD法
)で形成した。酸化膜2の所定領域に開孔部を設け、B
をイオン注入し、熱処理することでp型導電層を形成し
ソース領域3.ドレイン領域4を形成する。ソース領域
3.ドレイン領域[AIからなる電極を形成し、ソース
、ドレイン電極6,6を設ける。酸化膜2の表面にAI
からなる電極を形成し、ゲート電極7を設けて、00M
O8FETが完成する。MO8構造の容量−電圧特性か
らめた表面準位は7 X 10”Cm ’ 、酸化膜の
絶縁破壊強度は3X106V/mを絶縁膜として良好な
特性を示した。
(Example 1) The figure shows an example of GeMO3FET. n-type GeL[Go-
An oxide film 2 made of 8i is formed. Oxide film 2 is SiH4
, GeH4, and No2 by chemical vapor deposition (CVD). An opening is provided in a predetermined region of the oxide film 2, and B
A p-type conductive layer is formed by ion implantation and heat treatment to form the source region 3. A drain region 4 is formed. Source area 3. Drain region [An electrode made of AI is formed, and source and drain electrodes 6, 6 are provided. AI on the surface of oxide film 2
00M is formed, and a gate electrode 7 is provided.
O8FET is completed. The surface level calculated from the capacitance-voltage characteristics of the MO8 structure was 7 x 10''Cm', and the dielectric breakdown strength of the oxide film was 3 x 106 V/m, which showed good characteristics when used as an insulating film.

(実施例2) Ge−3tから窒化物の形成法である。S 1H4rG
eH4,NH3を用い、基板温度38oc 、ガス圧4
0pa 、高周波出力1oowのプラズマ中で堆積・す
る。
(Example 2) This is a method of forming nitride from Ge-3t. S 1H4rG
Using eH4, NH3, substrate temperature 38oc, gas pressure 4
It is deposited in a plasma at 0pa and high frequency output of 1oow.

(実権例3) Go基板表面KMBE法(Mo1ecular Bea
mEpitaxy法)を用い、基板温度560CでGo
xStl−!(x=0.25 )の単結晶を200OA
成長。しかる後高圧酸化法を用い700Cで80分酸化
し、Go−8tからなる熱酸化嗅を形成する。
(Example 3) Go substrate surface KMBE method (Mo1ular Bea
mEpitaxy method) at a substrate temperature of 560C.
xStl-! (x=0.25) single crystal at 200OA
growth. Thereafter, it is oxidized at 700C for 80 minutes using a high-pressure oxidation method to form a thermally oxidized gas consisting of Go-8t.

(実施例4) 実権例3と同様にGe!Si1 、(x=0.25)の
単結晶を2.000人成長し、NH3ガスを高周波を用
いてプラズマ化し、プラズマ中で基板700Cで300
分窒化し、Ge−81からなる窒化膜を形成する・ 以上説明した様にGe半導体装置に於て、Ge−8fか
らなる酸化物、窒化物を表面不活性保護膜とするもので
ある。Ge−8iからなる酸化膜、窒化膜がGe半導体
装置に用いた場合良好な電気特性を示すのは、Goと熱
膨張係数がはy一致すること、又GexS11−!単結
晶を形成し、酸化、窒化する場合は基板GeとGe1i
4.−x力行\略子常数が一致し、連続して形成され、
かつSiを含有しているので酸化、窒化した場合、S 
i/ S iO2系に近い良好な絶縁膜が形成されると
考えている。
(Example 4) As in Actual Example 3, Ge! 2,000 single crystals of Si1 (x=0.25) were grown, NH3 gas was turned into plasma using high frequency, and the substrate was heated at 700C in the plasma at 300C.
As explained above, in a Ge semiconductor device, an oxide or nitride made of Ge-8f is used as a surface inactive protective film. When an oxide film or a nitride film made of Ge-8i is used in a Ge semiconductor device, it exhibits good electrical properties because the coefficient of thermal expansion is the same as that of Go, and also because GexS11-! When forming a single crystal, oxidizing and nitriding, the substrate Ge and Ge1i
4. −x power running\abbreviation constants match and are formed continuously,
And since it contains Si, when oxidized or nitrided, S
It is believed that a good insulating film similar to that of the i/S iO2 system will be formed.

実権例ではGo−Siからなる酸化膜、窒化膜で説明し
たが、上記酸化膜、窒化膜上に気相成長法(CVD法)
Kjす5lo2.Si3N4等の膜を重ねて覆合膜とし
ても良い。
In the actual example, an oxide film and a nitride film made of Go-Si were explained, but vapor phase growth method (CVD method) can be applied to the above oxide film and nitride film.
Kjsu5lo2. A covering film may be formed by overlapping films such as Si3N4.

又実権例1ではMOSFETで説明したが、ダイオード
、集積回路にも用いられることは勿論である。又不純物
拡散、イオン注入のマスク等にも用いられることは勿論
である・ 発明の詳細 な説明した様に本発明によれば、Go基板上にGo−3
iからなる酸化膜、窒化膜を設けることにより界面特性
の優れた絶縁膜が形成でき、Ge半導体装置の電気的特
性が改善され、その工業的価値は大なるものである。
Furthermore, although MOSFET has been explained in Example 1, it goes without saying that it can also be used for diodes and integrated circuits. It goes without saying that it can also be used as a mask for impurity diffusion, ion implantation, etc. As described in detail, according to the present invention, Go-3 is deposited on a Go substrate.
By providing an oxide film or a nitride film made of i, an insulating film with excellent interfacial properties can be formed, and the electrical properties of the Ge semiconductor device are improved, which has great industrial value.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例に係るGe半導体装置の断面図で
ある。 1・・・・・・n型Ge、2・・・・・・Go−3iか
らなる酸化膜、3・・・・・・ソース領域、4・・・・
・・ドレイン領域、6・・・・・・ソース電極、6・・
・・・・ドレイン電極、7・・・・・・ゲート電極。
The figure is a sectional view of a Ge semiconductor device according to an embodiment of the present invention. 1... n-type Ge, 2... oxide film made of Go-3i, 3... source region, 4...
...Drain region, 6...Source electrode, 6...
...Drain electrode, 7...Gate electrode.

Claims (2)

【特許請求の範囲】[Claims] (1) ゲルマニウム半導体の表面上にゲルマニウムシ
リコンからなる酸化物又は窒化物を設けた部力を少なく
とも1部に有することを特徴とする半導体装置。
(1) A semiconductor device characterized in that at least a portion of the surface of a germanium semiconductor is provided with an oxide or nitride made of germanium silicon.
(2)ゲルマニウム半導体の表面上にゲルマニウムシリ
コンからなる半導体薄層を堆積し、上記半導体薄層を酸
化或は窒化することを特徴とする半導体装置の製造方法
(2) A method for manufacturing a semiconductor device, which comprises depositing a semiconductor thin layer made of germanium silicon on the surface of a germanium semiconductor, and oxidizing or nitriding the semiconductor thin layer.
JP59069341A 1984-04-06 1984-04-06 Semiconductor device and manufacture thereof Pending JPS60213032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59069341A JPS60213032A (en) 1984-04-06 1984-04-06 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59069341A JPS60213032A (en) 1984-04-06 1984-04-06 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS60213032A true JPS60213032A (en) 1985-10-25

Family

ID=13399747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59069341A Pending JPS60213032A (en) 1984-04-06 1984-04-06 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS60213032A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6399570A (en) * 1986-06-18 1988-04-30 エイ・ティ・アンド・ティ・コーポレーション Semiconductor device and its manufacturing method
JPH01202826A (en) * 1987-12-28 1989-08-15 Dow Corning Corp Method of forming ceramic coating on substrate
JPH01204432A (en) * 1987-12-28 1989-08-17 Dow Corning Corp Method of forming ceramic coating on substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6399570A (en) * 1986-06-18 1988-04-30 エイ・ティ・アンド・ティ・コーポレーション Semiconductor device and its manufacturing method
JPH01202826A (en) * 1987-12-28 1989-08-15 Dow Corning Corp Method of forming ceramic coating on substrate
JPH01204432A (en) * 1987-12-28 1989-08-17 Dow Corning Corp Method of forming ceramic coating on substrate

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