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JPS60210833A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS60210833A
JPS60210833A JP59066642A JP6664284A JPS60210833A JP S60210833 A JPS60210833 A JP S60210833A JP 59066642 A JP59066642 A JP 59066642A JP 6664284 A JP6664284 A JP 6664284A JP S60210833 A JPS60210833 A JP S60210833A
Authority
JP
Japan
Prior art keywords
island
recess
polycrystalline silicon
film
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59066642A
Other languages
Japanese (ja)
Inventor
Shigeji Yoshii
吉井 成次
Shigenobu Akiyama
秋山 重信
Yasuaki Terui
照井 康明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59066642A priority Critical patent/JPS60210833A/en
Publication of JPS60210833A publication Critical patent/JPS60210833A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683Continuous wave laser beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691Scanning of a beam

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To enable the formation of a single crystal island of good crystallinity by energy beam inrradiation by a method wherein a recess is formed in part of the insulator on a semiconductor substrate, in which recess a non-single crystal semiconductor island surrounded by an insulator is then formed. CONSTITUTION:An oxide film 22 is formed on the Si single crystal substrate 21. Next, the recess 23 is formed in part of the film 22. Then, a polycrystalline Si 24, an oxide film 25, and a nitride film 26 are formed on the film 22; then, the films 26 and 25 in the part other than the place where a polycrystalline island 27 is to be formed are selectively removed. Thereafter, the Si 24 is removed by half with the mask of films 25 and 26 which have been left, and the island 27 surrounded by the film 22 is obtained by oxidation of the Si 24. The island 27 is recrystallized on fusion by irradiating the island 27 with an Ar laser beam 28 as shown by an arrrow from its one end 27C across the recess 23 to the other end 27B. Therefore, most of the island 27 can be changed to crystal region of good quality.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置の製造方法溝に高密度、高速な積層
構造すなわち三次元構造の半導体集積回路用基体の製造
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and a method for manufacturing a substrate for a semiconductor integrated circuit having a multilayer structure, that is, a three-dimensional structure, with high density and high speed.

従来例の構成とその問題点 半導体装置は最近ますます高密度化、高速化される傾向
にあり、そのため積層構造の半導体集積回路の開発に対
する要望が高まっている。
Conventional Structures and Problems Semiconductor devices have recently become more dense and faster, and there has been an increasing demand for the development of semiconductor integrated circuits with a stacked structure.

従来、積層構造の半導体集積回路の形成には例えば半導
体基板上の絶縁物中に平担な多結晶シリコン島を形成し
、この多結晶シリコン島にエネルギービームを照射する
ことによシ、多結晶シリコン島の単結晶化を行ない、こ
うして形成された単結晶シリコン島に素子を形成すると
いう方法で行なわれている。
Conventionally, to form a semiconductor integrated circuit with a stacked structure, for example, a flat polycrystalline silicon island is formed in an insulator on a semiconductor substrate, and the polycrystalline silicon island is irradiated with an energy beam. This is accomplished by monocrystallizing a silicon island and forming elements on the thus-formed single-crystal silicon island.

以下に従来のエネルギービーム照射による単結晶島の形
成方法について第1図とともに説明する。
A conventional method for forming single crystal islands by energy beam irradiation will be described below with reference to FIG.

まず、半導体基板11表面に約1μmのCVD酸化膜1
2を形成しこの上にQ、5μmの多結晶シリコン13を
減圧CVD法によシ形成する(第1図a)。次に保護酸
化膜14およびチッ化膜15を形成し、多結晶シリコン
島を形成する場所以外のチッ化膜15および保護酸化膜
14をエツチングにて除去する(第1図b)。残された
チッ化膜16および酸化膜14をマスクにして多結晶シ
リコン13を半分の膜厚だけエツチングして除去しく第
1図c) 、LOCO8酸化を行なうと多結晶シリコン
島16が形成される(第1図d)。このようにして形成
された多結晶シリコン島16にエネルギービーム17を
照射する。
First, a CVD oxide film 1 of approximately 1 μm is formed on the surface of the semiconductor substrate 11.
A polycrystalline silicon layer 13 having a thickness of 5 .mu.m is formed thereon by low pressure CVD (FIG. 1a). Next, a protective oxide film 14 and a nitride film 15 are formed, and the nitride film 15 and the protective oxide film 14 are removed by etching in areas other than those where polycrystalline silicon islands are to be formed (FIG. 1b). Using the remaining nitride film 16 and oxide film 14 as a mask, the polycrystalline silicon 13 is etched by half its film thickness to remove it (FIG. 1c). When LOCO8 oxidation is performed, a polycrystalline silicon island 16 is formed. (Figure 1d). An energy beam 17 is irradiated onto the polycrystalline silicon island 16 thus formed.

この方法によれば、第1図dに示すエネルギービーム1
7の入射側の多結晶シリコン島16と酸化膜12の界面
18から再結晶が開始され同時に多数の結晶成長がおこ
って多くの結晶粒界が生じることがあり、結晶性の良い
単結晶島を作ることは非常に困難であった。
According to this method, the energy beam 1 shown in FIG.
Recrystallization starts from the interface 18 between the polycrystalline silicon island 16 and the oxide film 12 on the incident side of 7, and a large number of crystals grow at the same time, resulting in many crystal grain boundaries. It was very difficult to make.

発明の目的 本発明は以上のような従来の問題に鑑み、エネルギービ
ーム照射によシ同時に生じた多数の結晶成長による多く
の結晶粒界の発生を防ぐことにより良質の結晶領域を形
成し、積層構造をもった高密度、高速のLSIを提供す
ることを目的としている。
Purpose of the Invention In view of the above-mentioned conventional problems, the present invention aims to form high-quality crystal regions by preventing the generation of many grain boundaries due to the simultaneous growth of many crystals caused by energy beam irradiation. The purpose is to provide a high-density, high-speed LSI with a structured structure.

発明の構成 本発明は、半導体基板上の絶縁物の一部に凹部を形成し
、前記凹部を含む絶縁物上に絶縁物に囲まれた非単結晶
半導体島を形成し、前記半導体島の一方の端部から前記
凹部上を横切って前記半導体島の他方の端部に向かって
エネルギービームを照射することにより、前記半導体島
を溶融し再結晶化するとともに凹部での放熱性を良好と
することにより、結晶性の良い素子領域の形成を可能に
し、高速、高密度のLSIを製造可能とするものである
Structure of the Invention The present invention forms a recess in a part of an insulator on a semiconductor substrate, forms a non-single crystal semiconductor island surrounded by an insulator on the insulator including the recess, and forms one of the semiconductor islands. melting and recrystallizing the semiconductor island and improving heat dissipation in the recess by irradiating an energy beam from the end of the semiconductor island across the recess toward the other end of the semiconductor island; This makes it possible to form an element region with good crystallinity and to manufacture high-speed, high-density LSIs.

実施例の説明 本発明の一実施例にかかる単結晶島の1遣方法を第2図
とともに説明する。まず、たとえばシリコン単結晶半導
体基板21表面に約1μmのCVD酸化膜22を形成す
る。なお、この半導体基板21には半導体集積回路素子
(図示せず)が形成されている。次にエツチング等の方
法によってCVD酸化膜22の一部に深さ2000〜3
000人の凹部23を形成する(第2図a)。上記CV
D酸化膜22の上に0.5μmの多結晶シリコン24、
保護酸化膜25およびチッ化膜26を形成し多結晶シリ
コン島27を形成する場所以外のチッ化膜および保護酸
化膜を選択的にエツチングして除去する(第2図b)。
DESCRIPTION OF EMBODIMENTS A method for forming single crystal islands according to an embodiment of the present invention will be described with reference to FIG. First, for example, a CVD oxide film 22 of about 1 μm is formed on the surface of a silicon single crystal semiconductor substrate 21 . Note that a semiconductor integrated circuit element (not shown) is formed on this semiconductor substrate 21. Next, a part of the CVD oxide film 22 is etched to a depth of 2,000 to 300 m by a method such as etching.
000 recesses 23 are formed (FIG. 2a). The above CV
0.5 μm polycrystalline silicon 24 on the D oxide film 22,
A protective oxide film 25 and a nitride film 26 are formed, and the nitride film and the protective oxide film are selectively etched away at locations other than those where polycrystalline silicon islands 27 are to be formed (FIG. 2b).

しかるのち、残された膜25゜26をマスクとして多結
晶シリコン24を半分の厚みだけエツチングして除去し
、シリコン24のLOCO5酸化を行なって絶縁酸化膜
22に囲まれた10X100μmの矩形状の多結晶シリ
コン島27が得られる。なお、この工程のシリコン24
の酸化によシ形成された周囲の酸化膜と第2図aで形成
した酸化膜とは一体のものとして絶縁物22と示す。2
7Aは凹部23の部分の多結晶シリコン島の一部よりな
る領域である。このようにして形成された多結晶シリコ
ン島27にエネルギービームとして連続発振アルゴンレ
ーザ28を矢印のごとく島27の一方の端部27Cから
凹部23を横切って他方の端部27Bに向って照射し、
島27を溶融再結晶化する。
Thereafter, using the remaining film 25 and 26 as a mask, half the thickness of the polycrystalline silicon 24 is etched and removed, and the silicon 24 is oxidized with LOCO5 to form a rectangular polycrystalline silicon 24 of 10×100 μm surrounded by the insulating oxide film 22. Crystalline silicon islands 27 are obtained. In addition, silicon 24 in this step
The surrounding oxide film formed by oxidation and the oxide film formed in FIG. 2a are shown as an insulator 22 as an integral part. 2
7A is a region consisting of a part of the polycrystalline silicon island in the recessed portion 23. The thus formed polycrystalline silicon island 27 is irradiated with a continuous wave argon laser 28 as an energy beam in the direction of the arrow from one end 27C of the island 27 across the recess 23 toward the other end 27B.
Island 27 is melted and recrystallized.

この方法によれば、多結晶シリコン島27のアルゴンレ
ーザ28の入口側と周囲の絶縁物22との界面に発生し
た多数の結晶成長は、凹部23の部分に達すると消滅し
、凹部23の部分で生じた結晶方位で結晶成長がおこシ
、多結晶シリコン島27のアルゴンレーザ28の出口側
(部分27B)までそのまま成長する。
According to this method, a large number of crystal growths generated at the interface between the inlet side of the argon laser 28 of the polycrystalline silicon island 27 and the surrounding insulator 22 disappear when they reach the recess 23, and Crystal growth occurs in the crystal orientation generated in the above, and the crystal grows to the exit side (portion 27B) of the argon laser 28 of the polycrystalline silicon island 27.

これは、次に述べる理由になるものと考えられる。すな
わち、アルゴンレーザ28が多結晶シリコン島27の一
端部27Cに入射されたときに、多結晶シリコンが溶融
し始め多結晶シリコン島27と酸化膜22の界面の多数
の部分から局部的に結晶成長が生じる。このとき同時に
局部的にも結晶成長間に粒界が発生する。そして、結晶
成長がシリコン島の一端から生じ始めて、レーザ28の
ビームが凹部23に達し、凹部に位置する島の領域27
Aの部分のシリコンが溶融し始める。このとき、凹部2
3の部分の酸化膜22は他の部分よシも薄いため、この
凹部23の部分での下地半導体基板21への熱放散が他
の部分よりも大きく、凹部23の部分に位置する島の領
域27Aにおいて。
This is considered to be the reason described below. That is, when the argon laser 28 is incident on one end 27C of the polycrystalline silicon island 27, the polycrystalline silicon begins to melt and crystals grow locally from many parts of the interface between the polycrystalline silicon island 27 and the oxide film 22. occurs. At this time, grain boundaries also occur locally between crystal growth. Then, crystal growth begins to occur from one end of the silicon island, and the beam of the laser 28 reaches the recess 23, causing a region 27 of the island located in the recess.
The silicon in part A begins to melt. At this time, the recess 2
Since the oxide film 22 in the portion 3 is thinner than the other portions, heat dissipation to the underlying semiconductor substrate 21 in the recess 23 is greater than in other portions, and the island region located in the recess 23 is In 27A.

は、溶融したシリコンの固化も他の部分(例えば凹部2
3以外の多結晶シリコン)よりもはやい。
In this case, the solidification of the molten silicon also occurs in other parts (for example, the recess 2).
Faster than polycrystalline silicon (other than 3).

したがって、凹部23の部分で発生したシリコンの結晶
成長は多結晶シリコン島の端部27Bの方向に伸びるが
、27Cの部分で成長した結晶粒界は、はやく再結晶化
される領域27Aで阻止されるO 第3図に、従来の多結晶シリコン島と本発明における多
結晶シリコン島に同じ条件でビームアニールした場合の
再結晶化についての結果を平面的に示す。第3図aは従
来の多結晶シリコン島、bは本発明における構造をもっ
た多結晶シリコン島にレーザ照射して再結晶化すること
によシ単結晶シリコン島を形成したときの結晶粒界の発
生と消滅を示したものである。まず、第1図に示す従来
の多結晶シリコン島16にアルゴンレーザ17を矢印X
の方向に照射すると、多結晶シリコン島16と絶縁物1
2との界面18で多数の結晶成長が同時に発生し、その
結果結晶粒界3oが生じ再結晶化された単結晶シリコン
島31の中央部あるいは島全体にまで伸びることがあり
、ウェハー全面に均一に良質の再結晶島を得ることは困
難であった。
Therefore, the silicon crystal growth that occurs in the concave portion 23 extends toward the end 27B of the polycrystalline silicon island, but the crystal grain boundary that grows in the portion 27C is blocked in the region 27A, which is quickly recrystallized. FIG. 3 shows, in plan, the results of recrystallization when a conventional polycrystalline silicon island and a polycrystalline silicon island according to the present invention are beam annealed under the same conditions. Figure 3a shows a conventional polycrystalline silicon island, and b shows the crystal grain boundaries when a single crystalline silicon island is formed by recrystallizing the polycrystalline silicon island having the structure according to the present invention by laser irradiation. It shows the emergence and disappearance of. First, an argon laser 17 is applied to the conventional polycrystalline silicon island 16 shown in FIG.
When irradiated in the direction of , the polycrystalline silicon island 16 and the insulator 1
A large number of crystals grow simultaneously at the interface 18 with the wafer 2, resulting in a grain boundary 3o, which may extend to the center or the entire island of the recrystallized single crystal silicon island 31, uniformly over the entire surface of the wafer. It was difficult to obtain high quality recrystallized islands.

次に、本発明による構造をもった多結晶シリコン島にレ
ーザ照射した場合を考える(第3図b)。
Next, consider the case where a polycrystalline silicon island having a structure according to the present invention is irradiated with a laser (FIG. 3b).

従来例と同様に矢印の方向にアルゴンレーザ28を照射
すると、a図と同じように第2図の多結晶シリコン島2
7と絶縁膜22との界面18で異なる方位をもった結晶
成長が同時に発生し、その結果結晶粒界30が生じる。
When the argon laser 28 is irradiated in the direction of the arrow as in the conventional example, the polycrystalline silicon island 2 of FIG.
Crystal growth with different orientations occurs simultaneously at the interface 18 between the insulating film 7 and the insulating film 22, resulting in crystal grain boundaries 30.

ここまでは従来例と同じであるが、多結晶シリコン島2
7の直下の絶縁物に凹部23を形成しであるため、との
凹部23での結晶成長の方が界面18からの結晶成長よ
シもはやいため、界面18より生じた結晶粒界30が凹
部23の部分に達する時にはすてに凹部23に位置する
シリコン領域27Aは溶融後の固化が始まっており、界
面から生じた結晶粒界3oは凹部に位置する領域27A
の入口で阻止される。以降の結晶成長は凹部の領域27
Aで生じた方位で残りの多結晶シリコン島27Bが再結
晶化される。
Up to this point, the process is the same as the conventional example, but the polycrystalline silicon island 2
Since the recess 23 is formed in the insulator directly under the insulator 7, crystal growth in the recess 23 is faster than crystal growth from the interface 18, so the crystal grain boundaries 30 generated from the interface 18 are formed in the recess 23. By the time the region 27A located in the recess 23 is reached, the silicon region 27A located in the recess 23 has already started to solidify after melting, and the crystal grain boundary 3o generated from the interface has reached the region 27A located in the recess.
blocked at the entrance. Subsequent crystal growth will occur in the concave region 27.
The remaining polycrystalline silicon islands 27B are recrystallized in the orientation generated at A.

その結果、凹部23をたとえばエネルギービームの入射
側の端部に設けることにより確実に多結晶シリコン島の
大部分を良質な結晶領域にすることが可能となる。
As a result, by providing the recess 23, for example, at the end on the incident side of the energy beam, it is possible to reliably make most of the polycrystalline silicon island into a high-quality crystal region.

第3図Cは、本発明における溶融、固化による再結晶化
の様子を図示したものであって、矢印Xの向きにシリコ
ンが溶融し始めたとき、前述のととく凹部23の付近の
領域27Aの部分の方が270の部分より放熱性が良好
なため、はやく固化が生じ、粒界30伸びは領域27A
の部分で阻止される。
FIG. 3C illustrates the state of recrystallization due to melting and solidification in the present invention, and when silicon begins to melt in the direction of arrow Because heat dissipation is better in the area 270 than in the area 270, solidification occurs quickly, and grain boundary 30 elongation is similar to area 27A.
It is blocked in the part.

なお、多結晶シリコン島直下の絶縁物に設ける凹部23
としては、第4図に示すようにエネルギービームの入射
側に設けた方がより大面積の良好な結晶領域が得られる
。凹部23は第4図aのように多結晶シリコン島27の
端の方に設けてもよいし、bのように多結晶シリコン島
27と絶縁物22との界面に設けてもよい。また第5図
に示すように、絶縁物膜22の下部に凹部27を形成し
てもこの部分の膜22の膜厚を薄くし、この部分の放熱
性を良くしても同様の効果を得ることができる。
Note that the recess 23 provided in the insulator directly under the polycrystalline silicon island
As shown in FIG. 4, a better crystal region with a larger area can be obtained by providing it on the incident side of the energy beam. The recess 23 may be provided toward the end of the polycrystalline silicon island 27 as shown in FIG. 4a, or may be provided at the interface between the polycrystalline silicon island 27 and the insulator 22 as shown in FIG. Furthermore, as shown in FIG. 5, even if a recess 27 is formed at the bottom of the insulating film 22, the same effect can be obtained by reducing the film thickness of the film 22 in this part and improving the heat dissipation of this part. be able to.

発明の効果 本発明によれば、多結晶あるいは非晶質の非結晶半導体
島から良質な単結晶半導体島を形成し、この単結晶化領
域に素子を形成することにより、高速化、高密度化に適
した積層構造の半導体集積回路の実現が可能となる。
Effects of the Invention According to the present invention, high-quality single-crystal semiconductor islands are formed from polycrystalline or amorphous non-crystalline semiconductor islands, and elements are formed in this single-crystalline region, thereby increasing speed and density. It becomes possible to realize a semiconductor integrated circuit with a laminated structure suitable for.

【図面の簡単な説明】[Brief explanation of drawings]

第1図a −dは従来からの単結晶シリコン島の形成方
法を示す工程断面図、第2図a ”−cは本発明の一実
施例の単結晶シリコン島の形成方法を示す工程断面図、
第3図a、bは従来の多結晶シリコンと本発明による多
結晶シリコン島にエネルギービームを照射して再結晶化
したときの結晶粒界の様子を示す平面図、第3図Cは本
発明による再結晶化の様子を示す断面図、第4図a、b
、第5図は本発明における多結晶シリコン島の他の例の
断面図である。 21・・・・・・半導体基板、22・・・・・・絶縁物
、23・・・・・・・・・凹部、27・・・・・・多結
晶シリコン島、28・・・・・エネルギービーム、31
・・・・・・再結晶化された単結晶シリコン島。 特許出願人 工業技術院長 川 1)裕 部第1図 第2vA 9 第3図 第4図
1A to 1D are process cross-sectional views showing a conventional method for forming a single crystal silicon island, and FIGS. 2A to 2C are process cross-sectional views showing a method for forming a single crystal silicon island according to an embodiment of the present invention. ,
Figures 3a and 3b are plan views showing the appearance of crystal grain boundaries when conventional polycrystalline silicon and polycrystalline silicon islands according to the present invention are recrystallized by irradiating energy beams, and Figure 3C is a plan view showing the appearance of crystal grain boundaries when the polycrystalline silicon islands according to the present invention are recrystallized. Cross-sectional view showing the state of recrystallization by
, FIG. 5 is a sectional view of another example of a polycrystalline silicon island in the present invention. 21... Semiconductor substrate, 22... Insulator, 23... Concavity, 27... Polycrystalline silicon island, 28... energy beam, 31
・・・・・・Recrystallized single crystal silicon island. Patent applicant: Director of the Agency of Industrial Science and Technology Kawa 1) Hirobe Figure 1 Figure 2vA 9 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上の絶縁物の一部に凹部を形成し、前記凹部
を含む絶縁物上に絶縁物に囲まれた非単結晶半導体島を
形成し、前記半導体島の一方の端部から前記凹部上を横
切って前記半導体島の他方の端部に向かってエネルギー
ビームを照射することにより、前記半導体島を溶融し再
結晶化することを特徴とする半導体装置の製造方法。
A recess is formed in a part of an insulator on a semiconductor substrate, a non-single crystal semiconductor island surrounded by an insulator is formed on the insulator including the recess, and a non-single crystal semiconductor island surrounded by an insulator is formed from one end of the semiconductor island onto the recess. A method of manufacturing a semiconductor device, characterized in that the semiconductor island is melted and recrystallized by irradiating an energy beam across the semiconductor island toward the other end of the semiconductor island.
JP59066642A 1984-04-05 1984-04-05 Manufacture of semiconductor device Pending JPS60210833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59066642A JPS60210833A (en) 1984-04-05 1984-04-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59066642A JPS60210833A (en) 1984-04-05 1984-04-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS60210833A true JPS60210833A (en) 1985-10-23

Family

ID=13321751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59066642A Pending JPS60210833A (en) 1984-04-05 1984-04-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60210833A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008199042A (en) * 2008-03-14 2008-08-28 Hitachi Ltd Method for manufacturing image display device using thin film semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814525A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814525A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008199042A (en) * 2008-03-14 2008-08-28 Hitachi Ltd Method for manufacturing image display device using thin film semiconductor device

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