JPS60207458A - Control circuit of inverter - Google Patents

Abstract

PURPOSE:To improve the resolution of an inverter by devising the phase voltage energizing pattern as a stored data in a ROM, thereby minimizing the storage capacity of the ROM. CONSTITUTION:Two types of basic patterns (phase angles 0 deg.-60 deg., 120 deg.-180 deg.) are divided at electric angle 15 deg. into four and stored in a ROM6 in response to the bits. A controller of an inverter reads out the pattern from the ROM6, and generates a phase voltage energizing pattern. Thus, a data selector 9 is provided at the output side of the ROM6, connected directly or through a logic inverter 10 with a data selector 8, and connected through a counter 5 and a sexanary ring counter 7 with the counter 5. Thus, the data output from the ROM6 is selected by a clock synchronized at the prescribed electric angle with the both basic pattern by the selector 9, and outputted.

Description

Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a three-phase inverter control circuit that controls an inverter by reading out energization patterns stored in a storage device, and selecting and combining the energization patterns. This invention relates to an inverter control circuit that obtains an AC control signal.

[Prior art]

FIG. 1 is a diagram showing an example of a conventional inverter control circuit. In FIG. , a read-only memory (hereinafter referred to as ROM) 6, and a data selector 8 are sequentially connected. An oscillator 3 is connected to the rate multiplier 2, and a hexadecimal ring counter is connected between the counter 5 and the data selector 8.

Output signal F of the rate multiplier 2. is F −*
It is given by Fi 56 . Here, K is a constant determined by the 8-bit input, and Fll is the oscillation frequency output from the oscillator 3.

The output signal F is divided by a frequency divider 4 to a necessary frequency FCK, which will be described later, and is input to a counter 5. ROM
6 has a storage capacity of 12 bits and 4096 words, the AC control signal period is divided into 6 at 60° intervals as shown in Fig. 2, and the data corresponding to each electrical angle is the output of the ROM 6. Out of 8 bits, 1 to 6 bits are stored to be output. The data output from the ROM is sent to the data selector 811? : Input. This data selector 8 receives a signal from a hexadecimal ring counter 7 which operates using the 8th bit frequency F8 of the counter 5 as a clock, selects data, and combines the data to form one cycle of the AC control signal. Furthermore, 1
AC control signals for the other two phases are formed with a delay of 20 degrees.

Also, the frequency FB of the 8th bit of the counter 5 is the frequency Fil corresponding to the electrical angle of 60° of the AC control signal: FCK×1
- If K and the output FCK of the frequency divider 4 are determined, the data corresponding to the electrical angle of 60° of the AC control signal is ・256
This results in an electrical angular resolution of 60°/256×0.24°.

However, since the voltage resolution corresponding to the output voltage of the inverter is handled by the remaining 4 bits in the ROM 6 with 12 input bits and a storage capacity of 4096 words, only 16 output voltages can be obtained. Therefore, for example, when the frequency changes from 0 to 60 Hz, the output voltage changes only at intervals of approximately 4H2 as shown in FIG. 3, resulting in extremely poor controllability.

[Summary of the invention]

This invention was made to eliminate the above-mentioned drawbacks, and by devising the phase voltage energization pattern as stored data, it is possible to minimize the storage capacity of the ROM and increase the usage efficiency of the ROM. The purpose of this invention is to provide an inverter control circuit with improved resolution for AC control signals.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Fourth
The figure shows the phase voltage conduction pattern used in the present invention: U, V, W.
Of the three phases, U and V@ are described. Fourth
In the figure, if we consider the 60° section (■), the transistors as switching elements of the U phase constituting the inverter (not shown) are in a conductive state, and the transistors of the ■ phase are the difference between the U and V phases, that is, the line voltage. Switching is performed according to the energization pattern that provides the UV voltage (■). Similarly, in the section ■, the U-phase energization pattern is the inversion of the V-phase energization pattern in the section As a result, a voltage of -V of Ki voltage is given.

If we organize this relationship, we get something like Figure 5.

In FIG. 5, if the waveforms of ■ and ■ correspond to the energization patterns of the U phase and ■ phase in the section of ■ in FIG. 4, then ■ or ■
is the voltage of ■ of the line voltage U-V, and the difference between ■ and ■, that is, ◎
The waveform of is K to give a voltage of ■.

According to the phase voltage energization pattern shown above, only two of the three phases require switching control in each 60° interval, and the transistors in the other phases only need to be in a conductive or nonconductive state. I understand.

Therefore, the energization patterns (hereinafter referred to as basic patterns) that need to be stored in the ROM (memory element) VC are only two types in the 60° interval, and as mentioned above, the 1m and 60°
The energization pattern in the section is obtained by reversing this basic pattern.

FIG. 6 shows the structure of the basic pattern stored in the ROM. Two types of basic patterns (basic pattern 1 phase angle 00~60' and basic pattern 2 phase angle 1200~1)
80°) is divided into four electrical angles of 15° each, and a total of eight types of data are stored corresponding to each pitch. Here, considering the same resolution as before (0.24° in electrical angular resolution), it is sufficient to provide 256 storage capacities for energization patterns in 60' divisions, so two types of basic patterns can be stored in 64 bytes. This means that only 6 frequency command input bits are required for the ROM.

FIG. 7 shows an inverter of the present invention which reads basic patterns stored in a ROM and rearranges the data using a data selector operating with a clock synchronized with a predetermined electrical angle to generate the phase voltage energization pattern shown in FIG. This shows the control circuit of the output side pressure data selector 9 of ROM6.
The data selector 9 is connected directly or through a logic inversion element 10 to the data selector 8, the counter 5 is directly connected to the data selector 9, and the data selector 8 is connected to a hexadecimal ring counter 7. via counter 5
The other circuit configuration is the same as the circuit shown in FIG. 1 above.

The basic pattern 1.2 shown in FIG. 6 is stored in the ROM 6, and the data corresponding to the address specified by the 6 bits output from the counter 5 is output from the 1st bit of the ROM 6 to the 8th pit IC. Ru. From this 8-bit data, the data selector 9 selects basic pattern 1 and basic pattern 2, which are divided into four parts at an electrical angle of 15°, using a clock synchronized with a predetermined electrical angle. A basic pattern 1 and a basic pattern 2 are output.The appearance of this output is shown in FIG.

According to FIG. 8, the output of the data selector 9 uses a clock A with a period of 30' electrical angle and a clock B with a period of 60' electrical angle, and outputs X every 15 degrees of electrical angle as shown in the table below.
1 to X4 and Y1 to Y4 are selected, and as a result, basic patterns 1 and 2 are generated at an electrical angle period of 60°. The clock A and clock B can be provided from the counter 5 as shown in FIG.

FIG. 9 shows a circuit in which the data selector 8 uses the basic patterns 1 and 2 outputted from the data selector 9 to construct the phase voltage energization pattern for the three phases shown in FIG. .

The data selector 8 consists of data selectors 8-1, 8-2, 8-3 having the same configuration and having six input terminals 21 to z6, and each data selector has six input terminals 2 and 8-3.
The inputs supplied to 1 to z6 are signals C and D that constitute a period of 3600 electrical degrees output from the hexadecimal ring counter 7.
, EK, output terminal 2 is selected every 60 degrees of electrical angle.
is output to.

6 of each of the above data selectors 8-1, 8-2, 8-3
Signals representing the basic pattern 1.2, the conductive pattern, the non-conductive pattern, and the inversion of the basic pattern 1.2 are input to the input terminals, respectively. Here, the basic patterns 1 and 2 are output from the data selector 9, and the basic patterns 1 and 20 inversion signals are inputted to the logic inversion element 10 by inputting the basic patterns 1 and 2 to the logic inversion element 10. It can be easily obtained as an output of 10. Also, the conduction pattern
In a non-conducting pattern, it is sufficient to apply a fixed signal that logically gives 61'' and 0''.

As mentioned above, these six patterns are switched every 60 degrees of electrical angle, so the input of data selector 8-2 has an electrical angle of 120 degrees relative to the input of data selector 8-1.
In other words, the signal to the input terminal z1 of the data selector 8-1 is input to the input terminal 23 of the data selector 8-2 (
22 to z6), and by wiring data selector 8-3 and data selector 8-2 in the same manner, each data selector 8-1 to 8-3 At output 2, a three-phase AC control signal for controlling the inverter is obtained.

〔Effect of the invention〕

As explained above, according to the present invention, one phase of the AC control signal of the inverter that obtains three-phase AC power is
Divide at intervals and phase angles from 00 to 60°.

The energization pattern at a location corresponding to 120° to 180° is stored in a storage device, and the energization pattern and an inverted signal of the energization pattern read from the storage device, as well as the conduction pattern and non-conduction pattern of the switching elements constituting the inverter. By combining these, we will obtain a three-phase AC control signal with a phase difference of 120 degrees.
, 4096 words, K needs only 6 bits to obtain the same electrical angular resolution as the conventional one, and the remaining 6 bits can provide the voltage resolution corresponding to the output voltage of the inverter. This makes it possible to obtain 64 different output voltages, resulting in four times the voltage resolution of conventional methods.
Therefore, it is possible to minimize the storage capacity of the ROMK, increase the usage efficiency of the ROM, and improve the resolution of the ROM for AC control signals.

[Brief explanation of the drawing]

Fig. 1 is a conventional inverter control circuit diagram, Fig. 2 is an explanatory diagram explaining the storage method in the ROM in the control circuit, and Fig. 3 is a diagram showing the relationship between the inverter output voltage and output frequency using the conventional control circuit. FIG. 4 is an explanatory diagram showing the phase voltage energization pattern used in this invention, and FIG.
FIG. 6 is an explanatory diagram illustrating a storage method in ROM according to an embodiment of the present invention, and FIG. 7 is an explanatory diagram illustrating an embodiment of the present invention for controlling an inverter. The circuit diagram, Fig. 8 is a circuit diagram for reading out the energization pattern stored in the ROMK, and Fig. 9 is a circuit diagram for reading out the energization pattern stored in the ROMK, and Fig. 9 is a three-phase circuit diagram consisting of the phase voltage energization pattern shown in Fig. 4 by selecting and combining the energization patterns in Fig. 8. An explanatory diagram illustrating a circuit for obtaining an AC control signal,
FIG. 10 is an output signal waveform diagram of the hexadecimal ring counter. 1... Frequency command circuit, 2... Rate multiplier, 3... Oscillator, 4... Frequency divider, 5... Counter, 6°°° read only memory (ROM),
7... Hexadecimal ring counter, 8, 9... Data selector, 10... Logic inversion element Note that in each figure, the same reference numerals indicate the same or equivalent parts. Patent Applicant: Mitsubishi Electric Corporation Figure 2 Figure 3 Figure 4 Figure 6 Figure 6 Figure 8 Pitt Figure 8 Figure 9 Figure 60.2.22 Mr. Commissioner of the Japan Patent Office 1. Indication of Case Patent Application No. 59-62776 No. 2, Name of the invention Inverter control circuit 3, Representative Hitoshi Katayama of the person making the amendment Part 5, Column 6 for detailed explanation of the invention in the specification to be amended, Statement of contents of the amendment No. 8 Please amend the table on the page as shown below.

Claims (1)

[Claims] One phase of the AC control signal of the inverter that obtains three-phase AC power is divided into electrical angles of 60', and phase angles of 0° to 60' and 1
A storage device that further divides the energization pattern at a location corresponding to 20° to 180° by a predetermined electrical angle, stores each divided data in correspondence with each bit, and stores the data stored in the storage device. a first data selector that selects and outputs the energization pattern using a clock signal synchronized with the predetermined electrical angle; and a logic inversion element that forms an inverted signal of the energization pattern output from the first data selector. The energization pattern, the inverted signal of the energization pattern, and the conduction pattern and non-conduction pattern of the switching elements constituting the inverter are input, and a phase difference of 1200/3 is input.
an inverter control circuit O equipped with a second data selector that outputs a phase AC control signal;