[go: up one dir, main page]

JPS60192339A - Liquid phase epitaxial growing method - Google Patents

Liquid phase epitaxial growing method

Info

Publication number
JPS60192339A
JPS60192339A JP4881284A JP4881284A JPS60192339A JP S60192339 A JPS60192339 A JP S60192339A JP 4881284 A JP4881284 A JP 4881284A JP 4881284 A JP4881284 A JP 4881284A JP S60192339 A JPS60192339 A JP S60192339A
Authority
JP
Japan
Prior art keywords
crystal
liquid phase
phase epitaxial
cadmium
tellurium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4881284A
Other languages
Japanese (ja)
Inventor
Mitsuo Yoshikawa
吉河 満男
Michiharu Ito
伊藤 道春
Kenji Maruyama
研二 丸山
Tomoshi Ueda
知史 上田
Tetsuo Saito
哲男 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4881284A priority Critical patent/JPS60192339A/en
Publication of JPS60192339A publication Critical patent/JPS60192339A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02625Liquid deposition using melted materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02562Tellurides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02568Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)8発明の技術分野 本発明は化合物半導体結晶等の液相エピタキシャル成長
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) 8 Technical Field of the Invention The present invention relates to a method for liquid phase epitaxial growth of compound semiconductor crystals and the like.

(b)、技術の背景 化合物半導体結晶、例えば水銀・カドミウム・テルル結
晶のエピタキシャル層は、液相エピタキシャル成長法に
よりカドミウム・テルル結晶よりなる基板結晶上に成長
させる。該エピタキシャル層内に光電変換素子を形成し
ているが、この素子には、光起電力型、光導電型、MI
S型があるが、前2者は結晶内部、後者は結晶表面が主
としてその機能に関与する。後者の表面素子においては
、素子形成上の重要な因子としてエピタキシャル層表面
の平坦性が要求される。
(b) Background of the Technology An epitaxial layer of a compound semiconductor crystal, such as a mercury-cadmium-tellurium crystal, is grown on a substrate crystal made of a cadmium-tellurium crystal by a liquid phase epitaxial growth method. A photoelectric conversion element is formed within the epitaxial layer, and this element includes photovoltaic type, photoconductive type, MI
There is an S type, and the function of the former two is mainly involved in the inside of the crystal, while the latter is mainly involved in the crystal surface. In the latter surface device, flatness of the surface of the epitaxial layer is required as an important factor in device formation.

(C)、従来技術と問題点 化合物半導体結晶、例えば水銀・カドミウム・テルル結
晶のエピタキシャル成長において、基板結晶として面指
数(111)A面のカドミウム・テルル結晶を用いる。
(C), Prior Art and Problems In the epitaxial growth of a compound semiconductor crystal, such as a mercury-cadmium-tellurium crystal, a cadmium-tellurium crystal with a plane index of (111) A is used as a substrate crystal.

ここにA面とはジンク・ブレンド型結晶構造において、
この場合はカドミウム原子の表出面を指す。A面の裏側
はテルル原子の表出面でB面と呼ばれる。A面はB面よ
り平坦性がよいため、表面素子形成には一般にこの面を
用いる。
Here, the A-plane is in the zinc blend crystal structure.
In this case, it refers to the exposed surface of a cadmium atom. The back side of the A-plane is the exposed surface of the tellurium atoms and is called the B-plane. Since surface A has better flatness than surface B, this surface is generally used for surface element formation.

エピタキシャル成長に際し、基板結晶表面が(111)
面より僅かに傾いている場合は、エピタキシャル層表面
には凹凸が現れる。
During epitaxial growth, the substrate crystal surface is (111)
If the epitaxial layer is slightly tilted from the plane, unevenness will appear on the surface of the epitaxial layer.

第1図は上記ミスオリエンテーションにより、エピタキ
シャル層表面に現れた波状パターンを有する凹凸を示す
基板断面図である。図において1は基板結晶、2はエピ
タキシャル層、θはミスオリエンテーションで<111
>方向よりのズレの角度を示す。
FIG. 1 is a cross-sectional view of the substrate showing unevenness having a wavy pattern appearing on the surface of the epitaxial layer due to the misorientation. In the figure, 1 is the substrate crystal, 2 is the epitaxial layer, and θ is misorientation <111
> Indicates the angle of deviation from the direction.

基板結晶のミスオリエンテーションの制御限界は現状で
は0.1°程度であり、エピタキシャル層表面には0.
3μm程度の凹凸を生ずる。素子の高集積化、高密度化
に伴い、この程度の凹凸でもプロセス上の問題となり、
表面素子形成には、さらに凹凸を小さくする必要がある
The control limit for misorientation of the substrate crystal is currently about 0.1°, and the epitaxial layer surface has a misorientation of 0.1°.
This causes unevenness of about 3 μm. As devices become more highly integrated and dense, even this level of unevenness becomes a process problem.
For surface element formation, it is necessary to further reduce the unevenness.

(d)1発明の目的 本発明の目的は従来技術の有する上記の欠点を除去し、
表面加工をしなくても表面素子に使用できる程度に、波
状パターンの凹凸を小さくでき、かつ不純物導入により
結晶の導電度が増加しない液相エピタキシャル成長方法
を提供することにある。
(d)1 Objective of the invention The objective of the present invention is to eliminate the above-mentioned drawbacks of the prior art,
It is an object of the present invention to provide a liquid phase epitaxial growth method that can reduce the unevenness of a wavy pattern to the extent that it can be used for surface elements without surface processing, and that does not increase the conductivity of crystals due to the introduction of impurities.

(e)1発明の構成 上記の目的は本発明によれば、基板結晶に接触させるエ
ピタキシャル結晶成分元素を含むメルトに、結晶に含ま
れても電気的に不活性な不純物を導入する工程を具備し
た相エピタキシャル成長方法によって達成される。
(e) 1 Structure of the Invention According to the present invention, the above object includes a step of introducing an electrically inactive impurity even if contained in the crystal into a melt containing an epitaxial crystal component element that is brought into contact with a substrate crystal. This is achieved by a phase epitaxial growth method.

本発明は液相エピタキシャル成長において、電気的に中
性で素子特性に直接影響を与えない不純物を加えること
により結晶成長中の結晶核の数が増大し、波状パターン
が細かくなって表面の凹凸が小さくなることを利用して
、エピタキシャル結晶表面を平坦化するようにしたもの
である。
In the present invention, in liquid phase epitaxial growth, by adding impurities that are electrically neutral and do not directly affect device characteristics, the number of crystal nuclei during crystal growth increases, the wavy pattern becomes finer, and the surface unevenness becomes smaller. This phenomenon is utilized to flatten the epitaxial crystal surface.

(f)0発明の実施例 以下に実施例を水銀・カドミウム・テルル結晶の液相エ
ピタキシャル成長について説明する。
(f) 0 Examples of the Invention Examples will be described below regarding liquid phase epitaxial growth of mercury/cadmium/tellurium crystals.

液相エピタキシャル成長方法はティッピング法、ボート
・スライド法等があるが、何れにしても水銀の蒸気圧が
高いため石英閉管(アンブール)内で下記の順序で行う
Liquid phase epitaxial growth methods include the tipping method and the boat-slide method, but in either case, because the vapor pressure of mercury is high, it is carried out in the following order in a closed quartz tube (ambile).

i、水銀、カドミウム、テルル元素を含む不飽和のメル
トに、電気的に不活性な不純物として錫を加え、500
℃で60分保持する。
i, tin is added as an electrically inert impurity to an unsaturated melt containing mercury, cadmium, and tellurium elements, and 500
Hold at ℃ for 60 minutes.

ii 、溶質源結晶として、基板結晶と同じカドミウム
・テルル結晶を用い、これを前記の不飽和のメルトに接
触させ、500℃で60分保持する。
ii. The same cadmium tellurium crystal as the substrate crystal is used as the solute source crystal, brought into contact with the unsaturated melt, and held at 500° C. for 60 minutes.

この間に不飽和のメルトは平衡状態に達し、飽和のメル
トになる。
During this time, the unsaturated melt reaches an equilibrium state and becomes a saturated melt.

iii 、これからその上に成長させようとするカドミ
ウム・テルル基板結晶を前記の飽和のメルトに接触させ
、500℃で60分保持し、0.05℃/分の冷却速度
で400分冷却し20℃下げる。
iii. The cadmium-tellurium substrate crystal that is to be grown on it is brought into contact with the saturated melt, held at 500°C for 60 minutes, cooled at a cooling rate of 0.05°C/min for 400 minutes, and then cooled to 20°C. Lower it.

以上により、水銀・カドミウム・テルルの所期の組成を
有し、錫が10”cm−’導入されたエピタキシャル層
が得られる。メルトに加えられる錫の量はエピタキシャ
ル成長時の保持温度、保持時間、冷却速度、メルトの組
成にも多少関係するが、錫の偏析係数を略1としてエピ
タキシャル成長層への導入量が上記の値程度になるよう
調節する。
Through the above steps, an epitaxial layer having the desired composition of mercury, cadmium, and tellurium and with 10 cm of tin introduced is obtained.The amount of tin added to the melt depends on the holding temperature and holding time during epitaxial growth. Although it is somewhat related to the cooling rate and the composition of the melt, the segregation coefficient of tin is set to approximately 1, and the amount introduced into the epitaxially grown layer is adjusted to approximately the above value.

第2図(al、 (blに錫を導入しない場合と、導入
した場合の基板断面を示す。図において第1図と同一番
号は同一対象を示す。
FIG. 2 (al, (bl) shows the cross section of the substrate when tin is not introduced and when tin is introduced. In the figure, the same numbers as in FIG. 1 indicate the same objects.

波状パターンの凹凸りは、錫を導入しない場合は0.3
μm以上であるが、錫を導入した場合は0゜1μm以下
に減少する。
The unevenness of the wavy pattern is 0.3 when tin is not introduced.
It is more than μm, but when tin is introduced, it decreases to less than 0°1 μm.

水銀・カドミウム・テルル結晶をMIS型の赤外受光素
子に用いる場合、キャリア濃度を1015c+w−3以
下にしておく必要があり、上記の表面平坦化の目的で1
018C11−3程度導入する不純物は電気的に不活性
でなければならない。
When using a mercury-cadmium-tellurium crystal in an MIS type infrared receiving element, the carrier concentration must be kept below 1015c+w-3, and for the purpose of surface flattening mentioned above,
The impurities introduced in the order of 018C11-3 must be electrically inactive.

実施例では成長させる結晶として水銀・カドミウム・テ
ルル結晶を用いたが、他の結晶を用いてもよい。
In the example, a mercury/cadmium/tellurium crystal was used as the crystal to be grown, but other crystals may be used.

また実施例では導入する不純物として錫を用いたが、こ
れを他の電気的不活性な不純物を用いても発明の要旨は
変わらない。
Further, in the embodiment, tin was used as the impurity to be introduced, but the gist of the invention does not change even if other electrically inactive impurities are used.

(10発明の効果 以上詳細に説明したように本発明によれば、表面加工を
しなくても表面素子に使用できる程度に、波状パターン
の凹凸を小さくでき、かつ不純物導入により結晶の導電
導が増加しない液相エピタキシャル成長方法を得ること
ができる。
(10 Effects of the Invention As explained in detail above, according to the present invention, the unevenness of the wavy pattern can be made small enough to be used for surface elements without surface processing, and the conductivity of the crystal can be improved by introducing impurities. A non-scaling liquid phase epitaxial growth method can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はミスオリエンチーシロンにより、エピタキシャ
ル層表面に現れた波状パターンを有する凹凸を示す基板
断面、第2図(al、 (blは錫を導入しない場合と
、導入した場合の基板断面を示す。 図において1は基板結晶、2はエピタキシャル層、θは
ミスオリエンテーションで<111>方向よりのズレの
角度を示す。 寮2図
Figure 1 shows a cross section of the substrate showing unevenness with a wavy pattern that appeared on the surface of the epitaxial layer due to misorientation. In the figure, 1 is the substrate crystal, 2 is the epitaxial layer, and θ is the misorientation, which is the angle of deviation from the <111> direction.Dormitory 2 Diagram

Claims (1)

【特許請求の範囲】[Claims] 基板結晶に接触させるエピタキシャル結晶成分元素を含
むメルトに、結晶に含まれても電気的に不活性な不純物
を導入する工程を具備したことを特徴とする液相エピタ
キシャル成長方法。
A liquid phase epitaxial growth method comprising the step of introducing an electrically inactive impurity even if contained in the crystal into a melt containing epitaxial crystal component elements brought into contact with a substrate crystal.
JP4881284A 1984-03-14 1984-03-14 Liquid phase epitaxial growing method Pending JPS60192339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4881284A JPS60192339A (en) 1984-03-14 1984-03-14 Liquid phase epitaxial growing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4881284A JPS60192339A (en) 1984-03-14 1984-03-14 Liquid phase epitaxial growing method

Publications (1)

Publication Number Publication Date
JPS60192339A true JPS60192339A (en) 1985-09-30

Family

ID=12813615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4881284A Pending JPS60192339A (en) 1984-03-14 1984-03-14 Liquid phase epitaxial growing method

Country Status (1)

Country Link
JP (1) JPS60192339A (en)

Similar Documents

Publication Publication Date Title
US3093517A (en) Intermetallic semiconductor body formation
US3690965A (en) Semiconductor epitaxial growth from solution
US3208888A (en) Process of producing an electronic semiconductor device
US4026735A (en) Method for growing thin semiconducting epitaxial layers
USRE28140E (en) Bergh ctal
US3810794A (en) Preparation of gap-si heterojunction by liquid phase epitaxy
US3530011A (en) Process for epitaxially growing germanium on gallium arsenide
JPH0217519B2 (en)
JPS60192339A (en) Liquid phase epitaxial growing method
US4692194A (en) Method of performing solution growth of a GaAs compound semiconductor crystal layer under control of conductivity type thereof
US2835613A (en) Method of surface-treating semi-conductors
US3217378A (en) Method of producing an electronic semiconductor device
D'Asaro et al. Low defect silicon by liquid phase epitaxy
JP2701809B2 (en) Silicon single crystal substrate
JP3717220B2 (en) Liquid phase epitaxial growth method
US4270973A (en) Growth of thallium-doped silicon from a tin-thallium solution
JPS5922319A (en) Vapor growth of 3-5 group semiconductor
JPH03194922A (en) Device for crystal-growing ii-vi compound semiconductor
van Oirschot et al. LPE growth of DH laser structures with the double source method
JPS5888114A (en) Process for impurity diffusion
JP2830386B2 (en) Method for producing compound semiconductor crystal having insulating layer on surface
CA1271393A (en) Method of manufacturing a semi-insulating single crystal of gallium indium arsenide
JPS5821830A (en) Liquid phase epitaxial growth equipment
JPS63104324A (en) Method for growing semiconductor crystal
JPH07302740A (en) GaAs single crystal substrate for liquid phase epitaxial growth