JPS60176999A - Substrate crystal material of group iii-v compound semiconductor having half insulating property and its preparation - Google Patents

Abstract

PURPOSE:To obtain easily the titled material having high specific resistance value in the whole length of substrate crystal material, by adding simultaneously two or more compensating impurities when a remaining carrier is compensated and group III-V compound semiconductor having half insulating properties is grown. CONSTITUTION:In a method wherein a remaining carrier is compensated and group III-V compound semiconductor having half insulating properties is grown, a compensating impurity to form one deep carrier trap level and at least one of other compensating impurities other than this compensating impurity are simultaneously added. This method can be applied to preparation of half-insulating substrate crystal material of InP by liquid capsule pulling method, other substrate crystal material of half-insulating compound semiconductor such as GaAs, Gap, etc. In Bridgman method, etc. besides the liquid capsule pulling method, one compensating impurity to form a deep carrier trap level and at least one of other compensating impurities are selected, and added simultaneously.

Description

Detailed Description of the Invention Technical Field The present invention relates to semi-insulating compound semiconductor single crystal materials such as indium phosphide (InP), gallium arsenide (GaAJ and gallium phosphide (G, ZP)) and methods for manufacturing the same. It is something.

Conventional technology Indium phosphide (InP), gallium arsenide (GaAr
) and gallium phosphide (GaP) and other semiconductors of the ■-■ group with semi-insulating properties of 10@4 Ω or more are used as cloth pieces as substrate materials for integrated circuits. These are Cr,
This is achieved by creating a deep carrier trap level by doping with Fa, Co, etc. and compensating for residual carriers. That is, this has been achieved by doping with compensating impurities that have a concentration higher than the residual carrier concentration that exists in a state where these compensating impurities are not doped. However, F.

Impurities such as Cr and Co should have low solid solution concentrations in the mother crystal (for example, 10" to 10"/'Cm'l for InP).
, it is difficult to make the residual carrier concentration in the crystal before doping sufficiently low (for example, in InP, 5 x 10'5/cm
``From the above).

The doping concentration range for compensation is narrow.

There were problems in terms of impurity concentration control during production, yield of usable crystals, etc.

Purpose of the Invention The present invention was made to solve these conventional problems, and is a semi-insulating ■-■ group compound that solves the problems of impurity concentration control for manufacturing and yield of usable crystals. The purpose of this invention is to provide a semiconductor substrate crystal material and a method for manufacturing the same.

Structure and Function of the Invention The present invention has been made based on the discovery that the above object can be achieved by simultaneously adding two or more types of compensating impurities, which is different from the conventional addition of one type of compensating impurity. Below, the structure and operation of the two beams will be explained in detail, taking the case of InP as an example.

There are roughly two methods for selecting compensating impurities in the present invention. One is the method of selecting two or more types of impurities as compensation impurities from among impurities that create deep traps such as Fa, Cr, Co, etc., and the other is impurities that create shallow levels and impurities that create deep traps. In this method, two or more types of impurities are selected as compensating impurities so as to simultaneously contain the following. As an example of the latter case.

A combination in which F- is added at the same time is included.

That is, the former sets the upper limit of the deep trap density for compensation to 2
This is a method of increasing the amount of impurities by adding more than one type of impurity. In the latter method, the concentration of residual carriers is reduced by a shallow impurity level.

This method compensates for these residual carriers by impurities that create deep traps.

As an example of the former, FIG. 1 shows an example of the effect when Fg and Cr are added to InP at the same time. 100% raw material with the same purity
Liquid capsule pulling method (covering the surface of the melt with a liquid containing a glass component to prevent evaporation and pulling it up. J, B
Journal af Cryst
alGrowth vol, 6, 41968.281
9) Curve A shows the distribution of resistivity values of the grown crystals in the direction of the pulling axis.
When t is added.

Curve B is Fe D, 01wt% and cr'f: 0.1'5
This is the case when wt% is added at the same time. The horizontal axis of the figure is indicated by 1-g. Here, g indicates the assimilation rate. In curve A, when g is 0.4 or less, it cannot be fully compensated for and shows a low specific resistance value.

'On the other hand, at 1% B, the top of the crystal (g=0) almost uniformly exhibits good semi-insulating properties of 107 Ωcm or more.

FIG. 2 shows an example in which Zn and F# are added at the same time. Curve A' shows the same data as curve A in FIG.

Curve B' shows Fg at D-01wt% and Zn at 4X10-5.
When wt% was added at the same time, a substantially uniform high specific resistance value of 107 Ωcm or more was exhibited from the top of the crystal (g=0) in this case as well.

For convenience of explanation, the present invention has been described using a semi-insulating substrate crystal material of InP using the liquid capsule pulling method, but the present invention is also applicable to the production of other semi-insulating compound semiconductor substrate crystal materials such as GaAs and GaP. In addition, the method for producing m-v group compound semiconductor crystals is of course not limited to the liquid capsule pulling method described above, but also various other known methods such as the Bridgman method. In the manufacturing process of the group compound semiconductor substrate crystal material, a compensating impurity forming a 1 m deep carrier trap level and at least one other compensating impurity other than the compensating impurity are selected by one of the above selection methods. However, these may be added at the same time.

More than the effects of the invention, as explained in the specific example, in the present invention, by adding two or more types of compensating impurities at the same time, it is relatively easy to achieve a higher specific resistance value than in the past over the entire length of the substrate crystal material. It is extremely useful as a semi-insulating compound semiconductor substrate crystal material and its manufacturing method.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing specific resistance value distributions along the pulling axis of InP single crystals of conventional and one embodiment of the present invention. FIG. 2 is a diagram showing specific resistance value distributions along the pulling axis of InP single crystals of conventional and other embodiments of the present invention. A, A' ・= curve (I's O, 01 wtf= addition) E ... curve (-Fg O, 01 wt%, Cr
O, 13wt5A simultaneous addition) Bl ・,, curve (Pg
O, 01 wt%, Zn 4x 1CJ-'wt% simultaneous addition). Patent applicant Nippon Telegraph and Telephone Public Corporation agent Patent attorney Gobe Tamamushi (2 others) Figure 1 ? figure

Claims (1)

[Claims] (]> A compensation impurity forming one type of deep one-carrier trap level and at least one other compensation impurity other than the compensation impurity are doped together. (2) In a method of growing a semi-insulating m-v group compound semiconductor crystal by compensating for residual carriers, a type of deep carrier trap level is formed. 1. A method for producing a semi-insulating ■-■ group compound semiconductor substrate crystal material, which comprises simultaneously adding a compensating impurity and at least one other compensating impurity other than the compensating impurity.