JPS60175100A - Voice synthesizer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a speech synthesis device that synthesizes speech based on speech parameters indicating characteristics of speech.

(Example) Conventional technology The linear predictive coding method represented by the Percoll method is currently mainstream as a speech synthesizer. As shown in "Comparing Various Methods of Speech Synthesis", the Percoll coefficients, amplifier parameters, and pitch parameters extracted from the speech signal are stored in the parameter memory in frame period units of approximately 10 m5ec, and these are This is updated and introduced into the synthesis circuit in frame period units to resynthesize the audio signal. However, this frame period is set to 1Qmsec, which allows the voice to be considered to be in a steady state, but in order to faithfully reproduce the natural changing state of voice, the voice synthesis circuit divides this into 1 and uses the fc2.5m formula. An interpolation process is performed to interpolate the time series of the parameters to this unit time interval, with the unit time being the unit time, and the voice is resynthesized based on the interpolation parameters obtained by the process.

However, even in the conventional speech synthesizer as described above, there is a desire to reduce the cost of parameter memory by reducing the number of audio parameters as audio data to time-series data without deteriorating the audio quality. In other words, it is desired to improve the quality of synthesized speech without increasing the amount of speech data.

(c) Object of the Invention The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a speech synthesis device that can compress speech data and improve the quality of synthesized speech.

B) Structure of the Invention The speech synthesis device of the present invention includes, in the parameter memory, a time series of speech parameters whose update time is an integral multiple of a specific unit time, and an update time code indicating the update time for each of the speech parameters. The speech synthesis circuit updates the time series of speech parameters obtained from the parameter memory at every update time indicated by the update time code corresponding to each speech parameter, and Interpolation is performed at specific unit time intervals.

(E) The configuration of the speech synthesizer of the present invention is shown in the embodiment diagram. In the same figure, (1) is a parameter ROM, in addition to a parameter group of approximately 50 bits consisting of a Percoll coefficient indicating the characteristics of the voice, 1 to N10, a pitch parameter P, and an amplifier parameter A. Each frame is stored in chronological order, with an update time code n of approximately 6 bits serving as one frame of audio data. However, each parameter of one frame at this time does not correspond to a specific time of the audio signal, but corresponds to the basic unit time of, for example, 2.5 m sec, multiplied by an integer, and this integer value is updated. It is expressed as a time code n. Note that the code n in this case indicates 0, 1.2. (2) C) A readout control circuit that controls the reading of audio data for each frame from the parameter ROM (1); The buffer memory temporarily stores audio data for frames (3), and the time until the readout control circuit (2) reads the next frame, that is, the update time, is determined according to the update time code n of this memory (3). For example, n=Q
When T = = 2.5m5ec, when n ''' 1 T = 5
msec, when n=2, T=1Qm passing. (4) is a transformation IL (li That is, the parameter ltOM(1)
1 to xto, r for each parameter.

The true values of each A are subjected to non-linear compression processing in order to reduce data efficiency. (51) and (52) are a 7-compensation circuit and a 7-interpolation circuit, respectively, which interpolate the parameter values from the conversion ROM (4) based on the previous sample. It is coupled to a multiplexer (6) for selectively outputting the output of the converter (4) and the direct output from the converter (4). That is, the multiplexer (6) selects and outputs the non-interpolated parameter value f: 2.5m once every n=degrees when n=Q, for example, according to the update time code n of the buffer 1 memory (3). Two layers are selectively output during 5 m5 ec, and when n = 2, the T-interpolated parameter value is calculated once every 2.5 m5 ec in total i[1
Selective output is performed four times during m5oc. (7) is a digital filter that synthesizes the audio signal based on each parameter value always obtained from the multiplexer (6) every 2.5 m5ec, and (8) a digital filter that synthesizes the audio signal from the digital filter (7) into an analog It is an A conversion circuit that converts the signal into a signal to drive the speaker (9).

In such a speech synthesizer, its parameter ROM
+1+ 1Koke, the parameter group obtained by Parcoll analysis of the audio signal will be stored, but in places where the time change of the parameter group during this analysis is non-linear, the frame time of this parameter group will be shortened, and vice versa. Where the time change of a parameter group is linear, processing is performed to lengthen the frame time of this parameter group.

That is, in the Percoll analysis, a group of parameters are calculated for each unit time of 2.5 m5ec.Here, each parameter is 1 to +o,
Assuming that a sample sequence of X(t) is obtained sequentially representing F and A, 1
Perform interpolation and obtain interpolated values X(t+1), X(t+2),
X(t+1), and the errors δ(t+1), δ(t+2), δ(t+3) between each of these interpolated values and each of the actual analysis values X(t+1), X(t+2), LX(t+3) )
When both are within a specific error tolerance range, it is determined that the sample sequence in this time interval is changing linearly, interpolation is adopted, and n=2 is assigned as the update time code. Also, the above errors δ(t+1), δ(t+2), δ(t+3
) is outside the error tolerance range, it is determined that the sample sequence in this time interval is changing nonlinearly,
i-interpolation is not adopted. Therefore, in this case, then X(t
) and x(t-4-2), obtain the interpolated value x(t-1-1), and combine this value with the actual analysis value X(t-4-2).
+1) when the error δ'(t+1) is within a certain error tolerance range, hundred interpolation is adopted and n=1 is assigned as the update time code. Conversely, the above error δ′(t+
1) is outside the error tolerance, neither the hundred interpolation is employed, ie n=0 is assigned without any interpolation.

In this way, the update time n of this parameter group is set according to the change state of sample X (t) of each parameter in the parameter group, so in the speech synthesizer shown in the figure, Corresponding interpolation processing can be performed. Note that interpolation may be added to the above description, and it is clear that in this case, it becomes possible to further compress the audio data.

(f) Effects of the Invention As is clear from the above description, the speech synthesis device of the present invention allows the update time of parameters to be varied depending on the state of the rate of change of the audio signal, and the number of interpolations to be varied accordingly. Since it can be set to , it is possible to perform extensive data compression of audio data while preventing deterioration in the quality of synthesized speech. Conversely, if the amount of data is the same as that of conventional devices, the quality of synthesized speech can be improved.

[Brief explanation of the drawing]

The figure is a block diagram showing the configuration of the speech synthesis device of the present invention, (1) is a parameter ROM, (2+ is a readout control circuit, (51152) is an interpolation circuit, (7) is a digital filter, and (9) is a Each speaker is shown. Applicant Sanyo Electric Co., Ltd. Representative Patent Attorney Shizuo Sano

Claims (1)

[Claims] 1) Consists of a parameter memory that stores audio parameters extracted from audio signals in time series, and a speech synthesis circuit that synthesizes speech based on the time series of audio parameters that are sequentially removed from the parameter memory. A time series of audio parameters whose update time is an integer multiple of a specific unit time and an update time code indicating the update time for each audio parameter are stored in correspondence with each other, and the speech synthesis circuit A speech synthesis device characterized by updating a time series of speech parameters obtained from a parameter memory at each time indicated by an update time code corresponding to each speech parameter, and interpolating each speech parameter at a specific unit time interval. .