JPS60163487A - Semiconductor laser - Google Patents
Semiconductor laserInfo
- Publication number
- JPS60163487A JPS60163487A JP1772584A JP1772584A JPS60163487A JP S60163487 A JPS60163487 A JP S60163487A JP 1772584 A JP1772584 A JP 1772584A JP 1772584 A JP1772584 A JP 1772584A JP S60163487 A JPS60163487 A JP S60163487A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor
- semiconductor layer
- substrate
- active layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/223—Buried stripe structure
- H01S5/2232—Buried stripe structure with inner confining structure between the active layer and the lower electrode
- H01S5/2234—Buried stripe structure with inner confining structure between the active layer and the lower electrode having a structured substrate surface
- H01S5/2235—Buried stripe structure with inner confining structure between the active layer and the lower electrode having a structured substrate surface with a protrusion
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
(技術分野)
本発明は低しきい値で安定な単−横モード発振する半導
体レーザに関するものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a semiconductor laser that oscillates in a stable single-transverse mode with a low threshold value.
(従来技術)
一般に、半導体レーザにとって低しきい値で安定な単−
横モード発振することは、光通信や光情報処理用光源と
して重要である。従来、半導体ソー4’t−1作する場
合、液相エピタキシャル成長(以後LPE成長と贋う)
による半導体レーザの結晶成長が主流であったが、有機
金4分解法(以後MOCVD法という)による結晶成長
が均−性及び量産性の面から注目されている。(Prior art) In general, semiconductor lasers have a stable monolayer with a low threshold value.
Transverse mode oscillation is important as a light source for optical communications and optical information processing. Conventionally, when producing semiconductor saw 4't-1, liquid phase epitaxial growth (hereinafter referred to as LPE growth) was used.
Although crystal growth of semiconductor lasers by the method has been mainstream, crystal growth by the organic gold tetradecomposition method (hereinafter referred to as MOCVD method) is attracting attention from the viewpoint of uniformity and mass production.
第1図(alはV溝をもつ友基板上にLPE成長により
作製した半導体レーザの活性層の積!−状態上水す断面
図である。まず、半導体基板l上にこの基板lと導電性
が異り活性If4より禁制帯幅が小さい゛シ流ブロック
層2乞形成し、この反流ブロック層2から半導体基板l
に達するV溝を設ける。このV溝のある基板l上にある
条件下でLPE成長によシ第1のクラッド層3と活性r
−42順次積層すると、第lのり2ラド層3はV溝上平
坦に埋め。Figure 1 (al is a cross-sectional view of the active layer of a semiconductor laser fabricated by LPE growth on a V-groove substrate). The difference is that the forbidden band width is smaller than that of the active If4.
Provide a V-groove that reaches . The first cladding layer 3 and the active r
-42 When laminated one after another, the l-th glue 2nd layer 3 is buried flatly on the V-groove.
この第1のり2ラド層3上に平坦な活性層4が結晶成長
される。A flat active layer 4 is crystal-grown on this first glue layer 3.
このV溝上の活性層4は、層流ブロック層2あるいは半
導体基板lに対して第1のクラッド層3を介してV溝以
外の平坦部上に形成された活性層4と比較して離れてい
るため、光の導波機構全形成し1安定な単−横モード発
振する優れた半導体レーザが得られる。しかし、ある混
晶系1例えばG a A s基板上にA召GaInP混
晶系は、LPE成長が非常に雌かしく、MOCvD法な
どの非平衡成長法によらなければ製作できない。The active layer 4 on this V-groove is separated from the laminar flow block layer 2 or the active layer 4 formed on the flat part other than the V-groove via the first cladding layer 3 with respect to the semiconductor substrate l. Therefore, an excellent semiconductor laser with a complete optical waveguide mechanism and stable single-transverse mode oscillation can be obtained. However, a certain mixed crystal system 1, for example, a GaInP mixed crystal system on a GaAs substrate, is very difficult to grow by LPE and cannot be manufactured without using a non-equilibrium growth method such as MOCvD method.
−1、この半導体レーザ(i−MOCVD法により製作
する場合、このMOCVD法は均一性、遺産性という利
点を有するが、第1図(b)に示すように、■溝上には
、■溝形状をそのままに残した第1のクラッド層3およ
び活性層4が成長し、第1図+a)に示すような活性層
形状金得ることが出来ない欠点がある。-1. When manufacturing this semiconductor laser by the i-MOCVD method, this MOCVD method has the advantage of uniformity and heritage, but as shown in Figure 1 (b), The first cladding layer 3 and the active layer 4 are left as they are, and there is a drawback that it is not possible to obtain the active layer shape as shown in FIG. 1+a).
(発明の目的ン
本発明の目的は、このような欠点を除き、7字形の導波
機構および1流ブロック層をもった講義1M0cVD法
で容易に作製できるようにした半導体レーザを提供する
事にある。(Object of the Invention) An object of the present invention is to eliminate such drawbacks and to provide a semiconductor laser having a figure-7 waveguide mechanism and a first-flow blocking layer, which can be easily manufactured by the Lecture 1M0 cVD method. be.
(@明の構成)
本発明の構成は、@lおよび$2のクラッド層によシ活
性層金挾んだダブルへテロ講義の半導体層を有する半導
体レーザにおいて、半導本基板上に前記活性層より禁制
帯幅が大きい第1の半導体層を含んで設けられたメサと
、このメサの上面以外と前記基板上面とを被覆し前記活
性層より禁!tttl帝幅が小さくかつ前記半導体基板
と導電性の異なる第2の半導体層とを備え、この第2の
半導体j−上部に設けられた前記ダブルへテロ構造の半
導体層を設けたことを特徴とする。(@Akira's configuration) The configuration of the present invention is that in a semiconductor laser having a double hetero semiconductor layer with an active layer sandwiched between cladding layers @1 and $2, the active layer is placed on a semiconductor substrate. A mesa provided including a first semiconductor layer whose forbidden band width is larger than that of the active layer and which covers the upper surface of the substrate other than the upper surface of this mesa and which is prohibited from the active layer. A second semiconductor layer having a small tttl width and having a conductivity different from that of the semiconductor substrate, and the double heterostructure semiconductor layer provided above the second semiconductor layer. do.
本発明の構成によれば、側面に活性層より禁制帯幅が小
さく半導体基板と導電性の異なる第2の半導体層を有す
るメサ上部の活性層が導波機構を有し、かつ第2の半導
体層が半導体基板と導電性が異なることによりt流は活
性層の発光項域に有効に注入されて発振し、またLPE
成長の特異性音用いずに作製できる几めMOCVD法と
ホトリソ第21&は本発明の実施例の断面図である。こ
の実施例は、半導体基板l上に活性1−4より禁制帯幅
が大きい第1の半導体ノー11を含むメサ20を設けて
いる。このメサ20の両側面には活性層4よ#)禁制帯
幅が小さく前記半導体基板lと導電性の異なる第2の半
導体層12が設けられている。According to the configuration of the present invention, the active layer on the upper part of the mesa, which has a second semiconductor layer on the side surface which has a smaller bandgap than the active layer and has a different conductivity from the semiconductor substrate, has a waveguide mechanism, and the second semiconductor layer has a waveguide mechanism. Because the conductivity of the layer is different from that of the semiconductor substrate, the t-current is effectively injected into the light-emitting region of the active layer and oscillates, and the LPE
Illustrative characteristics of growth Figure 21 is a cross-sectional view of an embodiment of the present invention using a refined MOCVD method and photolithography that can be fabricated without using sound. In this embodiment, a mesa 20 including a first semiconductor node 11 having a larger forbidden band width than the active layer 1-4 is provided on a semiconductor substrate l. On both sides of this mesa 20, an active layer 4 and a second semiconductor layer 12 having a small forbidden band width and different conductivity from the semiconductor substrate 1 are provided.
このメサ20と第2の半導体層12の上部には、第1の
クラッド層3.活性層4.第2のクラッド層5からなる
ダブルへテロ構造を設けている。このメサ20上部の平
旦な活性層4の中央部は%第1のクラッド層31に:介
して第1の半導体層11に接し、その両端は、第1のク
ラッド層3を介して光を吸収し活性層4より禁制帯幅の
小さい第2の半導体層12と妾している。このためメサ
上部の活性層4は光の導波機構を有すると共に、第2の
半導体層12により′底流がメサ20上部の活性層4の
中央部に有効に注入される。従って、この構造の半導体
レーザは、低しきい値で安定な単−横モードで発振する
。Above the mesa 20 and the second semiconductor layer 12, a first cladding layer 3. Active layer 4. A double heterostructure consisting of a second cladding layer 5 is provided. The central part of the flat active layer 4 above this mesa 20 is in contact with the first semiconductor layer 11 through the first cladding layer 31, and both ends thereof absorb light through the first cladding layer 3. The second semiconductor layer 12 has a smaller forbidden band width than the active layer 4. Therefore, the active layer 4 above the mesa 20 has an optical waveguide mechanism, and the second semiconductor layer 12 effectively injects an undercurrent into the center of the active layer 4 above the mesa 20. Therefore, a semiconductor laser having this structure oscillates in a stable single-transverse mode with a low threshold value.
第3図1a)〜te)は第2図の実施例全具体例によっ
て製作工程順に示した断面図である。まず、第3図ta
)に示すように、p型G a A s基板l上に第1の
半導体層11となるp型AJ30.3 G a O,7
A S 半導体層1M0cVD法によ91μm成長し、
その表面にホトリソグラフィと化学エツチングによりS
iOzの幅3μmのストライブ30を形成する。次に
、MOCVD炉IC挿入L、HCl3 とAsH3’t
aL加熱してエツチングを行い(第3図tb) ) 、
その後、成長ソースとなる有機金4とA s Haとド
ーパントガスを送りn型のGaAs1Q。7μm成長し
、第2の半導体層12’t−形成する(第3図(C))
。その後化学エツチングにより5iOzストライプ30
’t−除去しく第3図1、d))、適当な前処理をした
後に再度MOCVD法により第1のクラッド層3となる
p型のA4o、aGa o、yAs7脅0.3 μm
、活性層4となるノンドープのG a A s層0.1
μm+i2のクラッド層5となるn型のA4o、aGa
O,7A81−k 1.5 μm 、漬層する(第3
図(e))。さらに実際には第2クラノド層5の上にn
型のG a A s層全成長する。このように作製され
几ウェファは、通常のデバイス形成のプロセスにより半
導体レーザを形成する。FIGS. 3A to 3E are cross-sectional views showing all the embodiments of FIG. 2 in the order of manufacturing steps. First, Figure 3 ta
), a p-type AJ30.3 GaO,7 which becomes the first semiconductor layer 11 is formed on a p-type GaAs substrate l.
A S semiconductor layer 91μm grown by 1M0cVD method,
The surface is coated with S by photolithography and chemical etching.
A stripe 30 of iOz and a width of 3 μm is formed. Next, insert MOCVD furnace IC L, HCl3 and AsH3't
aL heating and etching (Fig. 3 tb)),
After that, organic gold 4, A s Ha, and dopant gas, which will serve as a growth source, are sent to form n-type GaAs 1Q. 7 μm is grown to form a second semiconductor layer 12′t- (FIG. 3(C))
. Then chemically etched 5iOz stripes 30
1, d)), and after appropriate pretreatment, the p-type A4o, aGao, yAs7 layer 3, which will become the first cladding layer 3, is deposited with a thickness of 0.3 μm by MOCVD again.
, a non-doped GaAs layer 0.1 serving as the active layer 4
n-type A4o, aGa that becomes the cladding layer 5 of μm+i2
O,7A81-k 1.5 μm, dipping layer (third
Figure (e)). Furthermore, in reality, n
A full G a As layer of the type is grown. The wafer thus produced is used to form a semiconductor laser through a normal device forming process.
(発明の効果)
この半導体レーザの活性層4はG a A s層で、第
2の半導体1512もGaAs層であるから、メサ20
上部の活性層4には導波機構が形成されるので、”ゲ足
な単−横モード発振が可能となる。(Effect of the invention) Since the active layer 4 of this semiconductor laser is a GaAs layer and the second semiconductor 1512 is also a GaAs layer, the mesa 20
Since a waveguide mechanism is formed in the upper active layer 4, "straight single-transverse mode oscillation" is possible.
まfc1本実施例の半導体レーザの作製にあたり、第3
1凶tb)の状態から5iOzストライプ30を除去し
、メサ20に一様に第2の半導体層12となるGaAs
J−QMOCVD法によりfJ層し、化学エツチングの
メサ上部とメサ下部でのエツチングレートの違いにより
、GaAs1エツチングして第3図(dlに示す構造を
作製する方法もある。さらに、活性層4になる半導体層
より半導体基板1の禁制帯幅が大きいときは、第1の半
導体層11を積層せず、半導体基板1で代用することも
できる。fc1 In manufacturing the semiconductor laser of this example, the third
The 5iOz stripe 30 is removed from the state of 1 tb), and a GaAs layer that will become the second semiconductor layer 12 is uniformly deposited on the mesa 20.
Another method is to form the fJ layer using the J-QMOCVD method and, depending on the difference in etching rate between the upper and lower parts of the mesa in chemical etching, to perform GaAs1 etching to produce the structure shown in FIG. 3 (dl). When the forbidden band width of the semiconductor substrate 1 is larger than that of the semiconductor layer, the first semiconductor layer 11 may not be laminated and the semiconductor substrate 1 may be used instead.
第1図tag、 tb>は溝基板へのLPEおよびMO
CVDにより遺1醤を行う状態を示す断面図、第2図は
本発明の実施例の断面模式図、第3図(a)〜(elは
第2図を製作工程順上水した断面図である。図において
l・・・・・・半導体基板、2・・・・・・t(Mブロ
ックノー、3・・・・・・第1のクラッド層、4・・・
・・・活性〕4.5・・・・・・第2のクラッド層、1
1・・・・・・渠lの半導体層、12・・・・・・第2
の半導体層、20・・・・・・メサ、30・・・・・・
5in2ストライプ
である。
第1割
黛3個Figure 1 tag, tb> shows LPE and MO on the groove substrate.
2 is a cross-sectional view showing a state in which 1st dipping is performed by CVD, FIG. 2 is a schematic cross-sectional view of an embodiment of the present invention, and FIGS. 3(a) to (el are cross-sectional views of FIG. In the figure, l...semiconductor substrate, 2...t (M block no, 3... first cladding layer, 4...
...Activity]4.5...Second cladding layer, 1
1... Semiconductor layer of conduit l, 12... Second
semiconductor layer, 20... mesa, 30...
It is 5 in 2 stripes. 3 pieces of 1st Warabiyuzumi
Claims (1)
ルへテロ構造の半導体層を有する半導体レーザにおいて
、半導体基板上に前記活性層より禁制帯幅が大きい第1
の半導体層を含んで設けられ友メサと、このメサの上面
以外の側面と前記基板上面と金被覆し前記活性層より禁
制帯幅が小さくかつ前記半導体基板と導1性の異なる第
2の半導体層とを備え、この第2の半導体層の上部に前
記ダブルへテロ構造の半導体層を設けたことを特徴とす
る半導体レーザ。In a semiconductor laser having a double heterostructure semiconductor layer in which an active layer is sandwiched between first and second cladding layers, a first cladding layer having a larger forbidden band width than the active layer is disposed on a semiconductor substrate.
a second semiconductor, which is coated with gold on a side surface other than the upper surface of the mesa and the upper surface of the substrate, has a band gap smaller than that of the active layer, and has a conductivity different from that of the semiconductor substrate; 1. A semiconductor laser comprising: a double heterostructure semiconductor layer, the double heterostructure semiconductor layer being provided on top of the second semiconductor layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1772584A JPS60163487A (en) | 1984-02-03 | 1984-02-03 | Semiconductor laser |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1772584A JPS60163487A (en) | 1984-02-03 | 1984-02-03 | Semiconductor laser |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60163487A true JPS60163487A (en) | 1985-08-26 |
JPH0552676B2 JPH0552676B2 (en) | 1993-08-06 |
Family
ID=11951718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1772584A Granted JPS60163487A (en) | 1984-02-03 | 1984-02-03 | Semiconductor laser |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60163487A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62282845A (en) * | 1986-05-28 | 1987-12-08 | Fanuc Ltd | Tracer controller |
US6358316B1 (en) | 1992-09-10 | 2002-03-19 | Mitsubishi Denki Kabushiki Kaisha | Method for producing semiconductor device, method for producing semiconductor laser device, and method for producing quantum wire structure |
US10554207B1 (en) | 2018-07-31 | 2020-02-04 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
US10615783B2 (en) | 2018-07-31 | 2020-04-07 | Northrop Grumman Systems Corporation | RQL D flip-flops |
US10650319B2 (en) | 2015-02-06 | 2020-05-12 | Northrop Grumman Systems Corporation | Flux control of qubit under resonant excitation |
US10756712B2 (en) | 2017-11-13 | 2020-08-25 | Northrop Grumman Systems Corporation | RQL phase-mode flip-flop |
US11201608B2 (en) | 2020-04-24 | 2021-12-14 | Northrop Grumman Systems Corporation | Superconducting latch system |
-
1984
- 1984-02-03 JP JP1772584A patent/JPS60163487A/en active Granted
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62282845A (en) * | 1986-05-28 | 1987-12-08 | Fanuc Ltd | Tracer controller |
US6358316B1 (en) | 1992-09-10 | 2002-03-19 | Mitsubishi Denki Kabushiki Kaisha | Method for producing semiconductor device, method for producing semiconductor laser device, and method for producing quantum wire structure |
US10650319B2 (en) | 2015-02-06 | 2020-05-12 | Northrop Grumman Systems Corporation | Flux control of qubit under resonant excitation |
US11010686B2 (en) | 2015-02-06 | 2021-05-18 | Northrop Grumman Systems Corporation | Flux control of qubit under resonant excitation |
US10756712B2 (en) | 2017-11-13 | 2020-08-25 | Northrop Grumman Systems Corporation | RQL phase-mode flip-flop |
US10554207B1 (en) | 2018-07-31 | 2020-02-04 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
US10615783B2 (en) | 2018-07-31 | 2020-04-07 | Northrop Grumman Systems Corporation | RQL D flip-flops |
US10868540B2 (en) | 2018-07-31 | 2020-12-15 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
US11159168B2 (en) | 2018-07-31 | 2021-10-26 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
US11201608B2 (en) | 2020-04-24 | 2021-12-14 | Northrop Grumman Systems Corporation | Superconducting latch system |
Also Published As
Publication number | Publication date |
---|---|
JPH0552676B2 (en) | 1993-08-06 |
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