JPS60163134A - Virtual computer system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention provides a means for determining whether or not an instruction that controls a control register can be directly executed, so that the instruction that controls the control register can be executed at high speed. This article relates to a virtual computer system that has been made possible.

[Background of the invention]

A virtual computer system is a computer system that controls the resources of one real computer (processing unit, real storage device, channels, input/output devices) as if there were multiple computers.
It is a computer system. Each of these multiple dividers is a virtual iF
It is called a computer (VM) and is simulated by a virtual computer control program (VMCP) so that it is functionally equivalent to a real computer. An operating system (OS) can be executed on each VM, and multiple O8s can be executed simultaneously on one real computer. The relationship between VMCP and VM is similar to the relationship between control programs and processing programs in general O8. A VMCP corresponds to a control program, and a VM corresponds to a processing program. VMC:P executes in privileged mode to physically control the hardware of the real computer, and causes the VM generated by VMCP to execute in non-privileged mode.

Since the VM operates in unprivileged mode, privileged instructions on the VM are reported to the VMGP as privileged instruction exceptions, and the VMCP
is executed by performing a simulation. 1st
The figure shows a conceptual diagram of VM privileged instruction simulation.

Next, an overview of the simulation process for a privileged instruction that controls a control register among the privileged instruction simulations described above will be explained. Generally, control registers are provided with interrupt masks that control asynchronous interrupts and control information for machine checks, and when an instruction that changes the contents of the control register that has these information is issued, each VM Processing is performed to reflect the value in the control block. If the VMCP processes an instruction that changes the contents of all control registers, the performance will deteriorate considerably compared to when the instruction is executed on an O8 under a real computer. To prevent this, you can either have the VM occupy the control registers of the actual computer, or
By providing a dedicated control register,
A possible method is to directly execute the privileged instruction on the VM (without the intervention of the VMCP) and achieve almost the same performance as that of a real computer. A problem with this direct execution method is when changing control registers containing control information for interrupt masks and machine checks, in which case direct execution is not possible and processing must be performed by VMCP. The following methods can be considered to achieve this. (Figure 2) Before directly executing the privileged instruction, the microprogram
A process is performed to determine whether the instruction is an instruction to change a control register having control information for an interrupt mask or a machine check, and when the conditions are met, control is entrusted to the VMCP, which directly executes the instruction. According to this method, in the case of direct execution, the intervention of VMC,P is not required, but it is always necessary to determine whether direct execution is possible, and even if this is done in a microprogram, it still causes overhead for the actual computer. Direct execution becomes less effective.

[Purpose of the invention]

An object of the present invention is to provide hardware support to eliminate the need for the above-described determination processing by a microprogram, in order to reduce overhead when simulating privileged instructions that control control registers.

[Summary of the invention]

An outline of the operation of the present invention will be explained below.

When a privileged instruction to control a control register is issued from a VM, the register number given by the instruction is compared with the register number of a register that cannot be directly executed. As a result of the comparison, when the two match, that is, when direct execution is not possible, an interrupt is made to VMCP, and when they do not match, direct execution is performed. An interrupt to the VMCP is performed by breaking into the interrupt processing microprogram and selecting an interrupt information storage area (ie, prefix) for interrupting the VMCP by hardware or the microprogram.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

This embodiment includes an instruction register 1, a microphone register 2, a mode register 3, AND circuits 4 and 6, an OR circuit 5, and a NOT
It consists of a circuit 7.

In instruction register 1, a register number designated by an operand of an instruction to control a control register is set in each corresponding bit.

For example, when register numbers 1 to 5 are specified by an instruction, bits 1 to 5 of instruction register 1 are set to "1". In the mask register 2, register numbers of registers in which instructions for controlling the control register cannot be directly executed are set in corresponding bits. For example, registers that cannot be directly executed are 0.
．． In the case of 2.6°14.15, "i" is set in each bit of mask register 2 as shown in the figure. #III is set in the mode register 3 when the VM is in the execution mode.

The operation of this embodiment is as follows.

The register number set in the instruction register 1 and the register number set in the mask register 2 are ANDed for each bit by an AND circuit 4. From the AND circuit 4, the same pins of the instruction register 1 and the microphone register 2 are sent.
are both ``1''.

"1" is output. In the OR circuit 5, each bit's A
The outputs of the ND circuit 4 are ORed. From the OR circuit 5, when any of the outputs of the AND circuit 4 is rr 1 u,
11 +, II is output. A control register change request is issued, the output of OR circuit 5 is 1'',
When the contents of mode register 3 are II L H, AND
The circuit 6 outputs II I II. AND circuit 6
When the output is #l 111, a break-in is made to the interrupt processing microprogram. At this time, the interrupt information storage area (ie, prefix) is determined by hardware or a microprogram.

In this case, select a prefix to interrupt VMCP and interrupt VMCP.

When the contents of mode register 3 are rr C) rr is N
“1” is output from the OT circuit 7. When the output of the NOT circuit 7 is "1", an instruction for controlling the control register is executed by the execution circuit in the real computer mode.

According to this embodiment, it is possible to determine by hardware whether the privileged instruction can be directly executed, and it is possible to omit processing of the microprogram before direct execution.

This increases the effectiveness of direct execution of the privileged instruction. Additionally, control registers that cannot be directly executed can be set simply by changing the value of the micro register, making system changes effective when expanding.

〔Effect of the invention〕

As described above, according to the present invention, by directly executing a privileged instruction that controls a control register, V
This has the effect that the simulation overhead of MCP can be reduced and the performance of the virtual computer system can be improved.

[Brief explanation of the drawing]

Figure 1 is a conceptual diagram of VM privileged instruction simulation, Figure 2 is a conceptual diagram showing a conventional method for directly executing privileged instructions, and Figure 3 is a configuration diagram of an embodiment of a virtual computer system according to the present invention. It is. ■...Instruction register, 2...Mask register, 3.
...Mode register, 4,6...AND circuit, 5...
OR circuit, 7...NOT circuit. Agent: Patent Attorney Akira Takahashi) Figure Z 3rd Figure L J

Claims (1)

[Claims] In a virtual computer system equipped with a management program for simultaneously operating one or more operating systems on one computer system, a means for holding a register number specified by an instruction to control a control register; 1-Means for holding one or more roll register numbers (hereinafter referred to as mask registers), means for identifying that the virtual subtraction machine is operating, and means for holding one or more roll register numbers and the register number specified by the instruction and the mask register. It has means for comparing the included control register numbers, and depending on whether the virtual M] calculator is operating or not and the comparison result by the comparing means, the above-mentioned management program can make an identification or the actual computer mode. A virtual computer system characterized in that it is controlled to be executed by a circuit.