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JPS60153542U - semiconductor package - Google Patents

semiconductor package

Info

Publication number
JPS60153542U
JPS60153542U JP4127684U JP4127684U JPS60153542U JP S60153542 U JPS60153542 U JP S60153542U JP 4127684 U JP4127684 U JP 4127684U JP 4127684 U JP4127684 U JP 4127684U JP S60153542 U JPS60153542 U JP S60153542U
Authority
JP
Japan
Prior art keywords
semiconductor package
lead terminal
bend
utility
shaped cross
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4127684U
Other languages
Japanese (ja)
Inventor
越智 博樹
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP4127684U priority Critical patent/JPS60153542U/en
Publication of JPS60153542U publication Critical patent/JPS60153542U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す側面図、第2図は第1
図の実施例におけるリード端子の一例を示すA−A断面
図、第3図は本考案の実装状態の一例を示す部分断面図
である。 1・・・・・・半導体パッケージ、2・・・・・・リー
ド端子、3・・・・・・印刷配線板、4・・・・・・ス
ルーホール。    。
Fig. 1 is a side view showing one embodiment of the present invention, and Fig. 2 is a side view showing an embodiment of the present invention.
FIG. 3 is a partial sectional view showing an example of the mounting state of the present invention. 1...Semiconductor package, 2...Lead terminal, 3...Printed wiring board, 4...Through hole. .

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体パッケージのリード端子先端を内側に曲げかつ、
リード端子の断面構造をV字型にしたことを特徴とする
半導体パッケージ。
Bend the lead terminal tips of the semiconductor package inward and
A semiconductor package characterized by a lead terminal having a V-shaped cross-sectional structure.
JP4127684U 1984-03-23 1984-03-23 semiconductor package Pending JPS60153542U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4127684U JPS60153542U (en) 1984-03-23 1984-03-23 semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4127684U JPS60153542U (en) 1984-03-23 1984-03-23 semiconductor package

Publications (1)

Publication Number Publication Date
JPS60153542U true JPS60153542U (en) 1985-10-12

Family

ID=30550950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4127684U Pending JPS60153542U (en) 1984-03-23 1984-03-23 semiconductor package

Country Status (1)

Country Link
JP (1) JPS60153542U (en)

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