JPS60148322A - Digital protective relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a digital protective relay, and in particular to an analog protection relay that performs analog calculation processing on an analog value data signal input from a power system and then converts it into a digital signal. -Relates to digital protective relays with digital converters.

- [Prior Art] A digital protective relay receives analog data such as voltage and current from the power system and performs predetermined calculations to detect system faults and perform protective operations. A conventional protective relay of this type is shown in FIG.

l is a processor, for example a microprocessor.

Further, 2 is a data memory, 3 is an output register, 4 is a 12-bit analog/digital (A/D) converter, and 5 is an analog multiplexer. Further, 6 indicates a voltage transformer of the power system, and 7 indicates a current transformer.

The processor 1 outputs selected data to the output register 3 in order to read power system data via the voltage transformer 6, current transformer 7-analog multiplexer 5, A/D converter 4, and data memory 2. This selection data is temporarily stored in the output register 3, and is then inputted to the analog multiplexer 5 as a switching signal SEL to specify the input channel. The analog multiplexer 5 selects the data signal of the specified channel by the switching signal SEL and inputs it to the A/D converter 4 as the data signal Ei. The A/D converter 4 converts the data signal Ei into a digital data signal Di and outputs the data signal Di. This data signal Di is stored in the data memory 2. The data memory 2 stores the data signal Di at sequentially changed addresses in accordance with the selection of the analog multiplexer 5. For example, the data signal Di corresponding to one channel of the analog multiplexer 5 is stored in the data memory address 201, and
The data signal Di corresponding to the channel is stored in the data memory 2.
is stored at address 2. The processor 1 stores the power system data signal Di stored in this manner in the data memory 2.
The system monitors the power system by reading data from the system and processing the data using a predetermined program for protecting the power system, and executes protective operations when an accident is detected.

By the way, when a system fault such as a short circuit fault occurs in the power system, a very large short circuit current flows through the power transmission lines and the like. Normally, the current transformer 7 has a maximum rated current of 5 A (ampere) on the secondary side, but in the event of a short-circuit accident, a current of 40 times the rated value, that is, 200 A, may flow. In order to make correct decisions, it is necessary to correctly convert such a large current into a data signal and read it into the processor 1. Therefore, the full scale input terminal range of the A/D converter 4 is 200A. A
FIG. 2 shows the input/output characteristics of the /D converter 40.

In FIG. 2, the vertical axis represents the voltage of the data signal Ei (unit: A).

The horizontal axis shows the digital value of data signal 1)i. In FIG. 2, the maximum input value of the A/D converter 4 is 200A, and the corresponding data signal Di is 212-1=40A.
It is 95.

Therefore, the data signal Di is 200A/40 per bit.
It becomes 95?48.8mA. Normally, when there is no grid fault in the power system, the secondary current of the current transformer 7 is less than the rated current of 5A because no excessive current is flowing through the transmission line, and the The data signal DiO value output from the D converter 4 is truncated or rounded up to the nearest whole number.

For example, if the relay in question is an overcurrent relay that detects a grid fault by determining the magnitude of the current, the level for determining whether or not there is a grid fault is normally 5 of the 2-missing rating of the voltage current transformer 7.
A value between 0 and 120 is selected and is called a set value. The required performance of the relay is that it should be able to determine the magnitude of the current value with an error of +5 degrees or less from the set value. This 5% tolerance value is called the setting error and is 1
When the input analog quantity is converted into a digital value using the 2-bit A/D converter 4, the following values are obtained.

±5% value of setting value = (5A x 50 coefficient) x 5% - 0,1
25A Therefore, when a 12-bit A/D converter 4 is used, the allowable relay setting error is 2.5A for the resolution of the A/D converter 4 (48.8 mA/1 bit). There is 5 times more room. When this is A/D converted for the same full scale value K using a 10-pit A/D converter, the following will occur.

Maximum digital output of A/D converter 2111 = 10
24 In other words, when using a 10-pit A/D converter, the allowable relay error is The error becomes large and unacceptable.

Therefore, in order to reduce the quantization error, conventional digital protection appliances often need to be equipped with a 12-pit type A/D converter. However, the 12-bit A/D converter is
It is difficult to integrate the circuit, and it is very expensive to ensure its granularity, making the digital protective relay expensive.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and is equipped with a relatively low resolution A/D converter, a subtracter is provided on the input side of the A/D converter, and the first one of the subtracter is
Input the power system input signal, signal, and the offset voltage controlled by the processor into the input, and input the signal of 11t pressure difference between the two to the A/D converter indicated by -F.
Digital protection that can sufficiently increase the accuracy of protection operation by performing A/D conversion operation without changing the offset voltage until the sign bit of the /D converter changes, and then processing the result with a processor. The purpose is to provide electrical relays.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 3, 8 is an output register 59, which is a lo-bit type digital-to-analog converter (1)//converter);
0fr, J: Pattern signal output (Subtraction 2;

In the figure, the same reference numerals as in Figure 1 are used for E and J.

It is the same as that in FIG. 1, and the explanation will be omitted.

However, the A/I) converter 4 here consists of t, 1.1 (l) human type.

In FIG. 3, as in FIG. 1, data signals (rl, analog multiple 7'
L'ri'9-5 was man-powered. Processor 1 outputs data for designating 50 channels of analog multiplexer 3 to output/raster 3, and output register 3 outputs switching signal SEL based on this data.

The analog multiplexer 5 supplies the data signal Eif:n selected by the switching signal SEL to the first input of the device 100. Further, the processor 1 outputs arbitrary numerical data to the output register 8. This output register 8 holds this numerical value and outputs it to the D/A converter 9. The D/A converter 9 generates a signal Ec having an analog voltage proportional to the magnitude of this numerical data. For example, when numerical data (212-1) -4095 is input to the D/A converter 9, a signal Ec of 10<1> is output.

The signal Ec from the D/A converter 9 is input to the other input of the subtracter 10. The subtracter IO subtracts the signal Ec from the D/A converter 9 from the data signal Ei from the analog multiplexer 5, and inputs the signal EO of the difference voltage to the A/D converter 4. The A/D converter 4 converts the differential voltage Eo into a digital number 1a, stores the digital value together with the polarity signal S in the data memory 2, and inputs it to the processor 1. The operation of the A/D converter 4 and the data memory 2 is as follows.
It is similar to that described with respect to the figure.

FIG. 4 is a graph showing the input/output characteristics of the D/A converter 90. In the fourth factor, the vertical axis shows the voltage of the signal Eo of the D/A converter 9, and the horizontal axis shows the digital input value to the D/A converter 9. The maximum input value for the D/A converter $> is all l'' of lO bits, that is, (2''-1):=1023. Then, the signal Ec of the D/A converter 9 corresponding to this maximum human power value
The thickness of the maximum output value of the data input from the power grid (
Set the value to be the same as the maximum value of fi No. Ei(1). The maximum value of the data signal Ei is 20 at the current transformer 70 secondary circuit current.
Corresponds to OA. The A/D converter 4 takes the data signal Ei of 50 A, which is 7 of the maximum value (200 A) of the analog input signal of the power system, as a full scale value. As shown in FIG. 5, the data signal Ei of 50A becomes 1023 when converted into a digital value. Therefore, the resolution is the same as that obtained by A/D conversion using a 12-bit A/D converter.

FIG. 5 is a diagram showing A/D conversion characteristics of the input section shown in FIG. 3. In FIG. 5, the vertical axis shows the voltage of the data signal Ei, and the horizontal axis shows the final digital conversion value of the data signal Ei. Now, the data signal Ei input from the analog multiplexer 5 is Ei.

That is, if the magnitude of 66.7 A is rarely achieved, a signal EO of the difference voltage (TE t --iD C) is outputted by the subtracter 3 Kc. In this case, the signal EO is negative, so
The subtracter 10 inputs the polarity No. 48 S as "1°" to the processor via the data memory 2. In response, the processor reads the output of the data memory 2 and the polarity signal S from the subtracter 8. , it is determined that the data signal Ei to be measured is smaller than D/Ag (signal Ec of the converter 9,
The numerical data to the D/A converter 9 is then output as 512 data corresponding to 2 Ec. Then, the subtracter 10 becomes the D/A converter 91 (Ei 2 E o ). Therefore, this time as well, D/
Since the A converter 9 side is larger, the polarity signal S is 1". Therefore, the processor has an even smaller polarity signal S!-Ec
256 data corresponding to D
/A converter 9. As a result, the signal EO of the 1 subtracter 8 becomes (Ei −, Ec ),
The polarity signal S does not indicate positive and becomes "0". Processor 1 is 6
When the polarity signal S of 0'' is read, changing of the numerical data to be outputted to the D/A converter 9 is stopped and the converter is read.

When the differential voltage (a E I 4 Ec ) is converted into a digital value, it becomes as follows.

=16.67A 024 16.67A÷0.0488 A Li 341D/A
The converter 4 converts the difference voltage of the subtracter 10 (3DI -7-Eo
) = 1'6.67 A is converted into a digital value 341 and written to data memory 2, and the processor reads this value from data memory 2. Processor is D first
Numerical data 25 corresponding to EC for /A converter 9
6, and the polarity signal S indicating positive is read from the subtracter 10. Therefore, the digital value 1024 of LEi in the data memo is added to obtain 1365, which is added to the data (g
The value of the number Ei.

I set it to -66.7A, but! -Ei = 133.3A
In this case, the processor naturally selects 2048, which corresponds to the input -a-E i, as the numerical value to be added to the A/D converted data.

Further, in the above embodiment, the A/D converter and the D/A converter are of 10-bit type, but they may be of other bit type. Further, although the D/A converter outputs an offset voltage that changes the analog input signal to be measured in four equal steps, it may be divided into n equal parts (n - any integer).

[Effect of JfJ] As described above, according to the present invention, iJ generates an offset voltage for the analog input signal to be measured, and A/D converts the voltage difference between the analog input value and the offset voltage. Because of this, it is possible to obtain high-precision conversion data even with a low-resolution A/D converter, so it is possible to perform high-precision data processing and improve the effectiveness of digital protection relays. be.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the input section of a conventional digital safety relay, Fig. 2 is a diagram showing the input/output characteristics of a converter similar to Fig. 1, and Fig. 3 is a diagram showing the input/output characteristics of the converter according to the present invention. A block diagram showing the human power section of the digital protective relay, Fig. 4 is a diagram showing the input/output characteristics of the D/A converter shown in Fig. 3, and Fig. 5 shows the A/D conversion input of the input section shown in Fig. 3 VC. FIG. 3 is a diagram showing output characteristics. DESCRIPTION OF SYMBOLS 1... Processor, 2... Data memory, 3... Output register, 4... A/D converter, 5... Analog multiplexer, 6... Output register, 9... D/
A converter, 10...analog subtractor. Note that the same reference numerals in the figures indicate the same parts. Fig. 1 3 20 L 3 M Fig. 5

Claims (1)

[Claims] A subtracter that calculates the difference between the input data and a bias voltage in a digital protection relay that protects the power system by performing predetermined data processing after digitally converting analog input data detected from the power system; The maximum value of the difference output from the subtractor is taken as the full scale, and an analog-to-digital converter outputs the sign bit and data bit of the difference, and the sign bit of the analog-to-digital converter is the first one. Outputting numerical data changed in predetermined steps until the logical value changes to a second logical value, reading the data bits when detecting a change in the logical value, and processing data to protect the power system. What is claimed is: 1. A digital protection relay comprising: a processor that executes the above; and a digital-to-analog converter that converts the numerical data from the processor into analog and generates the bias voltage.