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JPS60138949A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS60138949A
JPS60138949A JP25139383A JP25139383A JPS60138949A JP S60138949 A JPS60138949 A JP S60138949A JP 25139383 A JP25139383 A JP 25139383A JP 25139383 A JP25139383 A JP 25139383A JP S60138949 A JPS60138949 A JP S60138949A
Authority
JP
Japan
Prior art keywords
frame
gate
resin
lead
notch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25139383A
Other languages
Japanese (ja)
Inventor
Tsutomu Seito
清塘 勉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP25139383A priority Critical patent/JPS60138949A/en
Publication of JPS60138949A publication Critical patent/JPS60138949A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable to scarcely generate a gate remainder by a method wherein a notch is provided at a position corresponding to a gate for resin sealing located at the side end of one way on the inner side of one of two lead frames. CONSTITUTION:This semiconductor device has a bed part 3, whereon a semiconductor element pellet (has not been shown in the diagram) is to be mounted in the central part between mutually parallel two lead frames 2', and plural lead parts, which have been provided in the peripheral parts of the bed part 3 and have been formed in a form spreading radially from the vicinity of the bed part 3, in the same manner as the conventional one, but a rectangular notch 12 is provided at a position corresponding to a gate for resin sealing located at the side end of one way on the inner side of one way of the lead frames 2' in this semiconductor device. The size of the notch 12 is the bigger the better from an aim of enabling the adhesion of a gate part resin 6' to lower, but the size is formed in such a way to have a width and a depth of one-second or thereabouts of the width of the frame 2' in order to maintain the strength of the frame 2'. In case a resin sealing was performed, the gate part resin 6' can be easily removed by applying a mechanical external force without generating a gate remainder, because there exists no lead frame 2' to cause an adhesion on the upper face of the point 6'a of the gate part resin 6'.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置用リードフレームに関するもので特
に樹脂封止型半導体集積回路装置に使用されるものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a lead frame for a semiconductor device, and is particularly used for a resin-sealed semiconductor integrated circuit device.

〔発明の技術的背景〕[Technical background of the invention]

樹脂封止(モールド)型の半導体集積回路装置は量産−
低価格化が可能であシ、近年の技術向上による信頼性の
向上に伴って広く使用されている。
Mass production of resin-sealed (mold) type semiconductor integrated circuit devices.
It is possible to reduce the price, and is widely used as reliability has improved due to recent technological improvements.

この樹・脂封止にあっては寸法精度が良く、成形効率の
良いトランスファ成形法が通常使用される。
For resin/resin sealing, a transfer molding method is usually used, which has good dimensional accuracy and good molding efficiency.

これは、あらかじめプレヒーター及び金型で加熱されて
:可塑化されたエポキシ樹脂等の成型材料を、スプル―
、ランチ、ゲートを介して金型中のキャビティ′に導き
硬化させるものである。半導体集積回路装置−の樹脂封
止においては、第1図に示すリードフレームlが使用さ
れる。これは、鉄−ニッケル系合金またはコノセール勢
の金属薄板を工、チン〆等で所定のパターンに成形した
もので、互いに平行な2本のフレーム枠λ間には、中央
部に半導体素子ペレットを搭載するベッド部3、その周
囲にベッド部近傍から放射状に伸びる形に形成された複
数のリード部を有している。このようなリードフレーム
を用いる場合、ランチはフレーム枠λに平行に配置され
、ゲートはこのランチからリードフレーム内に向うよう
に枠の一部に配置される。したがって、樹脂封止後の様
子は第2図の斜視図およびそのA −A’線断面図であ
る第3図に示されるように、樹脂封止パッケージjの枠
側端面taの下部にフレーム枠部に密着したゲート部樹
脂6、ランナ部樹脂7がその′tま残った状態となって
いる。これらのゲート部樹脂乙およびランナ部樹脂7は
成型完了後機械的な力を加えてリードフレーム/および
半導体集積回路パッケージjから取外される。
This is heated in advance with a preheater and a mold: the molding material such as plasticized epoxy resin is sprued.
, launch, and gate into the cavity in the mold for hardening. In resin sealing of a semiconductor integrated circuit device, a lead frame 1 shown in FIG. 1 is used. This is made by forming a thin metal plate of iron-nickel alloy or Konoseru metal into a predetermined pattern by machining, chiming, etc., and a semiconductor element pellet is placed in the center between two mutually parallel frames λ. It has a bed part 3 to be mounted, and a plurality of lead parts formed around the bed part 3 in a shape extending radially from the vicinity of the bed part. When using such a lead frame, the launch is arranged parallel to the frame frame λ, and the gate is arranged in a part of the frame so as to extend from the launch into the lead frame. Therefore, as shown in the perspective view of FIG. 2 and FIG. 3, which is a sectional view taken along the line A-A', the state after resin sealing is such that a frame frame is attached to the lower part of the frame side end surface ta of the resin-sealed package j. The gate part resin 6 and runner part resin 7 which are in close contact with the parts remain. After the molding is completed, the gate resin B and the runner resin 7 are removed from the lead frame/and semiconductor integrated circuit package J by applying mechanical force.

〔背景技術の問題点〕[Problems with background technology]

しかしながら第3図に見られるようにゲート部樹脂乙の
先端部6aはリードフレームlに密着し、かつ先端部は
ど細くなっているため、機械的な除去は困難であシ、密
着力が強い場合には、パッケージよとの境界で折れず第
3図において交差線部Jaで示したように先端部のみが
リードフレームlの枠λ上に残る。このようないわゆる
ゲート残シは、リードのバンチングによる切離しやリー
ド曲げ等の彼工程においてフレーム枠λがガイド面に正
常に位置決めされることを妨げるため、不良品の発生や
ポンチの破損を招くという問題がある。
However, as shown in Figure 3, the tip 6a of the gate resin B is in close contact with the lead frame L, and the tip is tapered, so mechanical removal is difficult and the adhesion is strong. In this case, it is not broken at the boundary between the packages, and only the tip remains on the frame λ of the lead frame l, as shown by the intersection line Ja in FIG. Such so-called gate residue prevents the frame λ from being correctly positioned on the guide surface during processes such as lead separation by bunching and lead bending, resulting in defective products and damage to the punch. There's a problem.

〔発明の目的〕[Purpose of the invention]

本発明はこのような事情に鑑みてなされたもので、ゲー
ト残シが発生しにくい半導体装置用リードフレームを提
供することを目的とする。
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a lead frame for a semiconductor device in which gate residue is less likely to occur.

〔発明の概要〕[Summary of the invention]

上記目的達成のため、本発明においてはリードフレーム
枠部内側の樹脂封止用ゲートに対応する位置に切欠きを
設けておシ、ゲート部樹脂のリードフレーム枠への密着
力が低下するためゲート残シが発生しにくいものである
In order to achieve the above object, in the present invention, a notch is provided inside the lead frame frame at a position corresponding to the resin sealing gate. It is less likely to leave residue.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照しながら本発明の実施例のいくつかを
詳細に説明する。
Hereinafter, some embodiments of the present invention will be described in detail with reference to the drawings.

第μ図は本発明にかかるリードフレーム//を示す平面
図であって、従来のリードフレームと同様に互いに平行
な2本のフレーム枠λ′間には、中央部に半導体素子ペ
レット(図示せず)を搭載するベッド部3、その周囲部
に(ラド部近傍から放射状に伸びる形に形成された複数
のリード部ダを有しているが、フレーム枠部′の一方側
内側端の樹脂封止用ゲートに対応する位置に矩形状の切
欠き>a□ を設けている。この切欠き12の大きさはゲート蔀□ 樹脂の密加力を低下させる目的からは大きい程良いが、
フレーム枠λ′の強度を維持するため、)し□ 一ム枠−′の幅のる程゛度の幅および奥行を有するよ□ うにするのが適尚である。
FIG. μ is a plan view showing a lead frame // according to the present invention. Similar to the conventional lead frame, there is a semiconductor element pellet (not shown) in the center between two parallel frame frames λ'. The bed part 3 on which the frame part' is mounted has a plurality of lead parts extending radially from the vicinity of the bed part 3 around the bed part 3. A rectangular notch >a□ is provided at a position corresponding to the stop gate.The size of this notch 12 is preferably larger for the purpose of reducing the force of applying resin to the gate.
In order to maintain the strength of the frame frame λ', it is appropriate that the frame frame λ' has a width and depth approximately equal to the width of the frame frame -'.

このようなリードフレームを使用して樹脂耐重を行った
様子を第5図の斜視図およびそのB −tpr’線断面
図である第6図に示す。これによればゲ←□ ト部樹脂6′の先端4’aの上面には密着を生じるリー
ドフレーム枠−′が存在しないため、このグー□ト部樹
脂t′は機械的な外力を加えることによシグート残シを
生ずることなく容易に取外すことができるO 第グ図に示す実施例ではフレーム枠λ′の片側にのみ切
欠きを有しているが、樹脂封止工程の効率化の目的で1
つのランチからその両側に設けられたゲートに樹脂を送
出するような成型法においてもリードフレームの方向を
反転しなくても済むように、両側のフレーム枠に切欠き
會設けることもできる。
The perspective view of FIG. 5 and FIG. 6, which is a sectional view taken along the line B-tpr', show how such a lead frame is used to withstand resin loads. According to this, since there is no lead frame frame -' which causes close contact on the upper surface of the tip 4'a of the gate part resin 6', this gate part resin t' cannot be subjected to mechanical external force. The embodiment shown in Figure 1 has a notch on only one side of the frame λ', but the purpose of this is to improve the efficiency of the resin sealing process. de1
Even in a molding method in which resin is delivered from two launches to gates provided on both sides, notches can be provided in the frame frames on both sides so that the direction of the lead frame does not have to be reversed.

第7図は本発明の他の実施例を示す平面図であって、フ
レーム枠り#上には樹脂封止用ゲートに対応する位置か
ら複数のり−ドグを連結して支持するタイノ一部tの延
長部に達するL字状切欠き13を有している。この切欠
き13はゲート部樹脂の取外しを容易にする働きと、リ
ードフレーム材料の熱膨張率が成型樹脂の熱膨張率よシ
も小さいことによシ成型時にリードフレーム全体にそυ
が生ずることを防止する働きをする・ 以上の実施例においては、切欠部の形状はいずれも矩形
ないしはその変形であったが、切欠きの最奥部に丸味を
有するもの等あらゆる形状を選択することができる。
FIG. 7 is a plan view showing another embodiment of the present invention, and on the frame # there is a part t of a tie plate that connects and supports a plurality of glue dogs from a position corresponding to the resin sealing gate. It has an L-shaped notch 13 that reaches an extension of the . This notch 13 serves to facilitate the removal of the gate resin, and because the coefficient of thermal expansion of the lead frame material is smaller than that of the molding resin, it is used to cover the entire lead frame during molding.
In the above examples, the shape of the notch was all rectangular or a modification thereof, but any shape can be selected, such as one with a rounded part at the innermost part of the notch. be able to.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によればフレーム枠内側端の樹脂
封止用ゲートに対応する位置に切欠き部を設けておシ、
樹脂制止の際に密着を生じるフレーム枠部が減少し、封
止後のゲート部樹脂を容易かつ完全に除去することがで
きるので、ゲート残シに伴う不良の発生や工具の破損を
減少し、生産効率も向上させることができる。また、切
欠き部からゲート部樹脂を押す押付治具を挿入すること
ができ、ゲート部樹脂の除去をさらに効率化することが
できる。
As described above, according to the present invention, the notch is provided at the position corresponding to the resin sealing gate at the inner end of the frame.
The number of frame parts that cause close contact during resin sealing is reduced, and the resin on the gate part after sealing can be easily and completely removed, reducing the occurrence of defects and tool damage caused by gate residue. Production efficiency can also be improved. Furthermore, a pressing jig that presses the gate resin can be inserted through the notch, and the gate resin can be removed more efficiently.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置用リードフレームを示す平面
図、第2図は第1図に示したリードフレームを用いて樹
脂封止を行った様子を示す斜視図・第3図は第2図にお
けるA−A’線断面図、第≠図は本発明にかかる半導体
装置用リードフレームの一実施例を示す平面図、第5図
は第参図に示したリードフレームを用いて樹脂封止を行
った様子を示す斜視図、第6図は第5図におけるB −
B’線断面図、第7図は本発明の他の実施例を示す平面
図である。 / 、 // 、、//’・・・半導体装置用リードフ
レーム1.2..2’、!・・・フレーム枠、3・・・
ベット部、≠・・・リード部、j・・・樹脂封止パッケ
ージ、t・・・ゲート部樹脂、7・・・ランチ部樹脂・
r・・タイツ々−1/2・・・切欠き、/J・・L字状
切欠き。 出願人代理人 猪 股 情 事1図 第2図 第3図 第41 u : / 第5図 第7図 U′
Fig. 1 is a plan view showing a conventional lead frame for semiconductor devices, Fig. 2 is a perspective view showing resin sealing using the lead frame shown in Fig. 1, and Fig. 3 is Fig. 2. 5 is a cross-sectional view taken along the line A-A' in FIG. A perspective view showing how the process is carried out, FIG. 6 is B- in FIG.
A sectional view taken along the line B' and FIG. 7 are plan views showing another embodiment of the present invention. / , // ,, //'...Lead frame for semiconductor device 1.2. .. 2',! ...Frame frame, 3...
Bed part, ≠... Lead part, j... Resin sealing package, t... Gate part resin, 7... Launch part resin.
r...Tights-1/2...notch, /J...L-shaped notch. Applicant's agent Inomata Affair Figure 1 Figure 2 Figure 3 Figure 41 u: / Figure 5 Figure 7 U'

Claims (1)

【特許請求の範囲】 /、半導体ペレットを搭載するベッド部とミその周囲に
配置された複数のリード部と、この4゜P部およびリー
ド部を支持するフレーム枠を有′する半導体装置用リー
ドフレームにおいて、。 前記フレーム枠内側端の樹脂封止用ゲートに対応する位
置に切欠き部を設けたことを特徴と :f6□1□+)
−yyv−b。 1 コ、切欠き部が矩形である特許請求の範囲第1項 :□ 記載の半導体装置、用リードフレーム。 1[ 3、切欠き部が樹脂封止用ゲートに対応する位置 1□ から複数のリードを連結支持するタ、イノ々−延長 ・
1 部に達するL字形状を呈するものである特許請 :□ 求の範囲第7項記載の半導体リー・ドフレーム・1: ≠、切欠き部の寸法が幅および奥行ともフレーム 1枠
の略半分である特許請求の範囲第2項記載の 1半導体
装置用リードフレーム。
[Claims] / A lead for a semiconductor device, which includes a bed portion on which a semiconductor pellet is mounted, a plurality of lead portions arranged around the bed portion, and a frame supporting the 4°P portion and the lead portions. In the frame. A cutout portion is provided at a position corresponding to the resin sealing gate at the inner end of the frame (f6□1□+)
-yyv-b. 1. A lead frame for a semiconductor device according to claim 1, wherein the notch is rectangular. 1 [ 3. Extension for connecting and supporting multiple leads from the position 1□ where the notch corresponds to the resin sealing gate.
Patent claim: □ Semiconductor lead frame according to claim 7, which has an L-shape that reaches 1 part. 1: ≠, the dimensions of the notch are approximately half of one frame in both width and depth. 1. A lead frame for a semiconductor device according to claim 2.
JP25139383A 1983-12-26 1983-12-26 Lead frame for semiconductor device Pending JPS60138949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25139383A JPS60138949A (en) 1983-12-26 1983-12-26 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25139383A JPS60138949A (en) 1983-12-26 1983-12-26 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS60138949A true JPS60138949A (en) 1985-07-23

Family

ID=17222172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25139383A Pending JPS60138949A (en) 1983-12-26 1983-12-26 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS60138949A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133453A (en) * 1990-09-26 1992-05-07 Nec Corp Lead frame for semiconductor device use
JPH05211264A (en) * 1991-12-03 1993-08-20 Nec Corp Lead frame for semiconductor
JPH08227960A (en) * 1995-02-21 1996-09-03 Nec Corp Lead frame for semiconductor device
JP2015138943A (en) * 2014-01-24 2015-07-30 株式会社カネカ Lead frame for optical semiconductor, resin molding for optical semiconductor and manufacturing method therefor, optical semiconductor package and optical semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133453A (en) * 1990-09-26 1992-05-07 Nec Corp Lead frame for semiconductor device use
JPH05211264A (en) * 1991-12-03 1993-08-20 Nec Corp Lead frame for semiconductor
JPH08227960A (en) * 1995-02-21 1996-09-03 Nec Corp Lead frame for semiconductor device
JP2015138943A (en) * 2014-01-24 2015-07-30 株式会社カネカ Lead frame for optical semiconductor, resin molding for optical semiconductor and manufacturing method therefor, optical semiconductor package and optical semiconductor device

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