JPS60136156U

JPS60136156U - semiconductor equipment

Info

Publication number: JPS60136156U
Application number: JP2402684U
Authority: JP
Inventors: 康夫大田
Original assignee: 関西日本電気株式会社
Priority date: 1984-02-21
Filing date: 1984-02-21
Publication date: 1985-09-10

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来の半導体装置における半導体基板の部分平
面図、第２図は第１図のＡ−Ａ線に沿う、断面図、第３
図は本考案の一実施例を示す部分平面図、第４図は第３
図のＢ−Ｂ線に沿う断面図、第５図は第３図の要部の概
略斜視図、第６図乃至第１０図は第３図におけるインダ
クタンス素子の製造工程例を示すもので、第ｑ図乃至第
１０図の各ａは部分平面図、第６図乃至第１０図の各す
は第６図乃至第１０図の各ａのＣ−Ｃ線、Ｄ−Ｄ線、Ｅ
−Ｅ線、Ｆ−Ｆ線、Ｇ−Ｇ線に沿う断面図であり、第１
１図及び第１２図は本考案の他の二実施例を示す各々要
部の概略斜視図である。６・・・半導体基板、８・・・インダクタンス素子、９
〜１２・・・絶縁層、Ｋ、、　Ｋ１’、　Ｋ工″・・・
渦巻状金属・層、Ｋ３．　Ｋ３’、　Ｋ３″・・・渦巻
状金属層。第」（’ａ）　　　−FIG. 1 is a partial plan view of a semiconductor substrate in a conventional semiconductor device, FIG. 2 is a cross-sectional view taken along line A-A in FIG. 1, and FIG.
The figure is a partial plan view showing one embodiment of the present invention, and FIG.
5 is a schematic perspective view of the main part of FIG. 3, and FIGS. 6 to 10 show an example of the manufacturing process of the inductance element in FIG. 3. Each a in FIG. q to FIG. 10 is a partial plan view, and each a in FIG. 6 to FIG.
- It is a sectional view along the E line, the F-F line, and the G-G line, and the first
1 and 12 are schematic perspective views of essential parts of two other embodiments of the present invention. 6... Semiconductor substrate, 8... Inductance element, 9
~12... Insulating layer, K, K1', K work''...
Spiral metal layer, K3. K3', K3''... spiral metal layer.''('a) −

Claims

[Scope of utility model registration request]

1. A semiconductor device comprising an inductance element formed by sequentially connecting spiral metal layers in series in a plurality of stages with an insulating layer interposed between each stage on a semiconductor substrate.