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JPS60125748U - Lateral transistor - Google Patents

Lateral transistor

Info

Publication number
JPS60125748U
JPS60125748U JP1340884U JP1340884U JPS60125748U JP S60125748 U JPS60125748 U JP S60125748U JP 1340884 U JP1340884 U JP 1340884U JP 1340884 U JP1340884 U JP 1340884U JP S60125748 U JPS60125748 U JP S60125748U
Authority
JP
Japan
Prior art keywords
region
insulating film
gate electrode
lateral transistor
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1340884U
Other languages
Japanese (ja)
Inventor
正明 池田
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP1340884U priority Critical patent/JPS60125748U/en
Publication of JPS60125748U publication Critical patent/JPS60125748U/en
Pending legal-status Critical Current

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  • Bipolar Transistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のラテラル型トランジスタを説明する断面
図、第2図および第3図は本考案のラテラル型トランジ
スタを説明する断面図および上面図である。 主な図番の説明、11は半導体基板、12はエピタキシ
ャル層、14は半導体領域、16はコレクタ領域、17
はエミッタ領域、22は第1の絶縁膜、23は第2の絶
縁膜、24はゲート電極である。
FIG. 1 is a sectional view illustrating a conventional lateral type transistor, and FIGS. 2 and 3 are sectional views and top views illustrating the lateral type transistor of the present invention. Explanation of main figure numbers: 11 is a semiconductor substrate, 12 is an epitaxial layer, 14 is a semiconductor region, 16 is a collector region, 17
is an emitter region, 22 is a first insulating film, 23 is a second insulating film, and 24 is a gate electrode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一導電型のベース領域となる半導体領域と該半導体領域
表面に接近して設けられた逆導電型のコレクタ領域およ
びエミッタ領域と前記半導体領域を被覆する第1の絶縁
膜と該第1の絶縁膜上に設けられた電極とを具備し、前
記第1の絶縁膜上を被覆する第2の絶縁膜を設は該第2
の絶縁膜上に少くとも前記コレクタ領域とエミッタ領域
間のベース領域を被覆する様にゲート電極を設は該ゲー
ト電極を前記ベース領域より高電位にバイアスすること
を特徴とするラテラル型トランジスタ。
a semiconductor region serving as a base region of one conductivity type; a collector region and an emitter region of an opposite conductivity type provided close to the surface of the semiconductor region; a first insulating film covering the semiconductor region; and the first insulating film. and a second insulating film covering the first insulating film.
A lateral type transistor, wherein a gate electrode is provided on the insulating film so as to cover at least a base region between the collector region and the emitter region, and the gate electrode is biased to a higher potential than the base region.
JP1340884U 1984-02-01 1984-02-01 Lateral transistor Pending JPS60125748U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1340884U JPS60125748U (en) 1984-02-01 1984-02-01 Lateral transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1340884U JPS60125748U (en) 1984-02-01 1984-02-01 Lateral transistor

Publications (1)

Publication Number Publication Date
JPS60125748U true JPS60125748U (en) 1985-08-24

Family

ID=30497387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1340884U Pending JPS60125748U (en) 1984-02-01 1984-02-01 Lateral transistor

Country Status (1)

Country Link
JP (1) JPS60125748U (en)

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