JPS60121805A - Single ended push-pull amplifier circuit - Google Patents

Abstract

PURPOSE:To prevent frequency characteristics to a low frequency input signal from deteriorating as to a single ended push-pull amplifier circuit by using a resistor only for both the formation of an in-phase current corresponding to an input signal and the setting of a DC bias voltage. CONSTITUTION:The single ended push-pull SEPP amplifier circuit has a resistance R1 connected between the collector of a transistor TRQ1 and a +V power source and a resistance R5 between the collector and base of the TRQ1 to constitute a parallel feedback amplifier circuit A1, and a resistance R2 is connected between the emitter of a TRQ2 and a -V power source to constitute a common emitter type amplifying circuit A2. An input terminal I2 is connected to the base of the TRQ2, and an output terminal O2 is connected to the collector of the TRQ1; and a resistance R6 is connected between outputs of circuits A1 and A2, and a resistance R7 is connected between the base of the TRQ1 and the collector of the TRQ2. The resistances R1, and R6-R7 are selected to put the emitter current i1 of the TRQ1 and the collector current i2 of the TRQ2 in phase and equalize their levels, and also to satisfy the bias condition of the SEPP amplifier circuit, thereby obtaining the amplifier circuit with excellent frequency characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates to a transformerless amplifier circuit, particularly a wideband single amplifier circuit suitable for video signal transmission.

This invention relates to a push-pull (SEPP) amplifier circuit.

Background of the Technology SEPP amplifier circuits used for video signal transmission and the like are required to be small enough to be integrated into an IC, and to have good frequency characteristics over a wide band.

Conventional technology and problems An example of a conventional SEPP amplifier circuit is shown in FIG.

In FIG. 1, the conventional SEPP amplifier circuit includes a common emitter transistor Q1 and a common emitter transistor Q2.
A current 11 flows from the collector of the transistor Q1 to the output terminal 01 according to an input signal applied from the input terminal 1 to the pace of the transistor Q1, and a current 11 flows from the collector of the transistor Q2 to the output terminal 01. In this case, the collector of the transistor Q and the base of the transistor Q2 are capacitively coupled by a capacitor C so that the currents 11 and 12 are in phase. In this way, a current of i,+12=2i□ is obtained at the output terminal 01 according to the input signal. The resistance R,, R2 is i,, i2
are chosen so that the values of are equal. On the other hand, the DC bias voltage of transistor Q2 is connected to the input signal system by resistors R3 and R4.

set independently.

In the above conventional circuit, the flit reactance of the capacitor C increases in the low frequency region before the video signal, so the base current of the transistor Q2 decreases, and as a result,
Since the collector current 12 of transistor Q2 decreases,
There is a problem that an imbalance occurs between the electric current (Af, iH and 1°), the output signal obtained at the output terminal 01 is distorted, and the low frequency characteristics are deteriorated.

If the size of the capacitor C is increased, the problem described in 1 above can be solved, but each type of large capacitor has the disadvantage of being large in size.

OBJECTS OF THE INVENTION In view of the above-mentioned problems in the prior art, an object of the present invention is to provide a small 5E suitable for forming a negative sequence current according to an input signal and setting a DC bias voltage using only a resistor.
An object of the present invention is to provide a PP amplification circuit.

Structure of the Invention The above object is to connect the output of an amplifier circuit and the output of a parallel parallel feedback amplifier circuit through a resistor, and to generate a current that is in phase and of the same magnitude as the output current of the amplifier circuit in parallel parallel feedback amplification. This is achieved by a 5EPP amplification circuit which is generated at the output of the circuit.

Embodiments of the Invention Examples of the present invention will be explained below with reference to FIGS. 2 and 3.

FIG. 2 is a circuit diagram showing a 5EPP amplifier circuit according to an embodiment of the present invention. In FIG. 2, transistor Q, 1
．． A parallel parallel feedback amplifier circuit A1 is constituted by a resistor R1 connected between the collector of Q and the positive power supply terminal +■, and a resistor R5 connected between the collector base of Ql. , Q2 and a resistor R2 connected between the emitter and the negative power supply terminal constitute a grounded emitter amplifier circuit A2. The output of parallel parallel feedback amplifier circuit A□, that is, the emitter of transistor Q1, and the output of emitter grounded amplifier circuit A2, that is, transistor Q
A resistor R6 is connected between the collector of the transistor Q2, and a resistor R7 is connected between the base of the transistor Q and the collector of the transistor Q2. The input signal is applied to the input terminal ■2 connected to the base of the transistor Q2,
The output is available at output terminal 02 connected to the emitter of transistor Q1.

The collector voltage of transistors Q, , Q2 when there is no signal (
&■. Then, depending on the input signal applied to the input terminal I2, a current is generated between the collector and emitter of the transistor Q, and a current is generated between the collector and the emitter of the transistor Q2. -12 flows, in this case 11 and 1
2 is in phase and equal in size, 5EP
The value of each resistor is determined so as to satisfy the bias conditions as a P amplifier circuit. This resistance value setting method will be explained below.

FIG. 3 is an equivalent circuit diagram of the circuit of FIG. 2. In FIG. 3, the input terminal 2 of i2t\J and the emitter grounded amplifier circuit A2 are represented by source No. 41 S.

First, the following equation can be obtained from the condition that the current i at the time of signal input and 12 are in phase and have the same magnitude.

When a current 12 flows through the resistor R6, the current 1 (R7) flowing through the resistor R7 becomes 7 if the impedance on the base side of the transistor Q1 is ignored. Due to this current i(R,), transistor Q1
The emitter-based voltage V generated between the collector and emitter of is v=-i (R,) @R.

average It is. Also, the collector current 11 of the transistor Q1 is i, = −-i (R,) (3) 1 It is.

The conditions for becoming a 5EPP amplifier circuit are 11=12 (4) It is. Formulas (1) to (4) is ejaculated.

Next, bias conditions are determined again based on the circuit diagram in FIG. Calculate the current flowing through resistor I when there is no input signal. ,
The current flowing through the resistor R2 is I(R,), and the transistor Q1
The emitter voltage of V. , the base-emitter threshold voltage of transistor Q1 is VBl. , if the voltage at the positive source terminal 10V is E, then V8=ER, IC-R6I(R,) −VBE −・
-・(7)VBo=I(R,)R7-R6(Io-I(
R,)) -song-(s). Substituting equation (8) and equation (9) into equation (1), we get: As an example, E=9V, Vo=OV, Ic240mA.

R6=50Ω, I (R,)=I. /10,V,,
= 0.7V From formula (9) = 625Ω ...... (12) According to formula (5) = 13.51 likelihood 1 Do... (13) Formula (7) and (13 ) = 88.30Ω ・・・・・・(14) Therefore, R,
= 1.192 and Ω (15).

FIG. 4 is a circuit diagram showing an embodiment of the present invention in which the embodiment of FIG. 2 is applied to a feedback amplifier. In Figure 4, the output 0
The signal obtained at
is increased and an input signal from input terminal 3 is given. S
The feedback amplification effect by E P l) and the amplifier A is well known and will not be described here.

As described in detail, according to the present invention, the 5EPP amplifier circuit has a small in-phase current formation and IIf
Since the current bias voltage setting is achieved using only a low resistor, there is no need for a coupling capacitor, and therefore the frequency characteristics do not deteriorate even with low frequency input signals, and a configuration suitable for IC implementation can be obtained. Effects can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of a conventional SEL)P amplifier circuit, FIG. 2 is a circuit diagram of an SJPP amplifier circuit according to an embodiment of the present invention, and FIG. Temple circuit diagram, 4th
This figure is a circuit diagram of another embodiment of the present invention showing an example of application of the circuit of FIG. 2. A1...Parallel parallel feedback amplifier circuit A2...Amplifier circuit R6...Resistance Patent applicant Fujitsu Limited Patent application agent Patent attorney Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney 1) Yukio Patent attorney Mt. Akira Kuchi Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1. The output of the amplifier circuit and the output of the parallel parallel feedback amplifier circuit are connected through a resistor, and a current that is in phase and equal in magnitude to the output current of the amplifier circuit is connected to the parallel parallel feedback circuit. A single-ended push-pull amplifier circuit in which the output of the amplifier circuit is generated. 2. The single-ended push-pull amplifier circuit according to claim 1, wherein the amplifier circuit is a grounded emitter type amplifier circuit. 3. The single-ended push-pull amplifier according to claim 1, wherein an amplifier circuit is connected before the single-ended push-pull amplifier circuit, and negative feedback is applied to the amplifier circuit from the output of the single-ended push-pull amplifier circuit. Push-pull amplifier circuit.