[go: up one dir, main page]

JPS60119156A - Msk rectangular synchronization detecting circuit - Google Patents

Msk rectangular synchronization detecting circuit

Info

Publication number
JPS60119156A
JPS60119156A JP22737183A JP22737183A JPS60119156A JP S60119156 A JPS60119156 A JP S60119156A JP 22737183 A JP22737183 A JP 22737183A JP 22737183 A JP22737183 A JP 22737183A JP S60119156 A JPS60119156 A JP S60119156A
Authority
JP
Japan
Prior art keywords
circuit
electric field
msk
loop filter
regeneration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22737183A
Other languages
Japanese (ja)
Inventor
Yoshifumi Toda
戸田 善文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22737183A priority Critical patent/JPS60119156A/en
Publication of JPS60119156A publication Critical patent/JPS60119156A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 発明の技術分野 本発明は、M S K (Minin+++m 5hi
ft Keying)信号の復調に用いられる直交同期
検波回路に関し、電界強度に応じてループフィルタの帯
域を変化させようとするものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an M S K (Minin+++m 5hi
Regarding an orthogonal synchronous detection circuit used for demodulating a ft Keying signal, the band of a loop filter is changed in accordance with the electric field strength.

従来技術と問題点 移動無線による音声通信例えば電話のデジタル化は他の
分野より遅れている。その理由の1つは、音声をADM
、ADPCM等により符号化して伝送すると帯域が広が
り過ぎて、既存のFMチャンネル・セパレーション(2
5KHz>を越えてしまうからである。しかし、位相連
続FSKの一種である変調指数0.5のMSK伝送方式
であれば効率がよいので、既存のFMチャンネルで伝送
が可能である。
PRIOR ART AND PROBLEMS Digitization of mobile radio voice communications, such as telephones, is lagging behind other fields. One of the reasons is that audio is ADM.
, ADPCM, etc., if encoded and transmitted, the band would be too wide and the existing FM channel separation (2
This is because the frequency exceeds 5KHz. However, since the MSK transmission method with a modulation index of 0.5, which is a type of phase continuous FSK, is efficient, it is possible to transmit using the existing FM channel.

一般に復調方式には、(11デイスクリミネータによる
方式、(2)遅延検波方式、(3)直交同期検波方式が
あるが、それぞれ一長一短がある。MSK信号に対する
(3)の直交同期検波方式には特開昭55〜73164
があるが、この方式は静特性が最もよい。しかしこの方
式は搬送波再生用の同期ループ(PLL)を有するので
これによる問題、即ち移動無線の場合にはビルの反射等
によってマルチパスフェージングが起こり、これらを合
成受信したときに速い振幅変動(レーレ−フェージング
)が生じてP L Lが追従しきれないという問題があ
る。
In general, demodulation methods include (11-discriminator method, (2) delayed detection method, and (3) orthogonal synchronous detection method, each of which has its advantages and disadvantages.The orthogonal synchronous detection method (3) for MSK signals Japanese Patent Publication No. 55-73164
However, this method has the best static characteristics. However, this method has a locked loop (PLL) for carrier wave regeneration, which causes problems, such as multipath fading caused by reflections from buildings in the case of mobile radio, and rapid amplitude fluctuations (relay rate) when these signals are combined and received. There is a problem that PLL cannot follow up due to the occurrence of fading.

f]、)と〔2)の方式は閉ループがないので電界変動
に対する時間応答が速く、移動無線のように逐次電界強
度が変動する場合には都合が良い。しかし電界強度を一
定とした場合、エラーレイト等のスタテイ・、りな特性
は、(1,1の方式で6dB程度、また(2)の方式で
ば3r]B程度、それぞれ(3)の方式より劣るので、
り3)の直交同期検波方式に電界変動対策を施こすこと
ができれば理想的である。
Since the methods of [f], ) and [2] do not have a closed loop, the time response to electric field fluctuations is fast, and they are convenient in cases where the electric field strength fluctuates sequentially, such as in mobile radio. However, when the electric field strength is constant, the error rate and other state characteristics are approximately 6 dB for the method (1,1), and approximately 3r]B for the method (2), compared to the method (3). Because it is inferior,
It would be ideal if measures against electric field fluctuations could be applied to the orthogonal synchronous detection method in step 3).

発明の目的 本発明は、直交同期検波回路のP L Lに用いられる
ループフィルタの帯域を電界強度に応じて変化させるこ
とにより、該ループのダイナミックな追iノC特性を改
善しようとするものである。
Purpose of the Invention The present invention attempts to improve the dynamic tracking characteristics of the loop filter used in the PLL of a quadrature synchronous detection circuit by changing the band of the loop filter according to the electric field strength. be.

発明の構成 本発明は、同期(般送波再生回路、データ再生回路、ク
ロック再生回路により構成されるM S K直交同期検
波回路において、該同期搬送波再生回路の搬送波再生用
位相同期ループに用いられるループフィルタの帯域幅を
、受信電界が高いときは広く、また低いときは狭くなる
ように制御する制御回路を設けてなることを特徴とする
が、以下図示の実施例を参照しながらこれを詳細に説明
する。
Structure of the Invention The present invention relates to a synchronous (MSK orthogonal synchronous detection circuit composed of a general transmission wave regeneration circuit, a data regeneration circuit, and a clock regeneration circuit), which is used in a phase locked loop for carrier wave regeneration of the synchronous carrier wave regeneration circuit. The feature is that a control circuit is provided to control the bandwidth of the loop filter so that it is wide when the received electric field is high and narrow when the received electric field is low, and this will be explained in detail below with reference to the illustrated embodiment. Explain.

発明の実施例 第1図は本発明の一実施例を示すブロック図で、1はM
SK直交同期検波回路である。この回路]は同期搬送波
再生回路2、データ再生回路3、クロック再生回路4か
ら構成される。同期(般送波再生回路2は、入力MSK
1SK1低送波同期した再生1般送波(参照搬送波)を
得るための位相同期ル−プPLLを有する。このP L
 Lは位相比較器11.12、ローパスフィルタ(LP
F)14..15、位相比較器16 (排他的論理和回
路)、位相比較器(排他的論理和回路)17、ループフ
ィルタ18a、L8b、電圧制御発振器(VCO)19
を含み、90°移相器13を通して位相比較器11には
位相比較器12と90°位相のずれた再生)般送波を与
える。こればL P F 1.4の出力に正弦同期検波
出力sinを、またLPF15の出力に余弦同期検波出
力cosを得るためである。これらの出力sin、 c
osは例えばピッ1−レートが16Kbpsであればそ
れぞれ3Kbpsずつの成分を有する。
Embodiment of the invention FIG. 1 is a block diagram showing an embodiment of the invention, in which 1 represents M.
This is an SK quadrature synchronous detection circuit. This circuit] is composed of a synchronous carrier recovery circuit 2, a data recovery circuit 3, and a clock recovery circuit 4. Synchronization (general transmission wave regeneration circuit 2 has input MSK
1SK1 low transmission It has a phase-locked loop PLL for obtaining a synchronized reproduction general transmission wave (reference carrier wave). This P L
L is phase comparator 11.12, low pass filter (LP
F)14. .. 15, phase comparator 16 (exclusive OR circuit), phase comparator (exclusive OR circuit) 17, loop filter 18a, L8b, voltage controlled oscillator (VCO) 19
, and provides the phase comparator 11 with a general transmission wave that is 90 degrees out of phase with the phase comparator 12 through a 90 degree phase shifter 13 . This is to obtain the sine synchronous detection output sin at the output of L P F 1.4 and the cosine synchronous detection output cos at the output of the LPF 15. These outputs sin, c
For example, if the P1-rate is 16 Kbps, the os has components of 3 Kbps each.

このように90°位相のずれた2つの同期検波出力をデ
ータ再生回路3へ入力することで復調出力が督られる点
は、前述の特開昭55−73164号公報等に詳述され
ているのでここでは省略するが、位相同期ループとして
はこの2つの信号を位相検波器16で乗積合成して2逓
倍された正弦波信号sin 2θを作成し、これを位相
比較器17に入力するa・要がある。この位相比較器1
7の他方の入力はクロック再生回路4からのクロックC
K2である。このクロックCK2は位相比較器16の出
力と同期した同じ周波数の余弦波である。
The fact that the demodulated output can be obtained by inputting the two synchronous detection outputs with a phase difference of 90 degrees to the data reproducing circuit 3 is detailed in the aforementioned Japanese Patent Laid-Open No. 55-73164, etc. Although omitted here, as a phase-locked loop, these two signals are multiplied and combined by the phase detector 16 to create a doubled sine wave signal sin 2θ, which is input to the phase comparator 17. There is a point. This phase comparator 1
The other input of 7 is the clock C from the clock recovery circuit 4.
It is K2. This clock CK2 is a cosine wave of the same frequency synchronized with the output of the phase comparator 16.

このクロックCK2を用いる理由は、位相比較器16の
出力に含まれる変調成分を除去し、(般送波の位相誤差
成分だけをループフィルタ18aまたは]8bに入力す
るためである。クロック再生回路4しまデータ再生用の
クロックCKIも作成する。
The reason for using this clock CK2 is to remove the modulation component included in the output of the phase comparator 16 and input only the phase error component of the general transmission wave to the loop filter 18a or]8b.The clock regeneration circuit 4 A clock CKI for stripe data reproduction is also created.

ループフィルタ]8aまたは1.8 bは上記の誤差成
分を帯域制限してVCO19に帰還する。20はこれら
のループフィルタ18a、1.8bのいずれかを電界強
度に応じて切換えるスイッチで・この部分が本発明に係
わる。
Loop filter] 8a or 1.8b band-limits the above error component and feeds it back to the VCO 19. 20 is a switch for switching either of these loop filters 18a, 1.8b according to the electric field strength; this part is related to the present invention.

即ち、ループフィルタ+−82は帯域が広く、高電界時
に使用される。これに対しループフィルタ18bは帯域
が狭く、低電界時に使用される。受信電界の高、低に応
じた切換信号CT Lは電界強度検出回路5から得る。
That is, the loop filter +-82 has a wide band and is used when the electric field is high. On the other hand, the loop filter 18b has a narrow band and is used when the electric field is low. A switching signal CT L corresponding to the high or low received electric field is obtained from the electric field strength detection circuit 5.

この回路5は例えば第2図のキャリアスケルチ検出回路
を利用できる。同図は受信機の概略を示すもので、31
はアンテナ、32は例えば400MHz帯の信号を増幅
する高周波増幅器、33ばミキサ、34は中心周波数4
55KHzの中間周波フィルタ、35はリミッタ付きの
中間周波増幅器である。
This circuit 5 can utilize, for example, the carrier squelch detection circuit shown in FIG. The figure shows the outline of the receiver, 31
is an antenna, 32 is a high frequency amplifier that amplifies a signal in the 400 MHz band, 33 is a mixer, and 34 is a center frequency 4.
A 55 KHz intermediate frequency filter, and 35 an intermediate frequency amplifier with a limiter.

第3図はループフィルタ18a、]8bによる誤り率を
対比して示す静特性である。帯域が広いループフィルタ
1.8 aを用いた特性A(破線)はループフィルタ1
8bを用いた特性B(実線)より悪い。しかし、帯域が
広いので応答性は良く、誤り率が良い高電界時にはルー
プフィルタ18aを用いて応答性を高め、変化の急激な
フェージングに追従できるようQこする。これに対し誤
り率が悪化する低電界時には帯域の狭いループフィルタ
181)を用いて回線品質の劣化を防止する。かかるル
ープフィルタ18a、18bの切換えレベルは楯ね誤り
率で10〜10 の範囲が1つの目安となる。1点鎖線
がその一例で、10−4に設定しである。但し、ループ
フィルタを3種類以上用いる場合は、これらの切換えレ
ベルは多段に設定される。
FIG. 3 shows static characteristics comparing the error rates of the loop filters 18a and 8b. Characteristic A (dashed line) using loop filter 1.8a with a wide band is loop filter 1.
It is worse than characteristic B (solid line) using 8b. However, since the band is wide, the response is good, and when the error rate is high and the electric field is high, the loop filter 18a is used to increase the response, and Q is applied so that it can follow rapidly changing fading. On the other hand, when the electric field is low and the error rate worsens, a loop filter 181) with a narrow band is used to prevent deterioration of line quality. One guideline for the switching levels of the loop filters 18a and 18b is a shield error rate in the range of 10 to 10. The one-dot chain line is an example of this, and is set to 10-4. However, when three or more types of loop filters are used, these switching levels are set in multiple stages.

第4図のA’ 、B′は動特性で、Cは対比するために
示した第3図の静特性(切換えを含む総合特性)である
。この直交同期検波方式の動特性A′B′は一定の誤り
率で飽和し、それ以上は受信人カレーヘルが−上昇して
も良くならない。これは急激なレベル変動を伴なうフェ
ージングによって第2図の中間周波アンプ35でAM−
PM変換が起こり、位相誤差が生ずるからである。フェ
ージングの周波数を40 Hz 、 1iil送波の周
波数を400MH2とすると、動特性は約10 の誤り
率あたりで飽和する。従ってその前の段階でループフィ
ルタを181)から182に切換えて帯域を広くしてお
くと特性はフィルタが181)のそれB′からA′の如
くなり、10 より良好な値まで延びる。従ってループ
フィルタ18a、18bの切換えで誤り率の静特性は若
干悪くなるが、動特性は改善され、これが本発明の第2
の利点である。
A' and B' in FIG. 4 are dynamic characteristics, and C is a static characteristic (total characteristics including switching) shown in FIG. 3 for comparison. The dynamic characteristic A'B' of this orthogonal synchronous detection method is saturated at a certain error rate, and beyond this point it does not improve even if the receiver's curry health increases. This is due to fading accompanied by rapid level fluctuations, which causes AM-
This is because PM conversion occurs and a phase error occurs. When the fading frequency is 40 Hz and the 1iI transmission frequency is 400 MH2, the dynamic characteristics are saturated at an error rate of about 10. Therefore, if the loop filter is switched from 181) to 182 in the previous stage to widen the band, the characteristics will change from B' to A' of the filter 181), extending to a value better than 10. Therefore, by switching the loop filters 18a and 18b, the static characteristics of the error rate deteriorate slightly, but the dynamic characteristics are improved, which is the second aspect of the present invention.
This is an advantage.

第5図はループフィルタ1.8a、18bの具体例であ
る。本例では抵抗R1,R2およびコンデンサCを両フ
ィルタで共用し、そして抵抗R3を使って(スイッチ2
0オフ)広帯域のループフィルタ18aを構成し、また
該抵抗R3をバイパスして(スイッチ20オン)狭帯域
のループフィルタ1.8 bを構成する。各要素の定数
は例えばR1−10にΩ、R2=IKΩ、R3=100
Ω、C−1μFである。
FIG. 5 shows a concrete example of the loop filters 1.8a and 18b. In this example, resistors R1, R2 and capacitor C are shared by both filters, and resistor R3 is used (switch 2
0 off) constitutes a wide band loop filter 18a, and also bypasses the resistor R3 (switch 20 on) to configure a narrow band loop filter 1.8b. The constants of each element are, for example, R1-10 = Ω, R2 = IKΩ, R3 = 100
Ω, C-1 μF.

発明の効果 以上述べたように本発明によれば、MSK信号を復調す
る直交同期検波回路の搬送波再生用位相同期ループのル
ープフィルタの帯域を高電界時には広く、低電界時には
狭くするように制御するので、追随性がよくなり、誤り
率の動特性も改善され、ビル街等を通過しながら使用す
る自動車電話のデジタル化に一層実用性を持たせること
ができる。
Effects of the Invention As described above, according to the present invention, the band of the loop filter of the phase-locked loop for carrier wave recovery of the quadrature coherent detection circuit that demodulates the MSK signal is controlled to be wide when the electric field is high and narrow when the electric field is low. Therefore, the followability is improved, the dynamic characteristics of the error rate are also improved, and it is possible to make the digitization of a car phone that is used while passing through a built-up area even more practical.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図、第2図は
受信機の一部を示すブロック図、第3図は本発明のMS
K直交同期検波回路の静特性図、第4図はその動特性図
、第5図はループフィルタの具体例を示す回路図である
。 図中、1はMSK直交同期検波回路、2は同期1駁送波
再生回路、3はデータ再生回路、4はクロック再生回路
、5は電界強度検出回路、P L Lは位相同期ループ
、18a、18bはループフィルタ、20はその切換ス
イッチである。 出願人 富士通株式会社 代理人弁理士 青 柳 稔
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a part of a receiver, and FIG. 3 is a block diagram showing an embodiment of the present invention.
FIG. 4 is a static characteristic diagram of the K-quadrature synchronous detection circuit, FIG. 4 is a dynamic characteristic diagram thereof, and FIG. 5 is a circuit diagram showing a specific example of a loop filter. In the figure, 1 is an MSK quadrature synchronous detection circuit, 2 is a synchronous 1 forwarding regeneration circuit, 3 is a data regeneration circuit, 4 is a clock regeneration circuit, 5 is a field strength detection circuit, PLL is a phase locked loop, 18a, 18b is a loop filter, and 20 is a changeover switch thereof. Applicant Fujitsu Limited Representative Patent Attorney Minoru Aoyagi

Claims (1)

【特許請求の範囲】[Claims] 同期1般送波再生回路、データ再生回路、クロ、ツタ再
生回路により構成されるMSK直交同期検波回路におい
て、該同期IM送波再生回路の搬送波再生用位相同期ル
ープに用いられるループフィルタの帯域幅を、受信電界
が高いときは広く、また低いときは狭くなるように制御
する制御回路を設けてなることを特徴とするMSK直交
同期検波回路。
In an MSK quadrature synchronous detection circuit composed of a synchronous 1 general transmission regeneration circuit, a data regeneration circuit, and a black and vine regeneration circuit, the bandwidth of the loop filter used in the phase-locked loop for carrier wave regeneration of the synchronous IM transmission regeneration circuit. An MSK orthogonal synchronous detection circuit comprising a control circuit that controls the received electric field to be wide when the received electric field is high and narrow when the received electric field is low.
JP22737183A 1983-12-01 1983-12-01 Msk rectangular synchronization detecting circuit Pending JPS60119156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22737183A JPS60119156A (en) 1983-12-01 1983-12-01 Msk rectangular synchronization detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22737183A JPS60119156A (en) 1983-12-01 1983-12-01 Msk rectangular synchronization detecting circuit

Publications (1)

Publication Number Publication Date
JPS60119156A true JPS60119156A (en) 1985-06-26

Family

ID=16859752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22737183A Pending JPS60119156A (en) 1983-12-01 1983-12-01 Msk rectangular synchronization detecting circuit

Country Status (1)

Country Link
JP (1) JPS60119156A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6330049A (en) * 1986-07-23 1988-02-08 Hitachi Ltd MSK demodulation circuit
JPH0314844U (en) * 1989-06-27 1991-02-14
JPH04172840A (en) * 1990-11-07 1992-06-19 Sharp Corp Demodulator
JPH06216655A (en) * 1993-01-13 1994-08-05 Nec Corp Demodulation circuit
WO2016021466A1 (en) * 2014-08-07 2016-02-11 株式会社 東芝 Wireless communication apparatus and integrated circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6330049A (en) * 1986-07-23 1988-02-08 Hitachi Ltd MSK demodulation circuit
JPH0314844U (en) * 1989-06-27 1991-02-14
JPH04172840A (en) * 1990-11-07 1992-06-19 Sharp Corp Demodulator
JPH06216655A (en) * 1993-01-13 1994-08-05 Nec Corp Demodulation circuit
WO2016021466A1 (en) * 2014-08-07 2016-02-11 株式会社 東芝 Wireless communication apparatus and integrated circuit
JP2016039503A (en) * 2014-08-07 2016-03-22 株式会社東芝 Radio communication device and integrated circuit
US9954702B2 (en) 2014-08-07 2018-04-24 Kabushiki Kaisha Toshiba Radio communication device and radio communication method

Similar Documents

Publication Publication Date Title
JP3478508B2 (en) Wireless communication device
JPS5881363A (en) Direct modulation frequency modulated data receiver
JPS60119156A (en) Msk rectangular synchronization detecting circuit
JPH0542863B2 (en)
JP4717309B2 (en) Improvements in multiphase receivers, or improvements related to multiphase receivers
JP2558265B2 (en) Improvement on FM demodulator
JPS6330049A (en) MSK demodulation circuit
JP3396047B2 (en) Receiver
JP3274203B2 (en) Clock recovery circuit of MSK demodulator
JP2682363B2 (en) Spread spectrum modulation and / or demodulation device
JP3074293B2 (en) Receiving machine
JP2591398B2 (en) Spread spectrum wireless communication equipment
JP3265585B2 (en) AFC circuit
JP2842349B2 (en) Demodulator
JP2689806B2 (en) Synchronous spread spectrum modulated wave demodulator
JP2692440B2 (en) FSK data reception method
JPS6347180B2 (en)
JPS6074751A (en) Variable gain carrier regeneration circuit
JP2003188744A (en) Cfm-ssb radio equipment
JPH057227A (en) MSK receiver
JPS6198054A (en) Phaselock droop bandwidth control method
JPH03243024A (en) Diversity system based upon composite modulated wave
JPH04113731A (en) Multi-filter delay lock loop
JPS60219856A (en) Demodulation circuit for digital modulation wave
JPS60218952A (en) Automatic frequency control system