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JPS6011649Y2 - Case for mounting LSI chip - Google Patents

Case for mounting LSI chip

Info

Publication number
JPS6011649Y2
JPS6011649Y2 JP11853379U JP11853379U JPS6011649Y2 JP S6011649 Y2 JPS6011649 Y2 JP S6011649Y2 JP 11853379 U JP11853379 U JP 11853379U JP 11853379 U JP11853379 U JP 11853379U JP S6011649 Y2 JPS6011649 Y2 JP S6011649Y2
Authority
JP
Japan
Prior art keywords
case
terminal
connection
terminals
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11853379U
Other languages
Japanese (ja)
Other versions
JPS5636153U (en
Inventor
幸春 吉岡
義正 金子
Original Assignee
日本電信電話株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電信電話株式会社 filed Critical 日本電信電話株式会社
Priority to JP11853379U priority Critical patent/JPS6011649Y2/en
Publication of JPS5636153U publication Critical patent/JPS5636153U/ja
Application granted granted Critical
Publication of JPS6011649Y2 publication Critical patent/JPS6011649Y2/en
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案は、小型にして空間に突出した端子を有しない多
端子のLSIチップ搭載用ケースに関するものである。
[Detailed Description of the Invention] The present invention relates to a multi-terminal LSI chip mounting case that is compact and does not have any terminals protruding into space.

従来のこの種のケースは第1図に示すような構造である
A conventional case of this type has a structure as shown in FIG.

Aは平面図、Bは側面図、Cは裏面図を示す。A shows a plan view, B shows a side view, and C shows a back view.

接続用端子1は空間に突出た構造ではなく膜状であり、
隣接端子と1.02wrL又はl−27TIrIRの等
間隔を保ち、ケース裏面周辺部に配列されている。
The connection terminal 1 does not have a structure that protrudes into space, but has a membrane shape,
They are arranged on the periphery of the back surface of the case, keeping an equal distance of 1.02wrL or 1-27TIrIR from adjacent terminals.

この端子部は裏面から側面を通り、ケース内を端子取出
し部2まで延び、キャビティ3内のLSIチップに接続
される。
This terminal section passes from the back surface to the side surface, extends inside the case to the terminal extraction section 2, and is connected to the LSI chip within the cavity 3.

上記構成では、LSIの端子数増加に伴いケースの外形
も大きくなり、実装の高密度化を図ることが困難になる
こと、また、このケースを直接ケースとは異なった熱膨
張係数を有する基板にはんだ付は接続した場合、ケース
搭載基板を囲む環境温度の変化によるケース及び基板の
膨張差或いは収縮差からはんだ接続部にせん断応力が加
わる。
In the above configuration, as the number of LSI terminals increases, the outer size of the case also increases, making it difficult to achieve high-density packaging. When a connection is made by soldering, shear stress is applied to the soldered joint due to a difference in expansion or contraction between the case and the board due to changes in the environmental temperature surrounding the case-mounted board.

この応力は、ケースが大形化するに伴って次第に大きく
なる。
This stress gradually increases as the case becomes larger.

環境温度変化の繰り返しにより、せん断応力は接続部の
はんだに疲労をもたらし、多端子の大形ケースにおいて
は、接続の信頼性が低下するという欠点があった。
Due to repeated environmental temperature changes, shear stress causes fatigue in the solder at the connection part, and in large cases with multiple terminals, there is a drawback that the reliability of the connection decreases.

本考案は、ケース裏面の従来の接続用端子の内側に新た
に補助端子を設けるとともにケース表面にそれと対をな
すチェック用端子を設け、それらをスルーホールで結ん
だことを特徴とし、その目的は、LSIの多端子化に対
応する高密度実装を可能とし、かつ、各々のはんだ接続
部に加わる応力を低減させ、多端子の大形ケースにおけ
る接続の信頼性向上を図り、また、接続の目視検査を可
能とするLSIチップ搭載用ケースを提供することにあ
る。
The present invention is characterized in that a new auxiliary terminal is provided inside the conventional connection terminal on the back of the case, and a matching check terminal is provided on the surface of the case, and these are connected with a through hole. , which enables high-density mounting to accommodate the increasing number of terminals in LSIs, reduces the stress applied to each solder joint, improves the reliability of connections in large cases with multiple terminals, and improves visual inspection of connections. An object of the present invention is to provide a case for mounting an LSI chip that enables inspection.

本考案を図面に基づいて詳細に説明する。The present invention will be explained in detail based on the drawings.

第2図は本考案のLSIチップ搭載用ケースであり、A
は平面図、Bは側面図、Cは裏面図を示す。
Figure 2 shows the case for mounting the LSI chip of the present invention.
shows a plan view, B shows a side view, and C shows a back view.

1,2.3は従来と同一のものを示す。1は接続用端子
であり、これと対をなすケース表面上の接続チェック用
端子4とスルーホール5で結ばれている。
1, 2.3 indicate the same as the conventional one. Reference numeral 1 denotes a connection terminal, which is connected to a mating connection check terminal 4 on the surface of the case through a through hole 5.

スルーホール5はケース内を貫く円筒状の穴で、その表
面ははんだとのぬれ性の良好な導電体で形成されている
The through hole 5 is a cylindrical hole that penetrates the inside of the case, and its surface is made of a conductive material that has good wettability with solder.

6は補助端子であり、同様にスルーホールでケース表面
の接続チェック用端子に結ばれる。
Reference numeral 6 denotes an auxiliary terminal, which is similarly connected to a connection check terminal on the surface of the case through a through hole.

上記の構造をしているため、補助端子をLSIの電極と
することにより、ケース面積を従来のものと比較してほ
ぼ1/3に小さくすることができ、実装の高密度化が図
れる。
With the above structure, by using the auxiliary terminals as LSI electrodes, the case area can be reduced to approximately 1/3 compared to the conventional case, and high density packaging can be achieved.

第3図に端子数変化に対する従来型ケースのケース面積
と補助端子付きケースのケース面積比較を示す。
Fig. 3 shows a comparison of the case area of the conventional case and the case area of the case with auxiliary terminals as the number of terminals changes.

実線が従来型であり、破線が本考案のケースである。The solid line is the conventional case, and the broken line is the case of the present invention.

また、ケースを基板に搭載する場合、基板端子部には予
備はんだが塗布されており、その上にケースを載せて加
熱し、はんだを溶融し接続する。
Further, when mounting the case on a board, preliminary solder is applied to the board terminals, and the case is placed on top of the pre-solder and heated to melt the solder and connect.

接続端子部にスルーホールがおいている構造では、溶融
したはんだはその一部がスルーホール内に引き込まれる
ため、ケースの上部からチェック用端子部をみて、はん
だを確認するだけで容易に基板との接続検査が可能とな
る。
If the connection terminal has a through-hole structure, a portion of the molten solder will be drawn into the through-hole, so you can easily check whether the solder is connected to the board or not by looking at the check terminal from the top of the case. connection inspection becomes possible.

更に、補助端子を有する構造のため、熱膨張係数の異な
るケースと基板を接続した時、環境温度の変化に伴い、
はんだ接続部に生ずる端子当りの応力を低減させること
ができる。
Furthermore, since the structure has auxiliary terminals, when connecting a case and a board with different coefficients of thermal expansion, the temperature will change due to changes in the environmental temperature.
It is possible to reduce the stress per terminal that occurs in the solder connection portion.

これにより、環境温度の繰り返し変化によるケースと基
板の収縮と膨張の繰り返しからはんだ接続部に生ずるは
んだ疲労を抑え、接続信頼性の向上を図ることができる
As a result, it is possible to suppress solder fatigue that occurs in the soldered joint due to repeated contraction and expansion of the case and the board due to repeated changes in environmental temperature, and to improve connection reliability.

以上説明したように、本考案は接続用端子を周辺部と更
にその内側に設けて複数列化する構造であるから、小形
ケースで比較的多数の端子をとることができ、実装密度
を高めることができる。
As explained above, since the present invention has a structure in which connection terminals are provided in multiple rows at the periphery and further inside the periphery, a relatively large number of terminals can be provided in a small case, increasing the packaging density. Can be done.

また、ケースと基板との熱膨張係数差から、環境温度の
繰り返し変化によってはんだ接続部に生ずる応力も端子
当りの応力が低減されてはんだ疲労を抑えるため、接続
信頼性を向上させることができる。
Furthermore, due to the difference in thermal expansion coefficient between the case and the board, the stress generated in the solder connection due to repeated changes in environmental temperature is reduced, and the stress per terminal is reduced, suppressing solder fatigue, thereby improving connection reliability.

更に、接続用端子と補助端子及び接続チェック用端子の
間をスルーホールで接続することにより、ケースと基板
との接続の検査が目視ででき、容易になるという利点が
ある。
Furthermore, by connecting the connection terminal, the auxiliary terminal, and the connection check terminal with through holes, there is an advantage that the connection between the case and the board can be visually inspected and becomes easy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A、B、Cは従来のLSIチップ搭載用ケースの
平面図、a−a’で切り取った断面を含む側面図、及び
裏面図、第2図A、 B、 Cは本考案のケースを示す
平面図、b−b’で切り取った断面を含む側面図、及び
裏面図、第3図は端子数とケース面積の関係を示す特性
図である。 1・・・・・・接続用端子、2・・・・・・端子取り出
し部、3・・・・・・キャビティ、4・・曲接続チェッ
ク用端子、5・・・・・・スルーホール、6・・・・・
・補助端子。
Figures 1A, B, and C are a plan view, a side view including a cross section taken along a-a', and a back view of a conventional LSI chip mounting case, and Figures 2A, B, and C are the case of the present invention. , a side view including a cross section taken along line bb', a back view, and FIG. 3 are characteristic diagrams showing the relationship between the number of terminals and the case area. 1... Connection terminal, 2... Terminal extraction part, 3... Cavity, 4... Terminal for checking connection, 5... Through hole, 6...
・Auxiliary terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の部品を搭載する基板との接続用として空間に突出
した接続用端子を有しないLSIチップ搭載用ケースに
おいて、基板との接続を行なうためにはんだとのぬれ性
が良好な膜状導電体で構威された島状の接続端子を矩形
ケース裏面の周辺部に加えてその内側に設けて接続部を
複数列で構威し、かつ、該ケース表面には前記裏面に設
けた複数列の接続用端子と同一位置関係を有するチェッ
ク用端子を設け、その表裏l対で形成される端子間はス
ルーホールで結合され、かつ該スルーホールの端面がは
んだとのぬれの良い導電体で形成されていることを特徴
とするLSIチップ搭載用ケース。
In an LSI chip mounting case that does not have connection terminals protruding into space for connection to a board on which multiple components are mounted, a film-like conductor with good wettability with solder is used to connect to the board. In addition to the periphery of the back surface of the rectangular case, island-shaped connecting terminals are provided inside the rectangular case to form multiple rows of connection terminals, and the surface of the case has multiple rows of connection terminals provided on the back surface of the rectangular case. A check terminal having the same positional relationship as the terminal is provided, and the front and back terminals are connected by a through hole, and the end surface of the through hole is made of a conductive material that is easily wetted with solder. A case for mounting an LSI chip.
JP11853379U 1979-08-30 1979-08-30 Case for mounting LSI chip Expired JPS6011649Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11853379U JPS6011649Y2 (en) 1979-08-30 1979-08-30 Case for mounting LSI chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11853379U JPS6011649Y2 (en) 1979-08-30 1979-08-30 Case for mounting LSI chip

Publications (2)

Publication Number Publication Date
JPS5636153U JPS5636153U (en) 1981-04-07
JPS6011649Y2 true JPS6011649Y2 (en) 1985-04-17

Family

ID=29350745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11853379U Expired JPS6011649Y2 (en) 1979-08-30 1979-08-30 Case for mounting LSI chip

Country Status (1)

Country Link
JP (1) JPS6011649Y2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58144874U (en) * 1982-03-26 1983-09-29 松下電器産業株式会社 Fixed support for lead wire
JPS5911449U (en) * 1982-07-13 1984-01-24 富士通株式会社 semiconductor equipment

Also Published As

Publication number Publication date
JPS5636153U (en) 1981-04-07

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