JPS60100483A - photovoltaic power generator - Google Patents
photovoltaic power generatorInfo
- Publication number
- JPS60100483A JPS60100483A JP59074256A JP7425684A JPS60100483A JP S60100483 A JPS60100483 A JP S60100483A JP 59074256 A JP59074256 A JP 59074256A JP 7425684 A JP7425684 A JP 7425684A JP S60100483 A JPS60100483 A JP S60100483A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- substrate
- photoelectric conversion
- semiconductor
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 57
- 239000000758 substrate Substances 0.000 claims description 39
- 238000006243 chemical reaction Methods 0.000 claims description 29
- 230000002265 prevention Effects 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 3
- 229910052736 halogen Inorganic materials 0.000 claims description 3
- 150000002367 halogens Chemical class 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000001020 plasma etching Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 2
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 2
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- AFCARXCZXQIEQB-UHFFFAOYSA-N N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CCNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 AFCARXCZXQIEQB-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000113 methacrylic resin Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
- H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
- H10F19/31—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は柔らかいまたは固い絶縁基板上に第1の電極と
、その上の光起電力を発生する水素またはハロゲン元素
が添加された非単結晶半導体と、その上の第2の電極と
を有する半導体装置を有し、さらに逆流防止ダイオード
をこの半導体と同一基板上に同一半導体材料を用いて設
けた光電変換装置およびその作製方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a first electrode on a soft or hard insulating substrate, a non-single crystal semiconductor doped with hydrogen or a halogen element that generates photovoltaic force, and a first electrode on the first electrode. The present invention relates to a photoelectric conversion device including a semiconductor device having two electrodes and a backflow prevention diode provided on the same substrate as the semiconductor using the same semiconductor material, and a method for manufacturing the same.
本発明は絶縁基板上に複数の光起電力を発生ずる半導体
装置を設け、さらにその一方の出力に連結して光電変換
装置より電流が流入しやすくまたこの光電変換装置に電
流が流れに<<シた電気的な向きを逆にした逆流防止ダ
イオードを設けたことを特徴とする。The present invention provides a semiconductor device that generates a plurality of photovoltaic forces on an insulating substrate, and further connects the output of one of the semiconductor devices so that current flows more easily than the photoelectric conversion device, and the current flows into the photoelectric conversion device. It is characterized by providing a backflow prevention diode whose electrical direction is reversed.
本発明は逆流防止用ダイオードを構成する半導体および
光起電力を発生ずる半導体の側周辺での逆方向リークを
少なくするため、側周辺を台形のテーパ状またはベヘル
状にしたこと、およびかかる構造にするため半導体IN
のプラズマエソチェ程において一方の電極を上下、左右
、前後に振動させながらエツチングをさせることを特徴
としている。In order to reduce reverse leakage around the side of the semiconductor constituting the backflow prevention diode and the semiconductor that generates photovoltaic force, the present invention has a trapezoidal taper shape or a bevel shape around the side, and this structure. Semiconductor IN
During the plasma etching process, one of the electrodes is vibrated up and down, left and right, and back and forth for etching.
即ち、光電変換装置をより安価でありかつ高信頼性のシ
ステムとして構成させるには、(1)第1および第2の
電極、
(2)光起電力を発生させる半導体装置(3)装置の機
械的な設置のための担体または基板、
(4)外部と電気的に連結するための端子、(5)端子
の基板への種々の機械的密着性、(6)2つの電極の一
方が光透過性であること、(7)第1、第2の電極およ
び半導体層が機械的な歪に対して保障されること、
(8)半導体層が高効率の光電変換効率を有すること、
が必要である。That is, in order to configure a photoelectric conversion device as a less expensive and highly reliable system, it is necessary to (1) first and second electrodes, (2) a semiconductor device that generates photovoltaic force, and (3) the machinery of the device. carrier or substrate for physical installation, (4) terminal for electrical connection with the outside, (5) various mechanical adhesion properties of the terminal to the substrate, (6) one of the two electrodes that transmits light. (7) the first and second electrodes and the semiconductor layer are guaranteed against mechanical strain; and (8) the semiconductor layer has high photoelectric conversion efficiency. be.
加えて、光電変換装置として、
(9)半導体層の製造価格が安価であること、(10)
半導体層を用いた変換装置が製作しやすく構造が単純で
あること、
(11)半導体層に比べてこの付属設備が高価にならな
いこと、
(12)変換装置の取扱が容易であること、(13)長
期の信頼性が高いこと、
が重要である。In addition, as a photoelectric conversion device, (9) the manufacturing cost of the semiconductor layer is low; (10)
A conversion device using a semiconductor layer is easy to manufacture and has a simple structure; (11) this accessory equipment is not expensive compared to a semiconductor layer; (12) the conversion device is easy to handle; (13) ) High long-term reliability is important.
しかしこれまでの光電変換装置は光起電力を発注させる
半導体自体が高(+Iliであることもあって、その付
属設備を含めたシステムとしての思考がまったくなされ
ていなかった。However, in conventional photoelectric conversion devices, the semiconductor itself that generates photovoltaic power has a high (+Ili) value, so there has been no consideration of the system as a system including its auxiliary equipment.
本発明はかかる種々の要件を高たずため、透明電極と薄
膜状の水素Jミたはハロゲン元素が添加された非単結晶
半導体とを概略同一形状を有せしめ、その製造のしやす
さ、高効率化を追求したものである。In order to overcome these various requirements, the present invention makes the transparent electrode and the thin film-like non-single crystal semiconductor doped with hydrogen or a halogen element have approximately the same shape, thereby facilitating manufacturing thereof. This is a pursuit of high efficiency.
従来、例えば現在のCZ (チョクラルスキー)スライ
スを用いた太陽電池を作製せんとするとl0KW/年で
あり、シリコン原料が80001−77年を仮定した時
、1讐あたり4160円かかってしまう。しかもその内
訳は光起電力を発注させるセル部にて74%即ち307
0円のコスI・があがる。さらにその化モジュール化す
る設備等はl090111 (26%)がかかる。Conventionally, for example, if you try to manufacture a solar cell using the current CZ (Czochralski) slice, it costs 10 KW/year, and assuming that the silicon raw material is 80,001-77 years old, it costs 4,160 yen per unit. Furthermore, the breakdown is 74%, or 307%, in the cell section that orders photovoltaic power.
The cost of 0 yen increases. Furthermore, equipment for modularization will cost 1090111 (26%).
しかしこの価格を4160円/Wよりその1 /100
の40円/Wとするには多くの困難がある。例えばセル
部に用いられるウェハは機械強度を有する基板としての
正確を有している。そのためセルa11を半導体で作ら
んとした時、単にセル部に用いるシリコン等の半導体の
厚さを1〜2μとすると必ず基板を必要とする。加えて
基板より外部引出しリードを接続する端子も直接半導体
層に接着できない。However, this price is 1/100 yen from 4160 yen/W.
There are many difficulties in setting the price to 40 yen/W. For example, the wafer used for the cell part has the precision of a substrate with mechanical strength. Therefore, when the cell a11 is made of a semiconductor, if the thickness of the semiconductor such as silicon used for the cell portion is 1 to 2 μm, a substrate is always required. In addition, terminals for connecting external leads from the substrate cannot be directly bonded to the semiconductor layer.
このため単に半導体層を3070円/Wより1 /IO
Qの30円/Wになし得たとしても、その結果逆にモジ
ュール化するのにこれまで以上の費用がかかってしまう
。For this reason, the semiconductor layer is simply sold at 1/IO from 3070 yen/W.
Even if Q could be reduced to 30 yen/W, the result would be that it would cost more than ever to make it modular.
本発明はかかる欠点を除去するため、従来の太陽電池を
さらに大きな系で眺め、そこでの必要な要件を考察した
。その結果、従来、シリコンスライスを複数個集合する
損金さらに一部の太陽電池が破損しても、その太陽電池
がショートして逆流し電力を損失してしまうことを防ぐ
逆流防止ダイオード等が必要とされるが、本発明ばかが
るシステムとしての損金を基板としてその上側に光起電
力を発生させる半導体層と同じ半導体層をもって逆流防
止グイオートとし、加えてこの基板を半導体層の機械歪
を保障する基板とするに加えて、外部引出し端をも取り
つけ、またこの基板上に正、負用の少なくとも2本のパ
スラインを設け、このパスラインを利用して複数個がマ
トリックス化された半導体層をマトリックス化して系全
体を一本化したことを特徴としている。In order to eliminate such drawbacks, the present invention looked at conventional solar cells in a larger system and considered the necessary requirements there. As a result, in the past, there was no need to assemble multiple silicon slices, and even if some solar cells were damaged, backflow prevention diodes were required to prevent the solar cells from shorting out and causing loss of power. However, in the present invention, as a system, the substrate is used as a backflow prevention guide with the same semiconductor layer as the semiconductor layer that generates photovoltaic force on the upper side, and in addition, this substrate is used to ensure mechanical distortion of the semiconductor layer. In addition to the substrate, an external lead-out end is also attached, and at least two pass lines for positive and negative are provided on this substrate, and a plurality of semiconductor layers arranged in a matrix are formed using these pass lines. The feature is that the entire system is integrated into a matrix.
さらに本発明はかかる低価格製造用にエツチングまたは
フォトエツチングまたは選択性印刷を用い、3〜4回の
マスク工程で完了するようにしたことも他の大きな特徴
としている。特に半導体層と第1または第2の電極の一
方の透明電極とを概略同一形状とするごとにより製造工
程を簡略化し、また半導体層の側面にぞって基板表面よ
り上方に離れて設けられた電41Jλより基板に至るリ
ードを設けたこと等の特徴をイ1゛する。Another major feature of the present invention is that it uses etching, photoetching, or selective printing for such low-cost manufacturing, and can be completed in three to four mask steps. In particular, the manufacturing process is simplified by making the semiconductor layer and the transparent electrode of one of the first or second electrodes approximately the same shape, and the manufacturing process is simplified by making the semiconductor layer and the transparent electrode of one of the first or second electrodes have approximately the same shape. Features include the provision of a lead from the electric wire 41Jλ to the board.
以下に図面に従って本発明を説明する。The present invention will be explained below with reference to the drawings.
第1図は本発明のづ匈換装置の縦断面図を用いてその作
製工程を示したものである。FIG. 1 shows the manufacturing process of the converter according to the present invention using longitudinal cross-sectional views.
図面において(A)は絶縁基板(1)上に導電性電極(
2)を選択的に形成している。フォトエンチング工程を
用いるならば■枚目のフォI・マスクを使用する。しか
し選択プラズマエッチ、または印刷法を用いて簡略化し
てコストの低減を図ってもよい。In the drawing, (A) shows a conductive electrode (
2) is selectively formed. If a photo-etching process is used, the ■th photo I mask is used. However, selective plasma etching or printing may be used to simplify and reduce costs.
基板材料としてはメタクリル樹脂、エポキシ樹脂特にガ
ラス−エポキシ複合材料(通称ガラエボ)、弗素樹脂、
ポリカーボネイト、ガラス、アルミナその他のセラミッ
ク、セトモノ等を固い基板として用いた。可曲性の柔ら
かな基板としてはポリイミド、ポリエステル、シリコー
ン樹脂等を用いた。Substrate materials include methacrylic resin, epoxy resin, especially glass-epoxy composite material (commonly known as Garaebo), fluororesin,
Polycarbonate, glass, alumina and other ceramics, and solid materials were used as the hard substrate. Polyimide, polyester, silicone resin, etc. were used as the flexible and soft substrate.
第1の導電性電極は基板に密着性の優れた材料を用いた
。例えばガラス基板上にクロムを形成し、さらにその上
面にアルミニュームを形成した2層膜としてもよい。For the first conductive electrode, a material with excellent adhesion to the substrate was used. For example, it may be a two-layer film in which chromium is formed on a glass substrate and aluminum is further formed on the top surface.
第1図(B)はこの上面に半導体層(3ンおよび透明導
電性電極よりなる第2の電極用材料(4)をコーティン
グしたものである。In FIG. 1(B), this upper surface is coated with a second electrode material (4) consisting of a semiconductor layer (3) and a transparent conductive electrode.
半導体層はPN接合、PIN接合、PINPIN接合、
PNPN・・・PN接合、PI I N接合等の光照射
により光起電力が発生し得るごとくに作製した。The semiconductor layer is a PN junction, a PIN junction, a PINPIN junction,
PNPN...A PN junction, a PI IN junction, etc. were prepared in such a way that a photovoltaic force could be generated by light irradiation.
本実施例に用いた半導体層は多結晶またはアモルファス
のごとき非単結晶半導体であって、かつそのエネルギギ
ャップ(Eg)が太陽光または螢光灯光のごとき連続光
であり、かつこの連続光を効率よく光−電気変換を行わ
しめるためW−N構造とした。つまり光照射側のUgを
大きく、即ちW−Eg (WIDIE Eg )の2〜
3cvに、また反対側のEgを小さく、即ちN−Eg(
NΔ1几OW IEg )の0.7−1.5eνにした
。半導体材料としては、珪素を主成分とし、その中にC
,N+O,Ge、Sn、Pb+ In、5b4eを必要
に応して添加した。また、半導体1”Aは減圧CVa法
またはグロー放電法を主として用いた。それらについて
は、本発明人の発明になる特許出願、特願昭53−08
68671086868、特願昭54−0320701
032071、特願昭49−071738に記載されて
いる。The semiconductor layer used in this example is a non-single crystal semiconductor such as polycrystalline or amorphous, and its energy gap (Eg) is continuous light such as sunlight or fluorescent light, and this continuous light can be efficiently used. A W-N structure was used to ensure good photo-electrical conversion. In other words, increase Ug on the light irradiation side, that is, increase W-Eg (WIDIE Eg) from 2 to
3cv, and reduce Eg on the opposite side, that is, N-Eg(
NΔ1⇠OW IEg) was set to 0.7-1.5eν. As a semiconductor material, silicon is the main component, and carbon is contained in it.
, N+O, Ge, Sn, Pb+ In, and 5b4e were added as necessary. In addition, the semiconductor 1''A mainly used the low pressure CVa method or the glow discharge method.For these, the patent application and Japanese patent application No. 53-08 which were invented by the present inventor are
68671086868, Patent application 1986-0320701
032071 and is described in Japanese Patent Application No. 49-071738.
この後第1図(C)に示すごとく、第2回目のエソチン
グ工程■により不要部の半導体層(12)および透明導
電性電極(11)を同しマスクを用いて除去した。この
エツチングにより、透明電極のパターン(11)、<1
1’)と概略同一形状に半導体層(12)、02’)を
エツチングさせた。即ち透明電極をマスクとして半導体
層をエツチングした。さらにこの半導体層は台形を有し
ており、その側周辺はテーパエッチをしである。実際に
は弗素系のプラズマエソチアマントを用いた。即ち平行
平板型の電極を有するプラズマエッチ装置において、金
属マスクを透明電極、半導体層を残す部分(11)、(
11’)(12)、< 12 ’ >上に設置せしめ、
その除去される部分でのみ選択的にプラズマ放電をさせ
た。その際、基板下に共通の一電極と基板上に基板透明
電極より若干離間して十の対抗電極間にプラズマ放電さ
せたものである。か(するとフォトレジスト等を用いる
必要もなく、また透明電極、半導体層を特性的に何等機
械的に傷つけないという特徴を有する。この選択プラズ
マエッチの際、十の対抗電極を上下または左右前後に周
期的に1 mm= I cmの巾で1〜IOC/Sにて
振動・移動させると、放電のエツジ部がぼけて、その結
果半導体層の側周辺をテーパ状に台形にすることができ
、加えてこのテーパの角度はエッチ速度と同しにすると
基板に対し約45°の2倍にすると約30°にまでベベ
ル状にすることができた。Thereafter, as shown in FIG. 1(C), unnecessary portions of the semiconductor layer (12) and the transparent conductive electrode (11) were removed using the same mask in a second ethoching step (2). This etching creates a transparent electrode pattern (11), <1
The semiconductor layers (12), 02') were etched into approximately the same shape as 1'). That is, the semiconductor layer was etched using the transparent electrode as a mask. Further, this semiconductor layer has a trapezoidal shape, and the periphery of the trapezoid is tapered etched. Actually, fluorine-based plasma esothiamant was used. That is, in a plasma etching apparatus having parallel plate type electrodes, a metal mask is used as a transparent electrode, and a portion (11) where a semiconductor layer is left, (
11') (12), installed on <12'>,
Plasma discharge was selectively applied only to the portion to be removed. At that time, plasma discharge was caused between one common electrode under the substrate and ten opposing electrodes on the substrate slightly spaced apart from the substrate transparent electrode. (Then, there is no need to use a photoresist, etc., and the transparent electrode and semiconductor layer are not mechanically damaged in any way. During this selective plasma etching, the ten opposing electrodes are placed vertically, horizontally, frontward, and backward. When it is periodically vibrated and moved at a rate of 1 to IOC/S with a width of 1 mm = I cm, the edge of the discharge becomes blurred, and as a result, the side periphery of the semiconductor layer can be made into a tapered trapezoidal shape. In addition, the angle of this taper was approximately 45° with respect to the substrate when the etch rate was the same, but when the angle was doubled to approximately 30°, it was possible to form a bevel shape.
その結果、第1の電極よりこの半導体層の側周辺にそっ
て基板のパスラインへのリードの形成が断絶の可能性も
なくきわめて信頼性を高くすることができた。さらに逆
流防止用ダイオードにあっては、その逆耐圧を高め実質
的にPIN接合界面での空乏層をひろめることができた
。As a result, the lead formation from the first electrode to the pass line of the substrate along the periphery of the semiconductor layer can be made extremely reliable without the possibility of disconnection. Furthermore, in the case of the reverse current prevention diode, it was possible to increase its reverse breakdown voltage and substantially expand the depletion layer at the PIN junction interface.
第1図において、第1のハスライン(5入光電変換装置
(6)、直列に接続された他の光電変換装置(7)、逆
流防止用ダイオード(8)、第2のパスライン(9)を
有せしめた。光電変換装置は2ケを直列にして出力の電
圧を2倍に高めである。In Figure 1, the first lotus line (5-input photoelectric conversion device (6), another photoelectric conversion device (7) connected in series, the backflow prevention diode (8), and the second pass line (9) are shown). Two photoelectric conversion devices are connected in series to double the output voltage.
第1図(D)は(C)の上側に第2の電極の一部となる
導体を選択的に形成させて完成したものである。図面に
おいては光(10)は基板(1)の上方より入射させた
。基板に密接して設けられた第1のパスライン(16)
と光電変換装置(6)の第1の電極(13)とがり一部
(17)により連結されている。また第2の電極である
対抗電極(光が照射する面倒の電極をいう)は透明電極
(11)と格子ラインパターン、クロスハツチパターン
、魚骨パターン等の他の補助電極(30) と重ねてそ
の直列抵抗の低減化を図っている。この連結用の補助電
極(30)は光が照射される全有効面積の20%以下望
ましくは5%程度に設けた。この補助電極(30)は半
導体N (12)の側周辺のテーパ面にそって基板上に
至り他の変換装置(7)の第1の電極に直列接続されて
いる。この光電変換装置(7)の対抗電極(11’)も
透明電極(11)と補助電極(22)よりなっている。FIG. 1(D) is completed by selectively forming a conductor to become a part of the second electrode on the upper side of FIG. 1(C). In the drawing, light (10) was incident on the substrate (1) from above. A first pass line (16) provided in close proximity to the substrate
and the first electrode (13) of the photoelectric conversion device (6) are connected by a pointed portion (17). In addition, the second electrode, the counter electrode (referring to the troublesome electrode that is irradiated with light), overlaps the transparent electrode (11) and other auxiliary electrodes (30) such as a grid line pattern, a crosshatch pattern, a fishbone pattern, etc. The aim is to reduce the series resistance. This auxiliary electrode (30) for connection is provided at 20% or less, preferably about 5% of the total effective area irradiated with light. This auxiliary electrode (30) extends onto the substrate along the tapered surface around the side of the semiconductor N (12) and is connected in series to the first electrode of another conversion device (7). The counter electrode (11') of this photoelectric conversion device (7) also consists of a transparent electrode (11) and an auxiliary electrode (22).
さらにこの透明電極(11’)および補助電極は重なっ
て逆流防止用ダイオード(8)の一方の電極を構成して
いる。このダイオードの半導体if (12”)は変換
装置(7)の半導体層と同一材料で構成させている。こ
のことは第1図(B)での製造工程より明らかであり、
同一の半導体N(3)を選択エッチして得られたもので
ある。即ち同一絶縁基板上に変換装置が破損等でショー
トした時、系全体を機能不能に陥ることより防止する逆
流防止ダイオード(8)が光電変換装置(6>、< 7
)と同時に同一平面上に設けられており、このダイオ
ードの作製に何等の新しい工程を必要としないことが本
発明の特徴である。またこのダイオードの他方の電極(
13つは第2のハスライン(9)を構成する下地金属(
15)と電JM (18)とに連結している。Furthermore, this transparent electrode (11') and the auxiliary electrode overlap to constitute one electrode of the backflow prevention diode (8). The semiconductor if (12") of this diode is made of the same material as the semiconductor layer of the converter (7). This is clear from the manufacturing process shown in FIG. 1(B).
This was obtained by selectively etching the same semiconductor N(3). That is, the photoelectric conversion device (6>,
) and are provided on the same plane at the same time, and it is a feature of the present invention that no new process is required to manufacture this diode. Also, the other electrode of this diode (
13 is the base metal (
15) and Den JM (18).
この図面には2ケの変換装置を直列に連結した例を示し
たが、同一基板に複数+1Mを作りそれらを直列または
並列にすることは本発明の特徴をさらに生かしている。Although this drawing shows an example in which two converters are connected in series, the features of the present invention can be further utilized by creating a plurality of +1M converters on the same board and connecting them in series or in parallel.
また本発明は半導体層を挟む位置的に高さが異なる2つ
の電極を新たな工程をまったく導入することなしに同一
平面構成とし連結した。このことは工業上きわめて単純
かつ低価格装置の作製に重要である。Further, in the present invention, two electrodes having different heights sandwiching a semiconductor layer are connected to each other in the same plane configuration without introducing any new process. This is important for the production of industrially very simple and low cost devices.
第2図は本発明の他の実施例である。光は基板側を通っ
て下側より半導体層に照射させている。FIG. 2 shows another embodiment of the invention. The light passes through the substrate side and is irradiated onto the semiconductor layer from below.
第2図(A)において基板(1)上に第1の電極の一部
であってかつ対抗電極の一部を構成する電極(37)、
<37’> (37’りを選択的に第1のマスク■を用
いて形成させた。さらにその上面を透明電極(4)、半
導体層(3)が第1図に示した実施例と同様にして形成
され、て第2図(B)を得た。第2図(C)において、
その上面に第2の電極(34)。In FIG. 2(A), an electrode (37) on the substrate (1), which is part of the first electrode and constitutes part of the counter electrode;
<37'>(37' was selectively formed using the first mask (2). Furthermore, a transparent electrode (4) and a semiconductor layer (3) were formed on the upper surface as in the example shown in FIG. Figure 2 (B) was obtained. In Figure 2 (C),
A second electrode (34) on its top surface.
(34’> (34’りを第2のマスク■を用いて形成
した後、この第2の電極をマスクとして半導体層(3)
を選択的にエッチし、さらに透明電極(4)をエッチし
た。そのためこの実施例においても半導体層と透明電極
は概略同一形状を有するセルファライン構成をさせるこ
とができた。第1図と同様に半導体層(3)の側周辺を
テーパ状にして、配線の断線を除去した。(34'> (After 34' is formed using the second mask ■, the semiconductor layer (3) is formed using this second electrode as a mask.
was selectively etched, and then the transparent electrode (4) was further etched. Therefore, in this example as well, a self-line configuration in which the semiconductor layer and the transparent electrode had approximately the same shape could be achieved. Similarly to FIG. 1, the periphery of the semiconductor layer (3) was tapered to remove disconnections in the wiring.
第2図(D)は本発明装置の完成図である。第1のパス
ライン(5)、第2のパスライン(9)は透光性絶縁基
板(1)上に設けられ、光電変換装置(6)および(7
)は基板を通しての光照射に対して光起電力を発生ずる
。逆流防止ダイオードは(8)に設けられている。半導
体の(12>、<12’)の側周辺は絶縁物(35ル(
35’)で囲まれており、この絶縁物上をリード(36
)、<36’)があって光電変換装置間を電気的に連結
している。対抗電極は透明電極(11)、<11’)と
格子ラインパターン、クロスラインバクーン等の補助電
極(37)、<37’) (37つ(37)とにより構
成させた。この場合、基板材料は光透過性材料代表的に
はガラスまたは透明有機樹脂を用いた。FIG. 2(D) is a completed diagram of the device of the present invention. The first pass line (5) and the second pass line (9) are provided on the transparent insulating substrate (1), and the photoelectric conversion devices (6) and (7) are provided on the transparent insulating substrate (1).
) generates a photovoltaic force upon irradiation of light through the substrate. A backflow prevention diode is provided at (8). The area around the (12>, <12') side of the semiconductor is an insulator (35 l).
35'), and the lead (36
), <36') to electrically connect the photoelectric conversion devices. The counter electrode was composed of a transparent electrode (11), <11') and auxiliary electrodes (37), <37') such as a grid line pattern or a cross line Bakun. In this case, the substrate material A light-transmitting material, typically glass or transparent organic resin, was used.
以下に本発明の実施例をさらに具体的な数字に基づき示
す。Examples of the present invention will be shown below based on more specific numbers.
具体例1 第1図に示した光電変換装置の縦断面図を示す。Specific example 1 2 is a longitudinal cross-sectional view of the photoelectric conversion device shown in FIG. 1. FIG.
基板としてガラス(JVみ1.4 mm)を用いた。さ
らにその上面に第1の電極用にクロムを電子ビーム蒸着
法により200 (1人の厚さに形成した。クロムエッ
チ溶液にてエツチングを施した。Glass (JV diameter: 1.4 mm) was used as the substrate. Furthermore, chromium for a first electrode was formed on the upper surface to a thickness of 200 mm by electron beam evaporation. Etching was performed using a chromium etch solution.
この後この上面にl’IN接合を有する非単結晶半導体
を積層した。即ちN型非単結晶半導体(Pl+。Thereafter, a non-single crystal semiconductor having an l'IN junction was laminated on this upper surface. That is, N-type non-single crystal semiconductor (Pl+).
/ 5ill+ =0.01、厚さ200人、lig
1.7eV)、■型非単結晶半導体(SiH4100%
、厚さ0.5 p、Eg ]、8eV)、P型の炭素が
添加されノこ珪素(CII4 : 5tllf= l
: ]BJjr / 5i14 = 0.003 、厚
さ100 人、Eg 2.1cV) テある。これらを
グロー放電法(周波数13.5(iMIIz。/ 5ill+ = 0.01, thickness 200 people, lig
1.7eV), type non-single crystal semiconductor (SiH4100%
, thickness 0.5p, Eg], 8eV), sawtooth silicon doped with P-type carbon (CII4: 5tllf=l
: ] BJjr / 5i14 = 0.003, thickness 100 people, Eg 2.1cV) There is. These were processed using the glow discharge method (frequency 13.5 (iMIIz).
出力LOW、圧力Q、1.torr、被成成長速度2.
1 人/秒。Output LOW, pressure Q, 1. torr, growth rate 2.
1 person/second.
基板温度210℃)として形成した。さらに透明2〃電
膜を酸化スズを電子ビーム蒸着法によりその厚さ700
人として形成した。プラズマエツチングは透明電極は使
用ガスを1周波数13.56MHz、エッチ温度室温の
条件で行った。The substrate temperature was 210°C). Furthermore, a transparent 2〃electrode film was formed by applying tin oxide to a thickness of 700 mm by electron beam evaporation.
Formed as a person. Plasma etching was performed for the transparent electrode at a gas frequency of 13.56 MHz and an etching temperature of room temperature.
さらに第一1図(B)の補助電極(30>、<22)は
アルミニューム真空蒸着法によりステンレスマスクを用
いて作製した。Furthermore, the auxiliary electrodes (30>, <22) shown in FIG. 11(B) were fabricated by aluminum vacuum evaporation using a stainless steel mask.
得られた特性は以下の如くである。The properties obtained are as follows.
開放電圧 0.7v(2段直列)
短絡電流 23μ八
曲線因子 0.5
照射光 白色螢光灯300 lx
セル面積 10mm X 15111m逆流防止ダイオ
ードの面積 5 mm X 15mm以上の説明におい
て、透明電極は5nOLにインジュームまたはアンチモ
ン、テルルをドープして作製した。しかし対抗電極側の
電極はショットキ電極であっても、またショットキダイ
オードを構成するための20〜50人のきわめて薄い膜
厚の絶縁膜であってもよい。Open circuit voltage 0.7v (2 stages in series) Short circuit current 23μ Fill factor 0.5 Irradiation light White fluorescent lamp 300lx Cell area 10mm x 15111m Area of backflow prevention diode 5mm x 15mm In the above explanation, the transparent electrode is 5nOL. It was made by doping indium, antimony, or tellurium. However, the electrode on the counter electrode side may be a Schottky electrode or may be an extremely thin insulating film of 20 to 50 layers for forming a Schottky diode.
このショットキ電極においては、透明電極の代わりに白
金等の仕事函数の大きな金属を光の透過する程度に薄<
25〜100人の厚さに形成させた。In this Schottky electrode, a metal with a large work function such as platinum is used instead of a transparent electrode, which is thin enough to allow light to pass through.
It was formed to a thickness of 25 to 100 people.
またMIS型の光電変換装置においては、20〜50人
のトンネル電流の流れ得る程度に薄い絶縁膜を(11)
に対応して設り、その上に格子状またはその他の金属電
極を例えば第1図(D)のごとく対抗補助電極(22)
として設ければよいことはいうまでもない。In addition, in MIS type photoelectric conversion devices, an insulating film is thin enough to allow the tunneling current of 20 to 50 people to flow (11).
A counter auxiliary electrode (22) is provided on which a grid-like or other metal electrode is placed, for example, as shown in FIG. 1(D).
Needless to say, it would be better to set it as .
本発明の実施例において、少なくとも2つのハスライン
は絶縁基板上の一方の表面にのみ設置させて設けた。し
かしひとつのパスラインまたは2つのパスラインの一部
は絶縁基板をスルーホールとし、その反対面または裏面
を用いて形成してもよいことはいうまでもない。しかし
その時は価格が高くなる欠点を有する。In the embodiment of the present invention, at least two lotus lines were provided on only one surface of the insulating substrate. However, it goes without saying that one pass line or a portion of two pass lines may be formed by using a through hole in the insulating substrate and using the opposite or back surface thereof. However, it has the disadvantage of being expensive.
第1図は本発明の光照射が基板の上方からなされた光電
変換装置の縦断面図を示し、かつその作製工程を示した
ものである。
第2図は本発明の光照射が基板を通して下側からなされ
る光電変換装置の縦断面図を示し、かつその作製工程を
示したものである。FIG. 1 shows a longitudinal cross-sectional view of a photoelectric conversion device according to the present invention in which light irradiation is performed from above a substrate, and also shows the manufacturing process thereof. FIG. 2 shows a longitudinal cross-sectional view of a photoelectric conversion device according to the present invention in which light is irradiated from below through a substrate, and also shows the manufacturing process thereof.
Claims (1)
配設し、さらにその一方に連結された前記光電変換装置
の電流が流れに<<シた電気的に逆方向の逆流防止ダイ
オードは前記光電変換装置を構成するPNまたはPIN
接合を有する水素またはハロゲン元素が添加された非単
結晶半導体と同一半導体によりかつ同一接合構成を有し
て前記基板上の光電変換装置と同一面上に設けられたこ
とを特徴とする光電変換装置。1. A plurality of photoelectric conversion devices are arranged in series on an insulating substrate, and a backflow prevention diode is connected to one of the photoelectric conversion devices in an electrically opposite direction to the current flow of the photoelectric conversion device. is a PN or PIN constituting the photoelectric conversion device
A photoelectric conversion device characterized in that it is made of the same semiconductor as a non-single-crystal semiconductor to which a hydrogen or halogen element is added, has the same junction configuration, and is provided on the same surface as the photoelectric conversion device on the substrate. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59074256A JPS60100483A (en) | 1984-04-13 | 1984-04-13 | photovoltaic power generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59074256A JPS60100483A (en) | 1984-04-13 | 1984-04-13 | photovoltaic power generator |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9009979A Division JPS5613779A (en) | 1979-07-16 | 1979-07-16 | Photoelectric converter and its preparation |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60100483A true JPS60100483A (en) | 1985-06-04 |
JPH0458711B2 JPH0458711B2 (en) | 1992-09-18 |
Family
ID=13541885
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59074256A Granted JPS60100483A (en) | 1984-04-13 | 1984-04-13 | photovoltaic power generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60100483A (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5337718A (en) * | 1976-09-21 | 1978-04-07 | Asahi Glass Co Ltd | Laminated glass with heating wire incorporated therein |
JPS5342693A (en) * | 1976-09-29 | 1978-04-18 | Rca Corp | Semiconductor device including amorphous silicone layer |
JPS53143180A (en) * | 1977-05-18 | 1978-12-13 | Energy Conversion Devices Inc | Amorphous semiconductor structure and method of producing same |
JPS5425187A (en) * | 1977-07-28 | 1979-02-24 | Rca Corp | Photoelectric semiconductor |
JPS5463690A (en) * | 1978-05-22 | 1979-05-22 | Yamazaki Shunpei | Photovoltaic force generating semiconductor and method of producing same |
JPS55141961U (en) * | 1979-03-30 | 1980-10-11 |
-
1984
- 1984-04-13 JP JP59074256A patent/JPS60100483A/en active Granted
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5337718A (en) * | 1976-09-21 | 1978-04-07 | Asahi Glass Co Ltd | Laminated glass with heating wire incorporated therein |
JPS5342693A (en) * | 1976-09-29 | 1978-04-18 | Rca Corp | Semiconductor device including amorphous silicone layer |
JPS53143180A (en) * | 1977-05-18 | 1978-12-13 | Energy Conversion Devices Inc | Amorphous semiconductor structure and method of producing same |
JPS5425187A (en) * | 1977-07-28 | 1979-02-24 | Rca Corp | Photoelectric semiconductor |
JPS5463690A (en) * | 1978-05-22 | 1979-05-22 | Yamazaki Shunpei | Photovoltaic force generating semiconductor and method of producing same |
JPS55141961U (en) * | 1979-03-30 | 1980-10-11 |
Also Published As
Publication number | Publication date |
---|---|
JPH0458711B2 (en) | 1992-09-18 |
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