JPS5999524A - Adapter device of information processing system - Google Patents

Abstract

PURPOSE:To prevent the operation of a central processing unit CPU from being stopped owing to the power-off operation of an input/output control system by converting a start command signal from the CPU immediately when the input/ output control system is powered off. CONSTITUTION:If the central processing unit CPU sends out the start command signal 24 while the input/output control system is powered off, a signal from the AND gate 42 and OR gate 46 of an adapter device 5 is converted by the end interruption signal 25, which is sent to the CPU immediately. The CPU recognizes the power-off state of the input/output control system by it to prevent the processing of the CPU from being stopped unnecessarily. The function of converting the start command signal 24 of the adapter device 5 into the end interruption signal is obtained only by adding AND gates 41 and 42 and an inverter 45.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an information processing system in which a central processing system and an input/output control system are powered by separate power supplies, and particularly relates to an information processing system in which a central processing system and an input/output control system are powered by separate power supplies. The present invention relates to an adapter device for relay connection.

[Technical background of the invention]

FIG. 1 shows processing blocks of a basic configuration example of a conventional general information processing system. Central processing unit 1
A main storage device 2 and an input/output control device (EL control device) 6 are connected to each other, and the input/output control device 6 is further connected to an input/output device (I10 device) 4.

FIG. 2 is an explanatory diagram showing a schematic operation of the information handling system shown in FIG. 1. The main storage device 2 includes an input/output command storage area (I10 command storage area) 21, an input/output data storage area 22, and an end status storage area 23.
is provided. The central processing unit 1 outputs a start command signal 24 to the input/output control device 3 and receives a termination interrupt signal 25 from the input/output control device 3. Steps 61-6
4 indicates operation steps within the input/output control device 3;
Command reception 61, command interpretation 62, execution 66, termination notification 64, etc. are performed respectively.

Generally, when operating the input/output device 4, first, commands (and data) are prepared in the main storage device 2, and then a startup command signal 24 is sent from the central processing unit 1 to the corresponding input/output control device 3. issue. The input/output control system N, 6 reads the command from the input/output command storage area 21 of the main storage device 2 in step 61 based on the activation command signal 24, then interprets the command in step 62, and reads the command in step 66. 1 above while moving the output device 4. (c) Data is input/output to the human output gator storage IJ a 22 of the device 2 and execution processing is performed. When all operations of the pre-operative command are completed, the end status is stored in the end status storage area 26 of the main storage device 2 in step 64, and the end interrupt signal 25 is sent to the medium heat processing device 1. Notifies the end of the operation. Based on the termination interrupt signal 25, the central processing unit 1 analyzes the termination status stored in the main storage device 2 and recognizes whether the operation is normal or abnormal.

The above is the operation of a general information processing system, and an input/output control system B, which has a separate power supply from the central processing system thread A, is connected to the system that performs such operations, as shown in Figure 6. Some systems have a similar configuration.

That is, in the central processing system thread A, the central processing unit 1, the main storage device 2, and the adapter device 5 are interconnected.

In the input/output control system B, the input/output control device 6 and the input/output device 4 are connected, and the central processing system system A and the input/output control system B have separate power supplies. In such a system, the central processing system A and the input/output control system B are connected to the adapter device 5.
Both systems are connected and operated via.

[Problems with background technology]

The conventional adapter device 5 of the information processing system as shown in FIG. 6 does not have advanced processing functions such as firmware.
In many cases, it simply has the functions of converting various signals and acting as a driver/receiver. When the central processing system A and the input/output control system B are connected via such an adapter device 5, a start command signal is issued from the central processing unit 1 when the input/output control system B is powered off. If
The activation command signal is sent from the adapter device 5 to the input/output control device B, but since the input/output control system B is powered off, the activation command signal remains ignored. However, the central processing unit 1 receives 411j from the input/output control system B.
Since the central processing unit 1 waits until a clear end interrupt signal arrives, there is a drawback that the processing of the central processing unit 1 falls into a halt state during this time. In order to prevent such problems, the adapter device 5 should have a function to recognize these states, but adding such a function would significantly increase the cost of the adapter device 5. This will cause inconvenience. Furthermore, as another solution, it would be possible to enable the central processing unit 1 to directly recognize the status of the input/output control system B, but this would have a large impact on the design of the 11゛I information processing system. , which is not a good idea.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above drawbacks, an object of the present invention is to provide an adapter device for an information processing system that prevents the central processing unit from stopping due to power off of the input/output control system without increasing costs.

[Summary of the invention]

The present invention provides an adapter device that relays and connects a central control system system and an input/output control fill system to the input/output control system in an information processing system in which the two systems have separate power supplies. Means for outputting to the input/output control system only when a reso signal indicating power-on is output from the central processing unit, and a means for outputting the reso signal from the input/output control system even though a start command signal is output from the central processing unit. The above object is achieved by providing means for sending a termination interrupt signal to the central control unit if the interrupt signal has not been output.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings, using the same reference numerals for the same parts as in the conventional example. FIG. 4 is a configuration diagram showing an embodiment of the adapter device of the information processing system of the present invention.

The adapter device 5 of this embodiment has the following configuration and is used in the vagina. Activation command signal 2 from a central processing unit (not shown)
4 is the 1 input terminal of AND gate 41 and AND gate 42
It is input to the 01 input terminal. Ant game! - A reso signal 46 indicating that the power of the input/output control device O is on is inputted to the other input terminal of 41, and this AND gate 4
A start command signal 44, which is the output of the controller 1, is sent to the input/output controller B. The reso signal 46 is inputted to the other input terminal of an AND gate 42 via an inverter 45, and the output of this AND gate 42 is inputted to an OR gate 46. The end interrupt signal 47 of the input/output control device 6 is input to one input terminal of an AND gate 48.
The reso signal 46 is input to the other input terminal of 8,
Its output is output to the other input terminal of the OR gate 46. End interrupt signal 2 which is the output of OR gate 46
5 is sent to a central processing unit (not shown).

Next, the operation of this embodiment will be explained. A start command signal 24 from a central processing unit (not shown) is ANDed by an AND gate 41 and a reso signal 46 that is output when the input/output control system is powered on and operational, and is input as a start command signal 44. Output control device 1 is sent to B. From now on ++;1. As in the conventional example, the input/output j group bait 1 device 3 reads the command from the above-mentioned slave device (not shown) and executes the command. System R6 stores the termination status in a special area on the main memory and generates a termination interrupt signal 47.This termination interrupt signal 47
is ANDed by the reso signal 46 and the AND gate 48, and is sent to the central processing unit (not shown) as the end interrupt signal 25 via the OR gate 46. When this end interrupt signal 25 is recognized by the central processing unit, the central processing unit analyzes the corresponding status in the main memory and determines whether the operation is correct or not.

The operation up to this point is substantially the same as the conventional example.

If the power is not turned on to the input/output control system for some reason, the reso signal 46 from the input/output fIll I"11 device 6 will not be output, so the activation command signal 24 from the central processing unit will be output from the AND gate. 42 performs an AND operation with the inverted signal of the reso signal 46, and the ant game 1.42 immediately sends the end interrupt signal 25 to the central processing unit via the rear gate 46. In this case, Since no operation is performed to store the end status that informs the end state in the main memory, no information is written in the end status storage area (see Figure 2) of the main memory. Therefore, the central processing unit must initialize the end status storage area of the main memory to a specific pattern (other than all status patterns notified from the input/output control unit) before issuing the start command signal. As a result, the activation command signal 24 issued from the central processing unit due to the aforementioned power-off state of the input/output control system is immediately converted by the adapter group @5 and returned to the central processing unit as the termination interrupt signal 25. Therefore, the status that the central processing unit analyzes based on this termination interrupt signal 25 is the initialization pattern before issuing the start command signal, which means that the input/output control system is not powered on. It is possible to give the central processing unit recognition that the operation of the input/output control system is impossible, or that the operation of the input/output control system is impossible, thereby preventing the central processing unit from being stopped. .

According to this embodiment, when the central processing unit issues the start command signal 24 when the input/output control system is powered off,
Activated by AND gate 42 and OR gate 46 of adapter device 5]1? The command signal 24 is converted into a termination interrupt signal 25 and immediately sent back to the central processing unit, so the central processing unit recognizes that the input/output control system is powered off and prevents the central processing unit from being in an unnecessary processing halt state. The function of converting the activation command signal 24 of the adapter device 5 into the termination interrupt signal 25 can be realized by simply adding a small amount of hardware logic such as an AND gate 41, 42 and an inverter 44. Therefore, there is no problem such as an increase in the cost of the adapter device 5. Still, central processing unit 1
A useless evening! (Since the processing down time is reduced, the CPU time of the central processing unit can be effectively utilized to reduce the total cost of the information processing system.

〔Effect of the invention〕

As described above, according to the adapter device for the information processing system of the present invention, when the input/output control system is powered off, the start command signal from the central processing unit is immediately converted into a termination interrupt signal, and this signal is sent to the central processing unit. By providing a means for sending the data back to the input/output control system, it is possible to prevent the central processing unit from stopping due to power off of the input/output control system without increasing costs.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a general configuration example of a conventional information processing system, Fig. 2 is an explanatory diagram showing the operating state of the information processing system shown in Fig. 1, and Fig. 6 is a block diagram showing a general configuration example of a conventional information processing system. FIG. 4 is a block diagram showing another example of the configuration of the system. FIG. 4 is a block diagram showing an embodiment of the adapter device of the information processing system of the present invention. adapter device, 41
．． 42.48...AND gate, -45...Inverter, 46...OR gate. Agent Patent attorney Keisuke Chika (and 1 other person)

Claims (3)

[Claims] (1) In an adapter device that relays and connects the mountain system of the central control system and the input/output control system to a separate power supply system, the power of the control system is turned on from the input/output control system. If the reso signal indicating the operable state is not output, there is a means for immediately sending the start command signal output from the central processing unit of the central control system to the input/output control system back to the central processing unit as a termination interrupt signal. An adapter device for an information processing system, characterized in that: (2) The start signal from the central processing unit of the central control system is ANDed with the reso signal from the control system indicating that the input/output control system is powered on and ready for operation, and its output is converted to a new signal. A first AND gate sends a start signal to the input/output control device of the input/output control system, ANDs the start signal and the inverted output of the reso signal, and sends the output to the central processing unit as a termination interrupt signal. 2. The adapter device for an information processing system according to claim 1, further comprising a second AND gate for outputting the second AND gate. (3) Input the reso signal to the second AND gate via the inverter, OR the output of the second AND gate and the end interrupt signal from the input/output control device, and use the output as the end interrupt signal. 3. The adapter device for an information processing system according to claim 2, further comprising an OR gate serving as a signal.