JPS5992618A - Level shifting circuit - Google Patents

Abstract

PURPOSE:To perform stable level shifting by providing a signal input circuit consisting of serial circuits of base-emitter current paths of transistors (TR) and resistances, and active load of TRs where the same currents with the signal input circuits flow. CONSTITUTION:A signal which has an operation point at the earth potential is applied to an input terminal P1. When TRs Q22 and Q23 are provided with the same characteristics, the current flowing through a TRQ21 and a resistance R21 is equalized to the current flowing through the TRQ21 and a resistance R22 by current mirror operation. Further, when TRs Q21 and Q24 have the same characteristics, the base-emitter forward voltage drops of those TRs Q21 and Q24 the equalized. Consequently, a signal shifted in operation point from the earth potential to the constant voltage of a constant voltage source E21 is generated while the gain of an output terminal P2 is not varied.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a level shift circuit.

1- [Technical background of the invention and its problems] Conventional level shift circuits are shown in FIGS. 1 to 4. The example shown in FIG. 1 is a circuit using a diode for shifting. That is, the input signal applied to the input terminal P1 is shifted through the transistor Q11° and the diode D111D12, and is guided to the output terminal P2. The level shift amount (potential difference between input terminal P1 and output terminal 22) vLs of this circuit is v=v+v+v... (1) L8
! Ill Di DI However V
□1: Forward drop voltage between base and emitter of transistor Qll ■D1: Forward drop voltage of diode Di 1 VD2:
This becomes the forward voltage drop of the diode DI11.

However, in the case of the above configuration, the transistor Q11 and the diode Di 11 D
There is a drawback that when the characteristic of I2 changes from a desired value, the level shift amount vLs changes. Further, the level shift amount vL□ is determined by the number of diodes, but when it is desired to increase the level shift amount vLs, there is a drawback that the number of diodes increases.

The example shown in FIG. 2 shows a method using a constant current source Ill.

The level shift of this circuit) Jl Vt,s is V =
V + RI... (2) LB
BZ & B B However, v! l, l, a:
Transistor Q1! Forward voltage drop between pace and emitter R8: Resistance value I8 of resistor R11: Current of constant current source I This circuit is designed to compensate for variations in the characteristics of circuit elements and to It is required to design a circuit that takes temperature compensation into consideration, and the circuit design becomes complex. In addition, as a constant current source Ill, by controlling the pace voltage of the transistor, the collector current is kept constant,
A circuit is used in which this current is set to 8. However, in this case, there is a drawback that if an unnecessary signal component is placed on the pace side of the current source transistor as described above, the value of the current 11 changes, thereby changing the Schlepel shift amount vLm. Also, level shift) i-VL, IIL and R
However, if Ia is increased in order to increase Ia, power consumption will increase, and if Ra is increased, frequency characteristics will deteriorate.

Further, the circuits shown in FIGS. 1 and 2 are shifted only in one direction from high level to low level, and there is a drawback that the design cannot be changed in the opposite direction.

FIGS. 3 and 4 show an example in which the level can be shifted from a low level to a high level. Figure 3 shows a method using diodes as in Figure 1;
The figure shows a method using a constant current source as in Figure 2. The circuits shown in FIGS. 3 and 4 are also similar to those shown in FIG. 1, respectively.

It goes without saying that this circuit has the same drawbacks as the circuit shown in FIG. 2, but it also has the following drawbacks.

First, in integrated circuits, lateral PNP) transistors and substrate PNP) transistors are generally used as PNP) transistors. PNP of this scale
)FiNPN) Compared to transistors, the current amplification factor is lower and the input impedance is low. Therefore, the circuits shown in Figures 3 and 4 that use PNP) transistors in the input stage have the disadvantage of lower input impedance than the circuits shown in Figures 1 and 2 that use NPN) transistors. .

Further, the circuits shown in FIGS. 3 and 4 are dependent on power supply.

That is, in the circuit of FIG. 3, when the power supply voltage fluctuates, the current flowing through the transistor Q11 changes, and the forward drop voltage V□1. It has the disadvantage that the temperature coefficient changes. In the circuit of FIG. 4, the pace bias voltage of the current source transistor of the constant current source Ill is often determined depending on the power supply voltage. Therefore, when the power supply voltage fluctuates, the current I fluctuates and the level shift amount It has the disadvantage that vLs fluctuates.

[Purpose of the invention]

This invention was made in order to cope with the above-mentioned circumstances, and is suitable for integrated circuits, has a simple circuit configuration,
It is an object of the present invention to provide a level shift circuit that can always perform stable level shifting.

[Summary of the invention]

This invention provides a signal input circuit consisting of a pace emitter current path of a transistor and a series circuit of resistors between an input terminal of an input signal and an operating point potential terminal of the input signal, and a current value flowing through the signal input circuit is An active load of the above transistor through which current flows, a constant current source transistor that is paired with this active load and causes a current corresponding to the current flowing in the above input circuit to flow through current mirror operation, and a constant current source transistor inserted in series with this constant current source transistor. The signal output circuit is configured to supply a current corresponding to the current flowing through the signal input circuit to the signal output circuit by current mirror operation.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 5 is a circuit diagram showing the first embodiment. The input terminal P1 is connected to the transistor (ht).The emitter of this transistor Q21 is grounded via the resistor R21, and the collector is connected to the transistor Q21.
It is connected to 22 collectors. This transistor Q
The collector of Q22 is diode-connected to the pace, which in turn is connected to the pace of transistor Q23.

The emitter of the transistor Q221Q23 is the power supply V. Connected to 0. The collector of the transistor (hs) is connected to the connection midpoint between the collector of the diode-connected transistor Q24 and the pace.

The emitter of transistor Q24 is connected to one end of resistor R23, and the other end of resistor R22 is connected to the positive electrode of constant voltage source E21. The negative electrode of the constant voltage source E21, which is involved in the amount of level shift, is grounded. The transistor Q
The collector of Cs has an output terminal P! is provided.

Note that the transistor (hunchs) forms a current mirror circuit. Therefore, in FIG. The current mirror circuit connects the output current north of the input current flowing to the collector of the transistor (hg) to the transistor Q21.
It is sent to the collector of

The operation in the above configuration will be explained. The input terminal P1 has
For example, a signal whose operating point is ground potential is applied. Now, if the characteristics of the transistor Q2 * * Qs are made equal, then due to the current mirror operation, the transistor Qt
and the current flowing through the resistor R11, the transistor Qza, and the resistor R2! The current flowing through becomes equal. Under these conditions, if the characteristics of hzQz4 are made the same for the transistors, the forward drop voltages between the pace and emitter of these transistors (ht, Ch4) can be made equal. According to the above configuration, the output terminal The gain remains unchanged for Pt, and the operating point changes from ground potential to constant voltage source E!!
A signal whose level is shifted to a constant voltage is obtained.

The potential of the output terminal P2 can be expressed using the following equation. Now, assume that the pace currents of transistors Q21-Q24 are negligibly small compared to the collector currents of transistors Q21-(h4).

For example, if a DC level signal of voltage v1 is applied to the input terminal PI, the DC voltage level v2 at the output terminal at that time is as follows.
(7) Pace-emitter forward drop voltage Ra, Rb: Each has a resistance value of resistor R21+R2*. When formula (4) is transformed, it becomes. Here, in order to obtain the relationship V = = Ea + v, - (5) so as not to depend on the diode characteristics between the pace emitter, Rb - = 1 ... (7 )R.

The characteristics of transistors Q21, Q24+Qt and QCs can be obtained by making their resistance values equal.

By the way, when a plurality of transistors are integrated on the same semiconductor substrate, the characteristics of transistors of the same type can be set to desired values with relatively high accuracy. In this case, even if the characteristics of each transistor vary from the desired value due to manufacturing errors or temperature changes, the tendency of the characteristics of all transistors to change is the same, so it is necessary to keep only the ratio of characteristics constant. I can do it. Therefore, in the circuit shown in FIG. Because it is easy, transistor Q2
The current flowing in 11Q24 (strictly speaking, the current of the emitter).Similarly, it is also possible to ensure that multiple resistors I
K can.

Therefore, the circuit shown in FIG. 5 can reliably obtain the output voltage v2 as shown in equation (5).

In this case, the constant voltage E1 of the constant voltage source E21 becomes the amount of level shift, so by setting this voltage EIL appropriately, the operating point of the input signal is converted to an operating point suitable for the next stage circuit. can do.

As detailed above, this practical example has a signal input circuit consisting of a series circuit of one transistor (ht) pace-emitter current path and one resistor R11 between the input terminal P1 and the ground. A signal output circuit consisting of one pace-emitter current path of one transistor Q24 and one resistor R22 is provided between the constant voltage source E21 and the output terminal 22, and the above two are connected by a current mirror circuit. This circuit is designed to supply an equal bias current to the circuit.In this case, a voltage equal to the input voltage v1 is generated in the signal output circuit, and this is changed as appropriate according to the constant voltage E generated from the constant voltage source E21. Level shifted, output terminal P
? is derived.

According to the above configuration, the circuit on the input end side and the circuit on the output end side of the current mirror circuit cancel out fluctuations in the characteristics of the circuit elements, so even if the characteristics of the circuit elements change, the desired level shift is always achieved. quantity can be secured.

In addition, an independently provided constant voltage source El! By appropriately selecting the constant voltage E of 1, various level shifts l can be set. In this case, constant voltage Ea
By selecting a positive voltage or a negative voltage, it is possible to realize a level shift in both directions, such as from a low level to a high level or from a high level to a low level.

Here, as mentioned above, the pace emitter characteristics of the transistor on the input side and the transistor on the output side are equal.
Assuming that the emitter voltage is vIIE, the above (4)
The formula is generally denoted by .

n: Current ratio of the current mirror circuit constituted by Qzz+Q*s.

k: Number of diodes (PN junction) connected to the output circuit side.

If k is set so that the coefficient term of V□ becomes zero in the above equation (4)7, input terminal P! The DC level at output terminal P
At 2, the level is converted without being affected by temperature favor.

If the DC level is determined and set without being affected by the junction voltage ■Bl, and then the number k of diodes to be inserted into the output circuit is determined, the DC conversion level can be adjusted without being affected by changes in ■□. The amount can be determined. In addition, the resistance Rb is the resistance R1 as shown in the example shown in FIG. 11 described later.
When the Bm resistance is divided by the R resistance and connected to the output side, the combined resistance is shown.

Furthermore, even if the constant voltage E1 of the constant voltage source Ezt is increased, it is possible to prevent power consumption from increasing and frequency characteristics from deteriorating.

In addition, even if the power supply voltage fluctuates, the transistor (hz+(h
Since the current of s does not change, the input signal can be guided to the output terminal P2 while maintaining the gain at the input terminal P1. Moreover, if the constant voltage source E21 is configured as shown in FIG. 6, for example, the constant voltage Ea can be prevented from being affected by fluctuations in the power supply voltage. From the above, it is possible to perform a level shift that is not affected by fluctuations in the power supply voltage. Note that FIG. 6 shows a diode-connected transistor QCs.
, (ha and Zener diode I)it are connected in series. According to such a configuration, a constant voltage Ea can always be obtained, and the temperature coefficient can be made zero.

In addition, an NPN) transistor Q! is used in the input stage. 1 is used, so the input impedance is high.

Furthermore, the above configuration is advantageous even in cases where only a low power supply voltage can be used.

7 to 10 are circuit diagrams showing different configurations of the signal input circuit and the signal output circuit, respectively. First, FIG. 7 shows a diode-connected transistor Q27 connected in the forward direction between the emitter of the transistor (ht) and the resistor R21.Even in such a case, for example, the output terminal P
By inserting a diode-connected transistor (hs) in the forward direction between the collector of the transistor (ht) and the collector of the transistor (ht), the voltage across the transistor (ht) is
Since it can be secured by hs, the above equation (5) can be obtained.

Figure 8 shows that on the signal input circuit side, the emitter of transistor Q21 is directly connected to ground, and a 1h resistor is connected between the pin and the input terminal.
A has been inserted. On the signal output circuit side, a resistor R1 is connected between the pace and collector of the transistor Q24.
A resistor R24 having a resistance value equal to 3 is inserted.

In such a configuration, since the emitter currents of the transistors Q and Qza are approximately equal, their pace currents are also approximately equal, and therefore the voltages across the resistors 1h31R14 are also approximately equal. As a result, transistor Q! A voltage approximately equal to the input voltage v1 is generated between the collector and emitter of No. 4, and the output voltage V, is the same as that of the ablation (5).

Figure 9 shows a diagram in which a resistor R211 is inserted between the pace of the transistor (hx) and the ground in Figure 8, and a resistor R218 with the same resistance value as the resistor R2a is inserted between the pace and emitter of the transistor (h4). Even in such a configuration, a voltage approximately equal to the input voltage v1 can be generated between the collector and emitter of the transistor (h4).

In FIG. 10, a diode-connected transistor Qze is connected in the forward direction between the pace of the transistor (h1) and the ground, and the transistor Qze is further connected between the pace of the transistor Q21 and the input terminal 21.
A resistor R27 is inserted between them. Then, the emitter of the transistor Q24 is connected to the resistor 1 as shown in FIG.
hz is inserted. In this case, the resistance R27* R2
The two resistance values are made equal. In such a configuration,
The transistor (hz+(hs) forms a current mirror circuit, and a current equal to the current flowing through the transistor Q21 flows through the transistor Q2. Therefore, the circuit consisting of the transistor Q2m and the resistor R1γ is the transistor (h4
The circuit operates in the same way as the circuit consisting of the resistor R22 and the resistor R22, and a voltage approximately equal to the input 17-voltage v1 is obtained between the constant voltage source Ezt and the output terminal 22.

Although the circuit configured so that the gain with respect to the input signal is 1 has been described above, it is also possible to make the gain a multiple of an integer other than 1. FIG. 11 shows, for example, a case where the gain is doubled. That is, two circuits having an external connection configuration similar to the circuit consisting of the transistor Q24 and the resistor R12 are inserted in series between the collector of the transistor Q23 and the positive side electrode of the constant voltage source Ell. In this case, transistor Q24+Qs
o have the same characteristics, and resistance 1h, snow 11h, and a have the same resistance value.

According to such a configuration, the constant voltage source E! Between the positive electrode of transistor Q1 and the collector of transistor Q4, transistor Q24
A voltage equal to the input voltage v1 is generated between the collector of the transistor Qso and the collector of the transistor Qso. therefore,
The output terminal P2 is amplified twice and has an operating point at a constant voltage E.
, t, a level-shifted signal is obtained. ”
Expressing the output voltage v2 using the formula, 18- However, V□c: Forward drop voltage between the pace and emitter of the transistor Qao Rc: The resistance value of the resistor R2a plus 0 Here, v,, aw v, , b= vBIc
, R.

=Rb=Rc, so V2 = EIL+ 2V1- (91) In a similar manner, by increasing the number of circuits connected in series, it is possible to obtain a gain of 3 or more times an integral number.

FIG. 12 shows a level shift circuit that is efficiently constructed when there are a plurality of next-stage circuits and each circuit has a different input operating point. In this case, it is not necessary to provide multiple circuits as shown in FIG. 5, for example, but it is necessary to provide multiple output transistors of the current mirror circuit, and each output transistor has a signal output as explained in FIG. 5, for example. All you need to do is connect the circuit. FIG. 12 shows a configuration in which there are two next-stage circuits with different input operating points. That is, the output transistor Qs1 of the current mirror circuit has the same characteristics as the transistor Qzs, and this transistor Qs1 has the same characteristics as the transistor Qzs.
The transistor Qsz and resistor R2e connected to the collector side of s1 are transistors (h4 and resistor R2e), respectively.
It has the same characteristics as No. 22 and has the same connection configuration. Therefore, an output voltage v3 obtained by level-shifting the operating point of the input voltage v1 to the constant voltage Eb of the constant voltage source 14+1 is obtained at the output terminal P3.

Vs = Eb + Vi・” (10
) Therefore, the constant voltage E of the constant voltage source Ez 1 * El H.

By appropriately selecting Eb, it is possible to obtain at the output terminals P1+P3 a signal whose level is shifted to the input operating point of the next stage circuit connected thereto.

Figure 13 shows transistors Qss+Qs4 and resistor R36.
"Rsa" shows a configuration in which a level-shifted signal is supplied to the next-stage differential amplifier circuit composed of a constant current source 211.In other words, the pace of one transistor Qss forming the differential pair is equal to the output The pace of the other transistor Q84 is connected to the positive terminal of the constant voltage source E21. According to such a configuration, the pace of the transistor Q!13IQ114 is connected to the constant voltage source Ezi. Since the bias is supplied based on the constant voltage Ea of the voltage Ea, the differential input voltage does not fluctuate due to fluctuations in the voltage Ea, and only the input voltage v1 can be supplied as a differential input. By appropriately setting the resistance value of R32°Ttss, a voltage obtained by amplifying the input voltage ■l can be obtained at the output terminals P3+P4.

Note that the present invention is not limited to the above embodiments. For example, in FIG. 5, the constant voltage E21 of the constant voltage source E21 is
If 1 is set to zero, the level shift amount can be set to zero. In other words, the circuit can be used simply as an impedance conversion circuit. Furthermore, it goes without saying that the current mirror circuit is not limited to the configuration shown in FIG. 5 and the like.

〔Effect of the invention〕

21- Thus, according to the present invention, it is possible to provide a level shift circuit that is suitable for integrated circuits, has a simple circuit configuration, and can always perform stable level shifting.

[Brief explanation of drawings]

1 to 4 are circuit diagrams showing different examples of conventional level shift circuits, FIG. 5 is a circuit diagram showing a first embodiment of the level shift circuit according to the present invention, and FIGS. 6 to 13 are circuit diagrams showing different examples of conventional level shift circuits. The figures are circuit diagrams showing second to ninth embodiments of the present invention, respectively. pt...input terminal, P! IP11...output terminal, v
cc...power/source, Ezt *E22...constant voltage source,
Engineering 21... Constant current source, Cht~Q34... Transistor, Rx 1~R4S... Resistor, D! l...Zener diode. Applicant's agent Patent attorney Takehiko Suzue 22- □17.1 Figure 13

Claims (1)

[Claims] A series circuit including an input terminal to which an input signal is applied, and a pace-emitter current path of an input transistor and a resistor is formed between this input terminal and an operating point potential end of the input signal. a signal input circuit consisting of a signal input circuit, an active load of the input transistor, a constant current source transistor that flows a current corresponding to the current flowing through the active load, and an output terminal provided in the current path of the constant current source transistor; , a constant voltage source interveningly connected to the current path to which the output terminal is connected and serving to determine the level shift amount, and at least one P interveningly connected between the constant voltage source and the output terminal.
A level shift circuit comprising an N junction and an output circuit having a resistance circuit.