JPS5984929U - logic output circuit - Google Patents
logic output circuitInfo
- Publication number
- JPS5984929U JPS5984929U JP16532083U JP16532083U JPS5984929U JP S5984929 U JPS5984929 U JP S5984929U JP 16532083 U JP16532083 U JP 16532083U JP 16532083 U JP16532083 U JP 16532083U JP S5984929 U JPS5984929 U JP S5984929U
- Authority
- JP
- Japan
- Prior art keywords
- logic
- output
- output circuit
- logic output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の論理出力回路の1例、第2図は本考案に
か)る論理出力回路のブロックダイアグラム、第3図は
本考案にかさる回路の1実施例である。 ゛
図において5が電源遮断時インヒビット論理である。FIG. 1 is an example of a conventional logic output circuit, FIG. 2 is a block diagram of a logic output circuit according to the present invention, and FIG. 3 is an embodiment of the circuit according to the present invention. In the figure, 5 is the inhibit logic when the power is cut off.
Claims (1)
値出力状態を有し論理出力がトウテンボール型回路を使
用し入力にインヒビット論理が印加された場合高出力イ
ンピーダンスとする論理回路において、電源電圧が正常
な論理動作を行なわれなくなる一定しヘル以下の時に前
記出力論理を強制的に高出力インピーダンス状態に保持
することを特徴とする論理出力回路。Output logic is “0°゛, 1”, high output impedance 3
In a logic circuit that has a value output state and uses a Totenball type circuit with a logic output and has a high output impedance when inhibit logic is applied to the input, the power supply voltage is constant and below Hertz, which prevents normal logic operation. A logic output circuit characterized in that the output logic is forcibly held in a high output impedance state when .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16532083U JPS5984929U (en) | 1983-10-27 | 1983-10-27 | logic output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16532083U JPS5984929U (en) | 1983-10-27 | 1983-10-27 | logic output circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5984929U true JPS5984929U (en) | 1984-06-08 |
Family
ID=30362224
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16532083U Pending JPS5984929U (en) | 1983-10-27 | 1983-10-27 | logic output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5984929U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5027466A (en) * | 1973-07-10 | 1975-03-20 | ||
JPS54945A (en) * | 1977-06-06 | 1979-01-06 | Nec Corp | Integrated circuit providing output control function |
-
1983
- 1983-10-27 JP JP16532083U patent/JPS5984929U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5027466A (en) * | 1973-07-10 | 1975-03-20 | ||
JPS54945A (en) * | 1977-06-06 | 1979-01-06 | Nec Corp | Integrated circuit providing output control function |
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