JPS597215B2 - Method of forming silicon oxide film - Google Patents
Method of forming silicon oxide filmInfo
- Publication number
- JPS597215B2 JPS597215B2 JP13290476A JP13290476A JPS597215B2 JP S597215 B2 JPS597215 B2 JP S597215B2 JP 13290476 A JP13290476 A JP 13290476A JP 13290476 A JP13290476 A JP 13290476A JP S597215 B2 JPS597215 B2 JP S597215B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- porous
- oxidation
- region
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
本発明は硅素(シリコン)基板結晶内に埋めこまれた厚
い酸化硅素膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a thick silicon oxide film embedded within a silicon substrate crystal.
半導体集積回路の製造技術として半導体基板表面に埋め
こまれた形状での局部的な選択酸化膜の形成がしばしば
必要になる。一般的にローコス(LOCOS)法なる名
称で良くしられた窒化膜による選択マスクを用いたシリ
コン基板表面の選択酸化法はこれらの要求に応じるもの
だとの理解があるが、局部的な酸化に起因したり、窒化
膜を用いることによる膨張係数の差による歪が結晶基板
に悪影響を及ぼしたり、表面の平坦性が損われることな
どから、形成される酸化膜厚みにはほぼ1〜2ミクロン
に限界があり、また半導体集積回路の高密度化にも微細
加工の面で限界を生じていた。一方、近年シリコン結晶
基板の表面−ー部領域を選択的に多孔質化した後これを
熱酸化して厚い選択酸化膜を基板に埋めこまれた状態で
得る技術が提案され半導体装置の製造技術として幾つか
の応用が試みられている。しかるにこの多孔質酸化法は
、シリコン単結晶の一部所定領域を多孔質化するために
、その後の熱処理で体積収縮を生じ酸化による体積膨張
との兼ねあいから、表面が凸になつたり凹になつたり、
なかなか平坦な表面が得られなかつた。また多孔質化さ
れた領域は化学的に活性であるために、深い多孔質化領
域の酸化も速く厚い埋めこまれた酸化膜領域が得られる
と言われているが、高温で急速に熱酸化すると表面近傍
が先に急激に酸化して多孔化した孔が酸化膜でつぷされ
、深い部分の酸化に必要な酸素原子はこの酸化膜中を拡
散して進行するため通常のシリコン単結晶における酸化
速度と近いものになつてしまう。As a manufacturing technique for semiconductor integrated circuits, it is often necessary to form a selective oxide film locally in a shape buried in the surface of a semiconductor substrate. It is generally understood that the selective oxidation method of the silicon substrate surface using a selective mask made of a nitride film, which is well known by the name LOCOS method, meets these requirements, but it is difficult to avoid local oxidation. The thickness of the oxide film formed is approximately 1 to 2 microns because the distortion due to the difference in expansion coefficient due to the use of a nitride film has an adverse effect on the crystal substrate, and the flatness of the surface is impaired. There are limits, and there are also limits in terms of microfabrication when it comes to increasing the density of semiconductor integrated circuits. On the other hand, in recent years, a technology has been proposed in which the surface area of a silicon crystal substrate is selectively made porous and then thermally oxidized to obtain a thick selective oxide film embedded in the substrate. Several applications have been attempted. However, in this porous oxidation method, in order to make a predetermined region of the silicon single crystal porous, the subsequent heat treatment causes volumetric shrinkage, which in turn causes the surface to become convex or concave due to volumetric expansion due to oxidation. Summer,
It was difficult to obtain a flat surface. In addition, since the porous region is chemically active, oxidation in deep porous regions is said to be rapid and a thick buried oxide film region can be obtained, but rapid thermal oxidation occurs at high temperatures. Then, the area near the surface is rapidly oxidized first, and the porous pores are filled with an oxide film, and the oxygen atoms necessary for oxidation of the deep part diffuse through this oxide film, so that the pores in the silicon single crystal are The oxidation rate will be close to that of the oxidation rate.
従つて厚い領域を酸化するためには低温で長時間の酸化
をした後、高温で更に酸化を追加するなどの方法がとら
れ、しかしこうすると表面の段差が生じてしまうなどし
て、要求する表面の平坦な深い酸化膜の選択形成は実際
にはなかなか困難であつた。Therefore, in order to oxidize thick regions, methods such as oxidizing for a long time at a low temperature and then adding further oxidation at a high temperature are used, but this creates steps on the surface and requires In practice, it is quite difficult to selectively form a deep oxide film with a flat surface.
本発明はかかる従来の欠点を改良した、シリコン結晶基
板内に埋めこまれた厚い酸化硅素膜の形成方法を提供す
るものである。The present invention provides a method for forming a thick silicon oxide film embedded in a silicon crystal substrate, which improves upon these conventional drawbacks.
本発明はシリコン結晶基板の表面所定領域を選択的に陽
極化成による多孔質化をおこない、次いで3〜20に9
/c−ntの高圧酸素雰囲気内で該基板を加熱酸化して
、表面に段差を生じず埋めこまれた深い酸化硅素膜を形
成するものである。In the present invention, a predetermined area of the surface of a silicon crystal substrate is selectively made porous by anodization, and then 3 to 20 days to 90 minutes.
The substrate is heated and oxidized in a high-pressure oxygen atmosphere of /c-nt to form a deep buried silicon oxide film without forming a step on the surface.
シリコン結晶を高圧雰囲気中で加速酸化する試みはたと
えばジャーナルオブエレクトロケミカルソサエテイ19
75年1409頁に報告されている。For example, attempts to accelerate oxidation of silicon crystals in a high-pressure atmosphere are reported in Journal of Electrochemical Society 19.
It is reported on page 1409 in 1975.
しかし従来試みられて来たのはあくまでもシリコン単結
晶であり、また単結晶で実際に効果を持たせるためには
乾燥酸素雰囲気ではなく、水蒸気が多く用いられるため
汚染の危険が大きかつたし、乾燥酸素の場合には百気圧
以上と言う超高圧となるため、取り扱いが危険で装置が
大規模になりすぎて工業的に応用できるものではなかつ
た。発明者らはシリコン結晶の多孔質化領域の酸化の研
究の過程で多孔質化領域の化学的活性度が極めて強いた
めに前記単結晶における状態とは異なつた状態が、前記
単結晶の場合のような数百気圧の加圧ではなく数気圧の
加圧で得られることを見出した。すなわち、多孔質領域
内に加圧することによつて充分な酸素原子を供給しうる
ことを見出したものであり、このことによつて深い多孔
質化領域を高温にせず安定に酸化することを可能とし歪
のない表面の平坦な多孔質酸化を可能としたのである。
以下、本発明の具体的実施例を図を用いて説明する。However, what has been tried so far has only been silicon single crystals, and in order to actually have an effect with single crystals, a lot of water vapor is used instead of a dry oxygen atmosphere, which poses a great risk of contamination. In the case of dry oxygen, the pressure is extremely high, over 100 atmospheres, so it is dangerous to handle and the equipment is too large to be applied industrially. In the process of researching the oxidation of the porous region of silicon crystals, the inventors discovered that the chemical activity of the porous region was extremely strong, so that the state in the single crystal was different from that in the single crystal. It was discovered that this could be achieved by pressurizing several atmospheres rather than several hundred atmospheres. In other words, it was discovered that sufficient oxygen atoms can be supplied by applying pressure inside the porous region, and this makes it possible to stably oxidize deep porous regions without raising the temperature. This enabled porous oxidation with a flat surface without distortion.
Hereinafter, specific embodiments of the present invention will be described with reference to the drawings.
第1図は本発明にかかる半導体基板の多孔質化処理装置
、第2図は本発明の実施?(使用するための加圧酸化装
置の基本原理図をそれぞれ示している。Fig. 1 shows a semiconductor substrate porosity processing apparatus according to the present invention, and Fig. 2 shows an implementation of the present invention. (The basic principle diagram of the pressure oxidation device for use is shown in each figure.)
第1図において多孔質化処理すべき半導体基板1を耐弗
酸性の樹脂で出来たホルダー2に装着し、同様に耐弗酸
性樹脂の容器3に収納する。In FIG. 1, a semiconductor substrate 1 to be made porous is mounted on a holder 2 made of a hydrofluoric acid-resistant resin, and similarly stored in a container 3 made of a hydrofluoric acid-resistant resin.
容器3には45〜49%の弗化水素酸溶液4を満し白金
板による陽極5及び陰極6を弗酸容器3内に浸漬する。
このとき半導体基板1の多孔質化処理すべき主面(表面
)7は陰極6に面して配置する。基板の主面7に対して
の反対面(裏面)8は通常その面における導電型の高濃
度領域を数ミクロンの厚みで反対面の全面にわたつて形
成しておくのが望ましい。陽極と陰極の間に電源9、望
ましくは定゛電流安定化電源を接続し、半導体基板1の
多孔質化すべき表面積に応じて電流密度10〜50mA
/〜で陽極化成をおこなう。多孔質化領域を選択的に形
成するためには、多孔質化速度が正孔濃度に依存するこ
とからP型領域で速い性質を利用して、P領域とN領域
とを形成しておいてP領域のみを選択的に多孔質化処理
する方法や、窒化膜とかフオトレジストを用いる方法が
知られている。The container 3 is filled with a 45-49% hydrofluoric acid solution 4, and the anode 5 and cathode 6 made of platinum plates are immersed in the hydrofluoric acid container 3.
At this time, the main surface (front surface) 7 of the semiconductor substrate 1 to be subjected to the porous treatment is placed facing the cathode 6 . It is usually desirable to form a high concentration region of a conductive type on the opposite surface (back surface) 8 to the main surface 7 of the substrate with a thickness of several microns over the entire surface of the opposite surface. A power source 9, preferably a constant current stabilized power source, is connected between the anode and the cathode, and the current density is 10 to 50 mA depending on the surface area of the semiconductor substrate 1 to be made porous.
/ Perform anodization with ~. In order to selectively form a porous region, since the rate of porosity depends on the hole concentration, a P region and an N region are formed by taking advantage of the fast property of the P type region. A method in which only the P region is selectively made porous and a method in which a nitride film or a photoresist is used are known.
多孔質化処理の終了した基板はその後の工程で加圧酸化
される。The substrate that has undergone the porous treatment is oxidized under pressure in a subsequent step.
第2図は加圧酸化装置に基板を設置した状態を示してい
る。ステンレス鋼管で加工された内管11内に、半導体
基板1はボート12に載置された状態で設置される。内
管11には加熱コイル13が外側に管を包む状態で構成
され、内管11の挿入口側には内蓋14が蝶ねじ15で
しめられており、出口側は内管11自体がしぼられて細
孔16があけられている。内管11はそつくり外管17
に収納されており、外管17の外壁は冷却水配管18に
よつて冷却されている。外管17には気圧計19が取付
けられ、外蓋20は、内蓋14と同様に蝶ねじ21でし
められるようになつている。高圧配管22はボニルジヨ
″インド型のコネクタ23によつて内蓋14のパイプ2
3に接続され、加圧された酸素ガスが内管11内に導入
される。内管11と外管17の圧力バランスは細孔16
によつて調整される。24は排気管である。FIG. 2 shows a state in which a substrate is installed in a pressure oxidation apparatus. The semiconductor substrate 1 is placed on a boat 12 in an inner tube 11 made of a stainless steel tube. The inner tube 11 is configured with a heating coil 13 that wraps around the tube on the outside, an inner lid 14 is fastened with thumbscrews 15 on the insertion port side of the inner tube 11, and the inner tube 11 itself is compressed on the outlet side. pores 16 are opened. The inner tube 11 is warped and the outer tube 17
The outer wall of the outer tube 17 is cooled by a cooling water pipe 18. A barometer 19 is attached to the outer tube 17, and the outer cover 20, like the inner cover 14, is tightened with thumbscrews 21. The high-pressure pipe 22 is connected to the pipe 2 of the inner cover 14 by a connector 23 of Boniljyo'' Indian type.
3, and pressurized oxygen gas is introduced into the inner tube 11. The pressure balance between the inner tube 11 and the outer tube 17 is maintained by the pores 16.
Adjusted by. 24 is an exhaust pipe.
第3図a−dは本発明を半導体装置の選択酸化領域の形
成に適用した場合の主要な工程を説明する断面図である
。FIGS. 3a to 3d are cross-sectional views illustrating the main steps when the present invention is applied to the formation of selectively oxidized regions of a semiconductor device.
先づ出発材料としてP型(100)シリコン基板1を準
備し、前述のように裏面には全面にp+領域102を拡
散等によつて形成し、表面には所定の領域を残してそれ
以外の表面に選択多孔質化のマスクとして窒化膜103
を被着形成する。窒化膜103の厚みは多孔質化の条件
によつて異なるが、通常1000〜2000Aの厚ノ
みが用いられる。(第3図a)次に第1図で説明した様
な多孔質化処理をおこない、選択的多孔質化領域104
を形成する(第3図6)。First, a P-type (100) silicon substrate 1 is prepared as a starting material, and as described above, a p+ region 102 is formed on the entire back surface by diffusion, etc., and a predetermined region is left on the surface, and other regions are formed. Nitride film 103 on the surface as a mask for selective porosity
Form the adhesion. The thickness of the nitride film 103 varies depending on the conditions for making it porous, but it is usually between 1000 and 2000A.
is used. (FIG. 3a) Next, a porous treatment as explained in FIG. 1 is performed to selectively make the porous region 104.
(Fig. 3, 6).
多孔質化の形成条件は基板1の比抵抗が1Ω−?の場合
、電流蜜度10mA/C7iで約85分通電し、その後
電流を流さない状態で約40分そのまま弗酸中に浸漬し
て窒化膜103を除去する。このとき形成された多孔質
化領域104の表面からの深さは大略4ミタロンである
。次に第2図で説明した様な加圧酸化装置によつ9て加
圧酸化することにより、多孔質化領域104を酸化して
厚い酸化物領域105に変質させる。The conditions for forming porosity are that the specific resistance of the substrate 1 is 1Ω-? In this case, the nitride film 103 is removed by applying current at a current density of 10 mA/C7i for about 85 minutes, and then immersing it in hydrofluoric acid for about 40 minutes without applying any current. The depth of the porous region 104 formed at this time from the surface is approximately 4 mt. Next, the porous region 104 is oxidized and transformed into a thick oxide region 105 by performing pressure oxidation at 9 using a pressure oxidation apparatus as described in FIG.
このとき同時に多孔質化していない表面にも薄い酸化膜
106が形成される(第3図C)。加圧酸化の条件は乾
燥酸素3〜20K7/(−Fltを第2図高圧配管22
より内管11内に導入し、基板1を700℃10分間加
熱保持して厚い酸化物領域105として4ミクロンの二
酸化硅素膜が得られる。このときの薄い酸化膜106の
厚みは約1000λである。なお、加圧酸化を行なう際
には、3K7A?よりも小さな圧力では加圧の効果は生
じず、また20K7/Cllより大きな圧力では、加圧
装置が大がかりになつたり、また高圧による危険性が増
すので本発明の目的を達成するには不適当である。At this time, a thin oxide film 106 is also formed on the non-porous surface (FIG. 3C). The conditions for pressurized oxidation are dry oxygen 3~20K7/(-Flt) in the high pressure piping 22 in Figure 2.
The substrate 1 is heated and held at 700° C. for 10 minutes to obtain a silicon dioxide film of 4 microns as the thick oxide region 105. The thickness of the thin oxide film 106 at this time is approximately 1000λ. In addition, when performing pressure oxidation, 3K7A? A pressure smaller than 20K7/Cl will not produce the pressurizing effect, and a pressure larger than 20K7/Cl will require a large-scale pressurizing device and increase the risk of high pressure, making it unsuitable for achieving the purpose of the present invention. It is.
この後、従来から知られるMOS製造プロセスを用いて
N+ソース、ドルイン領域107,108とゲート酸化
膜109を形成し、それぞれソース電極110、ゲート
電極111、ドレイン電極112をAt蒸着で形成する
(第3図d)。Thereafter, an N+ source, drain regions 107 and 108, and a gate oxide film 109 are formed using a conventionally known MOS manufacturing process, and a source electrode 110, a gate electrode 111, and a drain electrode 112 are formed by At vapor deposition (first step). Figure 3 d).
第3図dに示した工程は本発明の本旨ではなく、Atゲ
ートMOSの場合を示したが、SiゲートやMOゲート
に関しても周知の技術で形成されるため詳細な説明は省
略する。なお同様に第3図Cで形成した薄い酸化膜10
6を一旦除去して後、通常の熱酸化により新らたに酸化
膜を形成しても、第3図Cで形成された酸化膜をそのま
ま使用するのもこれは設計の問題であつて、いづれにし
ろ本発明の本旨をさまたげるものではない。また、半導
体装置の各素子たとえば本実施例で説明したMOSトラ
ンジスタを基板1に形成した後に、第3図aの工程に移
りB,cと進行することも本発明の本旨をさまたげない
。すなわち本発明の本旨とするところは、あくまで厚い
絶縁物領域の形成を多孔質化処理した後に高圧酸化によ
り、従来の通常用いられる熱酸化温度より低く短時間で
形成する方法であり、かつ本発明によつて得られた厚い
絶縁物領域が、かかる形成条件でありながら従来の高温
熱酸化膜に比して優れた特性を示す点に特徴がある。The process shown in FIG. 3d is not the main point of the present invention, and the case of an At gate MOS is shown, but since Si gates and MO gates are also formed using well-known techniques, detailed explanations will be omitted. Similarly, the thin oxide film 10 formed in FIG.
Even if a new oxide film is formed by normal thermal oxidation after removing 6, the oxide film formed in FIG. In any case, this does not impede the gist of the present invention. Furthermore, after forming each element of the semiconductor device, such as the MOS transistor described in this embodiment, on the substrate 1, the process may proceed to steps B and c in FIG. In other words, the gist of the present invention is to form a thick insulator region by performing porous treatment and then high-pressure oxidation to form it in a short time at a temperature lower than the conventional thermal oxidation temperature normally used. The thick insulator region obtained by this method is characterized in that it exhibits superior properties compared to conventional high-temperature thermal oxide films even under such formation conditions.
すなわち低温短時間で多孔質領域を加圧して酸化するこ
とによつて歪の少ない、表面が平坦な、かつ電気的特性
の優れた2酸化硅素膜が得られる点である。That is, by pressurizing and oxidizing the porous region at a low temperature for a short time, a silicon dioxide film with little distortion, a flat surface, and excellent electrical properties can be obtained.
第4図は多孔質領域を3ミクロンの深さまで形成した基
板を常圧800℃で60分乾燥酸素中で酸化した酸化膜
Aと20K7/〜の乾燥酸素加圧下で700℃60分酸
化した酸化膜BとのNH4F:HF=10:1の組成よ
りなるエツチング液に対するエツチング速度を比較した
図である。Figure 4 shows oxide film A obtained by oxidizing a substrate with a porous region to a depth of 3 microns in dry oxygen at normal pressure of 800°C for 60 minutes and oxidation film A obtained by oxidizing it in dry oxygen under pressure of 20K7/~ at 700°C for 60 minutes. FIG. 4 is a diagram comparing the etching rate of film B with an etching solution having a composition of NH4F:HF=10:1.
図中に示した酸化膜Cは通常の単結晶シリコン表面を1
200℃の水蒸気酸化で形成したものである。酸化膜A
,B,Cに対応するエツチング速度を示す曲線を、それ
ぞれI,H,で表わす。同図において横軸はエツチング
時間、縦軸はエツチング量をエツチングされた深さで示
したものである。The oxide film C shown in the figure covers the surface of ordinary single crystal silicon at 1
It was formed by steam oxidation at 200°C. Oxide film A
, B, and C are represented by I and H, respectively. In the figure, the horizontal axis shows the etching time, and the vertical axis shows the etching amount in terms of etched depth.
同図かられかるように酸化膜A(曲線1)はエツチング
速度が極めて速く、このままでは実際の半導装置製造プ
ロセスには不適当であるが、本発明よりなる酸化膜B(
曲線)は低温酸化であるにもかかわらず従来の高温熱酸
化膜C(曲線)と同等の特性を示し、対エツチング特性
の優秀性を表わしている。第5図A−Cは選択的に基板
表面に埋めこまれた形状の酸化膜の表面段差を触針型の
表面あらさ計で測定した値を示したものである。As can be seen from the figure, oxide film A (curve 1) has an extremely high etching rate and is unsuitable for the actual semiconductor device manufacturing process as it is, but oxide film B (curve 1) according to the present invention
Curve) shows the same characteristics as the conventional high-temperature thermal oxide film C (curve) despite being oxidized at a low temperature, indicating excellent etching resistance. FIGS. 5A to 5C show values measured using a stylus-type surface roughness meter for surface steps of an oxide film selectively embedded in the substrate surface.
同図Aは測定部断面を示し、基板1に選択酸化膜領域3
01を形成したことを示している。同図Bは多孔質形成
3ミクロンのものを800℃15分乾燥酸素で酸化後1
050℃15分水蒸気酸化した場合の表面段差を曲線3
02に示したものであり、同図Cは本発明によるもので
、多孔質形成を同一条件でおこない700℃60分の乾
燥酸素による酸化を鷲20K7/dの圧力下でおこなつ
た場合を曲線303で示したものである。Figure A shows a cross section of the measuring section, with selective oxide film region 3 on substrate 1.
01 was formed. Figure B shows a porous material with a diameter of 3 microns after being oxidized with dry oxygen at 800°C for 15 minutes.
Curve 3 shows the surface level difference when steam oxidized at 050℃ for 15 minutes.
The curve C in the same figure is based on the present invention and shows the case where porous formation was performed under the same conditions and oxidation with dry oxygen was performed at 700°C for 60 minutes under a pressure of 20K7/d. 303.
同図B,Cを比較して、本発明による酸化膜の方がその
平坦性が数段良好になつている。以上述べて来た本発明
の具体的実施例は選択酸化に適用した場合であるが、本
発明の特徴として低温酸化が可能であり、結晶欠陥の誘
起も少ない利点から、基板表面全面の酸化にもその効果
を発揮することは明らかである。Comparing B and C in the figure, the oxide film according to the present invention has much better flatness. Although the specific embodiments of the present invention described above are applied to selective oxidation, the present invention has the advantage of being capable of low-temperature oxidation and less inducing crystal defects. It is clear that this effect can also be achieved.
以上説明したように本発明の酸化硅素膜の形成方法は、
硅素結晶基板の所定領域を多孔質化した後.、前記硅素
結晶基板を3K7/?ないし20K7/〜に加圧した乾
燥酸素雰囲気中で加熱酸化することにより、前記多孔質
化された領域を酸化硅素に変換するものであり、本発明
によれは、厚い酸化硅素膜が歪や汚染のない状態で平坦
にかつ低圧力、低温度で早く形成できるので、工業上非
常に価値の高いものである。As explained above, the method for forming a silicon oxide film of the present invention is as follows:
After making a certain area of the silicon crystal substrate porous. , the silicon crystal substrate is 3K7/? The porous region is converted to silicon oxide by heating and oxidizing in a dry oxygen atmosphere pressurized to 20 K7/~, and according to the present invention, the thick silicon oxide film is free from distortion and contamination. It is extremely valuable industrially because it can be formed quickly, flatly, under low pressure, and at low temperatures.
第1図は本発明にかかるシリコン基板の多孔質化処理装
置の基本原理図、第2図は本発明にかかる加圧酸化装置
の基本原理図、第3図a−dは本発明の一実施例を示す
工程断面図、第4図は本発明と従来例とのエツチング速
度の比較図、第5図A−Cは本発明と従来例との表面段
差の比較図である。
1・・・・・・半導体基板、103・・・・・・窒化膜
、104・・・・・・多孔質化領域、105,106・
・・・・・酸化物領域。FIG. 1 is a diagram of the basic principle of a silicon substrate porosity processing apparatus according to the present invention, FIG. 2 is a diagram of the basic principle of a pressure oxidation apparatus according to the present invention, and FIGS. 3 a to 3 d are illustrations of an embodiment of the present invention. FIG. 4 is a comparison diagram of the etching speed of the present invention and the conventional example, and FIGS. 5A to 5C are diagrams of the comparison of surface steps between the present invention and the conventional example. 1... Semiconductor substrate, 103... Nitride film, 104... Porous region, 105, 106.
...Oxide region.
Claims (1)
素結晶基板を3Kg/cm^3ないし20Kg/cm^
3に加圧した乾燥酸素雰囲気中で加熱酸化することによ
り、前記多孔質化された領域を酸化硅素に変換すること
を特徴とする酸化硅素膜の形成方法。1. After making a predetermined region of the silicon crystal substrate porous, the silicon crystal substrate is heated to 3Kg/cm^3 to 20Kg/cm^
3. A method for forming a silicon oxide film, characterized in that the porous region is converted into silicon oxide by heating and oxidizing in a dry oxygen atmosphere pressurized to 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13290476A JPS597215B2 (en) | 1976-11-04 | 1976-11-04 | Method of forming silicon oxide film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13290476A JPS597215B2 (en) | 1976-11-04 | 1976-11-04 | Method of forming silicon oxide film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5357776A JPS5357776A (en) | 1978-05-25 |
JPS597215B2 true JPS597215B2 (en) | 1984-02-17 |
Family
ID=15092247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13290476A Expired JPS597215B2 (en) | 1976-11-04 | 1976-11-04 | Method of forming silicon oxide film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS597215B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6062129A (en) * | 1983-09-14 | 1985-04-10 | Oki Electric Ind Co Ltd | Manufacture of semiconductor device |
JP3207943B2 (en) * | 1992-11-17 | 2001-09-10 | 忠弘 大見 | Low temperature oxide film forming apparatus and low temperature oxide film forming method |
-
1976
- 1976-11-04 JP JP13290476A patent/JPS597215B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5357776A (en) | 1978-05-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4097314A (en) | Method of making a sapphire gate transistor | |
JPS5843528A (en) | Method of self-reparing insulating film | |
JP5224570B2 (en) | Insulating film forming method and semiconductor device manufacturing method | |
JPS597215B2 (en) | Method of forming silicon oxide film | |
JP2004006660A (en) | Method for manufacturing semiconductor device | |
JPS59202640A (en) | Treatment for semiconductor wafer | |
JPH07193072A (en) | Manufacture of semiconductor device | |
Hess et al. | Investigation of silicon etching and silicon dioxide bubble formation during silicon oxidation in HCl-oxygen atmospheres | |
JPH036826A (en) | Method of forming oxide film on silicon wafer | |
CN110911351A (en) | Method for preparing silicon oxide on surface of silicon wafer | |
JP3032244B2 (en) | Method for manufacturing semiconductor device | |
CN1964001A (en) | Method of growing ultra-thin oxide layer with ozone water | |
US20040023454A1 (en) | Method for utilizing re-oxidation of nitride layer to form super thin nitride gate oxide layer | |
JPS5691474A (en) | Manufacture of semiconductor memory | |
Earwaker et al. | Analysis of porous silicon silicon-on-insulator materials | |
JPS6386449A (en) | Manufacture of semiconductor device | |
JPH04326518A (en) | Cleaning method of semiconductor device | |
JPS59155136A (en) | Formation of semiconductor oxide film | |
KR100398621B1 (en) | Method for manufacturing gate oxide film of semiconductor device | |
CN114429934A (en) | SOD membrane treatment method | |
JPS5828732B2 (en) | How to use hand tools | |
JPS6276559A (en) | Manufacture of semiconductor device | |
JPS5867046A (en) | Manufacture of semiconductor device | |
JPS5819424B2 (en) | Silicon Kibanno Kenmahouhou | |
JPS5889869A (en) | Manufacture of semiconductor device |