JPS596066B2 - semiconductor equipment - Google Patents

Abstract

PURPOSE:For absorbing the variation of the voltage of substrates, to feed electric input to a semiconductor element through the condenser range provided so as to surround the outer circumference of said semiconductor element. CONSTITUTION:A semiconductor element 1 is fastened at metallized semiconductor fastening range 6, and a condenser 7 is mounted at said range 6 so as to surround the outer circumfernece of said element 1. A condenser 7 is fit between said substrate 1 and a power source 8 and the junction capacity C1 present between the expansion layer 4 connecting with power supply lines Vss and Vcc on one hand and said substrate 1 on the other, and said condenser 7, are connected in parallel when said power source 8 is placed outside said condenser 7. Therefore, the variation of the voltage of said substrate 1 is absorbed by said condenser 7 so that the considerable reduction thereof can be attained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that reduces voltage fluctuations in electrical input applied to a substrate in a semiconductor integrated circuit or the like.

Conventionally, in a MOS type integrated circuit, when it is necessary to apply a bias voltage to an element substrate, such as in a dynamic RAM, the back surface of the element is electrically connected to a power supply terminal VBB outside the semiconductor container. A bias voltage can be applied to the substrate from the outside of the semiconductor container via the VBB terminal.

However, a method has been proposed in which the VBB voltage is automatically generated inside the element and does not require external application, and static RA
It has been put into practical use in M and logic ICs). in this case,
The metallized region that fixes the element is in a floating state without any terminals for connection to the outside. Adopting this VBB automatic generation system has the advantage that the VBB terminal can be omitted and the number of external connection terminals on the semiconductor container can be reduced. However, due to the following drawbacks, it has not been applied to, for example, dynamic RAM. The disadvantages of the conventional example shown in FIG. 1 will be explained below. In FIG. 1, 1 is a semiconductor element, 2 is an element fixing region provided in a semiconductor container, and 3 and 4 are diffusion layers of a conductivity type opposite to that of the element substrate. It is assumed that the diffusion layer 3 is connected to a power supply line, and the diffusion layer 4 is connected to an internal signal line 5. Cl and C2 are junction capacitances existing between the third and fourth diffusion layers and the substrate, respectively. Here, the signal line 5 changes from "H" level to "L" level.
When changing from the "゛ level" or "!L" level to the ■WHl level, the voltage on the substrate changes due to the capacitive coupling of C2.

When the substrate is in a floating state, the magnitude of voltage fluctuation at this time is determined by the capacitance ratio of Cl and C2, and the larger C2 is compared to Cl, the larger the voltage fluctuation becomes. For example, in a dynamic RAM, the internal circuit operates in synchronization with the clock, so there is a certain moment when the internal signal line causes a voltage change at the same time as the clock. In this case, since the capacitance C2 associated with the signal line is larger than Cl, if the substrate is in a floating state, voltage fluctuations on the substrate will be large enough to adversely affect the operation of the device.

In order to avoid such negative effects, conventional dynamic RAM did not use the BB automatic generation method, and the board was
It was common to connect to an external low impedance power supply VBB through a terminal, and to add a capacitor between the VBB terminal and another power supply terminal. In this case, the externally added capacitor is connected in parallel with C1 in FIG. 1, which has the effect of apparently increasing C1. However, the impedance of the VBB power supply of the BB automatic generation circuit is relatively high, and since the board is in a floating state and not connected to an external terminal, it is not possible to add an external capacitor as described above. To that end, VB
The automatic generation method B cannot be applied to an element such as a dynamic RAM, which is susceptible to substrate voltage fluctuations and whose characteristics are likely to be adversely affected by such voltage fluctuations.
The present invention has been made in order to eliminate such drawbacks, and the device fixing region made of the metallized layer of the semiconductor container is divided into an inner region and an outer region surrounding the circuit device at the outer periphery of the integrated circuit device. by forming a capacitor region between the inner and outer regions, and applying an external voltage to the integrated circuit element through the capacitor region.
An object of the present invention is to provide a semiconductor device in which voltage fluctuations on a substrate can be reduced.

An embodiment of the present invention will be described in detail below with reference to FIG.

In FIG. 2, FIG. 2A is a sectional view, and FIG. 2B is a top view, in which an automatic substrate bias generation circuit (not shown) is provided on the semiconductor element 1.

Reference numeral 6 denotes a metallized device fixing region provided on the semiconductor container, which consists of an inner device fixing region 6a and an outer device fixing region 6b, which are mutually divided so as to surround the semiconductor device 1 at its outer circumference. .

Reference numeral 7 denotes a capacitor installed so as to surround the outer periphery of the semiconductor element 1 fixed above, with a dielectric interposed between the inner and outer element fixing regions 6a and 6b.

Reference numeral 8 denotes a power supply provided on the outer element fixing region 6b, which is connected to an external power supply terminal of the semiconductor element 1 by a lead wire 9. By installing the capacitor 7 between the external power source and the element substrate in this way, voltage fluctuations are attempted to be absorbed. In other words, by placing the power supply 8 on the outer element fixing region 6b outside the capacitor 7 installed so as to surround the outer periphery of the fixed semiconductor element 1, the capacitor 7 is placed between the substrate and the power supply 8 as described above. will be inserted, and will be connected in parallel with C1 as described in the explanation of FIG.

Therefore, this capacitor 7 absorbs the voltage fluctuation of the substrate, and the voltage fluctuation can be made extremely small. Here, the manufacturing method of the capacitor 7 installed so as to surround the outer periphery of the fixed semiconductor element 1 may be a known method such as a laminated capacitor in which a dielectric material such as barium titanate is interposed between metal conductive layers. However, any other suitable manufacturing method may be used. Further, in the above embodiment, a dynamic RAM was taken as an example, but the present invention is not limited to a dynamic RAM, but is applicable to various semiconductor devices.

As described above, in the semiconductor device according to the present invention, fluctuations in substrate voltage can be reduced by dividing the element fixing region of the semiconductor container into an inner and outer region, and incorporating a capacitor between the inner and outer regions. This has the advantage of providing a stable automatic substrate voltage generation method.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional front view of a conventional semi-dielectric device, FIG. 2 is a semiconductor device according to an embodiment of the present invention, FIG. 2 a is a cross-sectional front view thereof, and FIG. 2 b is a plan view thereof. be. In the figure, 1 is a semiconductor element, 6 is a metalized element fixing region, 6a and 6b are inner and outer element fixing regions, 7 is a capacitor, and 9 is a lead wire.

Claims (1)

[Claims] 1. In a semiconductor device in which a semiconductor integrated circuit element having an automatic substrate bias generation circuit is mounted on an element fixing area made of a metallized layer of a semiconductor container, the element fixing area is attached to the outer periphery of the semiconductor integrated circuit element. It consists of an inner region and an outer region that are mutually divided so as to surround the element,
A capacitor region is formed by interposing a dielectric in the gap between the inner region and the outer region, a lead wire is connected between the outer element fixing region and the external power terminal of the semiconductor integrated circuit element, and the A semiconductor device characterized in that a voltage of an external power supply terminal is applied to the semiconductor integrated circuit element via the outer element fixing region, the capacitor region, and the inner element fixing region.